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([178.197.216.144]) by smtp.gmail.com with ESMTPSA id e19-20020a05600c13d300b003daf98d7e35sm1198258wmg.14.2023.01.25.01.08.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 Jan 2023 01:08:51 -0800 (PST) From: Krzysztof Kozlowski To: Chanwoo Choi , Georgi Djakov , Rob Herring , Krzysztof Kozlowski , Alim Akhtar , linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH] dt-bindings: interconnect: samsung,exynos-bus: allow opp-table Date: Wed, 25 Jan 2023 10:08:49 +0100 Message-Id: <20230125090849.122189-1-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The opp-table can be located in the exynos-bus node which uses it, so allow such child node. Signed-off-by: Krzysztof Kozlowski Acked-by: Rob Herring --- .../interconnect/samsung,exynos-bus.yaml | 27 +++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/Documentation/devicetree/bindings/interconnect/samsung,exynos-bus.yaml b/Documentation/devicetree/bindings/interconnect/samsung,exynos-bus.yaml index ad9ed596dfef..5e26e48c7217 100644 --- a/Documentation/devicetree/bindings/interconnect/samsung,exynos-bus.yaml +++ b/Documentation/devicetree/bindings/interconnect/samsung,exynos-bus.yaml @@ -196,6 +196,8 @@ properties: maxItems: 2 operating-points-v2: true + opp-table: + type: object samsung,data-clock-ratio: $ref: /schemas/types.yaml#/definitions/uint32 @@ -227,6 +229,31 @@ examples: operating-points-v2 = <&bus_dmc_opp_table>; devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>; vdd-supply = <&buck1_reg>; + + bus_dmc_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-50000000 { + opp-hz = /bits/ 64 <50000000>; + opp-microvolt = <800000>; + }; + opp-100000000 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <800000>; + }; + opp-134000000 { + opp-hz = /bits/ 64 <134000000>; + opp-microvolt = <800000>; + }; + opp-200000000 { + opp-hz = /bits/ 64 <200000000>; + opp-microvolt = <825000>; + }; + opp-400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <875000>; + }; + }; }; ppmu_dmc0: ppmu@106a0000 {