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Mon, 23 Jan 2023 02:13:47 +0000 From: Liu Ying To: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: andrzej.hajda@intel.com, neil.armstrong@linaro.org, robert.foss@linaro.org, Laurent.pinchart@ideasonboard.com, jonas@kwiboo.se, jernej.skrabec@gmail.com, airlied@gmail.com, daniel@ffwll.ch, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, marex@denx.de, linux-imx@nxp.com, krzysztof.kozlowski@linaro.org Subject: [PATCH v3 1/2] dt-bindings: display: bridge: ldb: Add i.MX93 LDB Date: Mon, 23 Jan 2023 10:14:48 +0800 Message-Id: <20230123021449.969243-2-victor.liu@nxp.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20230123021449.969243-1-victor.liu@nxp.com> References: <20230123021449.969243-1-victor.liu@nxp.com> X-ClientProxiedBy: SGAP274CA0022.SGPP274.PROD.OUTLOOK.COM (2603:1096:4:b6::34) To AM7PR04MB7046.eurprd04.prod.outlook.com (2603:10a6:20b:113::22) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM7PR04MB7046:EE_|PAXPR04MB8878:EE_ X-MS-Office365-Filtering-Correlation-Id: e0a7ec36-c352-4684-266b-08dafce775c0 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Also, the 'ldb' clock is required. i.MX93 LDB supports only one LVDS channel(channel 0, a.k.a, LVDS Channel-A in the device tree binding documentation), while i.MX8mp LDB supports at most two. Add i.MX93 LDB device tree binding in the existing i.MX8mp LDB device tree binding documentation. Acked-by: Krzysztof Kozlowski Signed-off-by: Liu Ying --- v2->v3: * No change. v1->v2: * Drop redundant "device tree binding" from patch subject. (Krzysztof) * Add Krzysztof's A-b tag. .../bindings/display/bridge/fsl,ldb.yaml | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml b/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml index b19be0804abe..6e0e3ba9b49e 100644 --- a/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml +++ b/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml @@ -16,7 +16,9 @@ description: | properties: compatible: - const: fsl,imx8mp-ldb + enum: + - fsl,imx8mp-ldb + - fsl,imx93-ldb clocks: maxItems: 1 @@ -57,6 +59,18 @@ required: - clocks - ports +allOf: + - if: + properties: + compatible: + contains: + const: fsl,imx93-ldb + then: + properties: + ports: + properties: + port@2: false + additionalProperties: false examples: From patchwork Mon Jan 23 02:14:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Liu Ying X-Patchwork-Id: 646325 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 45660C27C76 for ; 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b=g2wpDe7kvh1s3OZsk+o7jpxxXgOFAubrWmIvRvxy0sxlW9kvztqJxgnfRGv8gel5LkI36AM5PCo9p56bJuI9mFXBvqrrIjy+PCtXebhpwOPHFu2rwkn2Fgk52+ZUC96YCST7BHQi3Yh98fTHUzwrimTGXOD/qjkRxhf2Z79kAGo= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nxp.com; Received: from AM7PR04MB7046.eurprd04.prod.outlook.com (2603:10a6:20b:113::22) by PAXPR04MB8878.eurprd04.prod.outlook.com (2603:10a6:102:20d::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6002.33; Mon, 23 Jan 2023 02:13:51 +0000 Received: from AM7PR04MB7046.eurprd04.prod.outlook.com ([fe80::5725:92ec:f43e:f5fc]) by AM7PR04MB7046.eurprd04.prod.outlook.com ([fe80::5725:92ec:f43e:f5fc%7]) with mapi id 15.20.6002.028; Mon, 23 Jan 2023 02:13:51 +0000 From: Liu Ying To: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: andrzej.hajda@intel.com, neil.armstrong@linaro.org, robert.foss@linaro.org, Laurent.pinchart@ideasonboard.com, jonas@kwiboo.se, jernej.skrabec@gmail.com, airlied@gmail.com, daniel@ffwll.ch, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, marex@denx.de, linux-imx@nxp.com, krzysztof.kozlowski@linaro.org Subject: [PATCH v3 2/2] drm/bridge: fsl-ldb: Add i.MX93 LDB support Date: Mon, 23 Jan 2023 10:14:49 +0800 Message-Id: <20230123021449.969243-3-victor.liu@nxp.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20230123021449.969243-1-victor.liu@nxp.com> References: <20230123021449.969243-1-victor.liu@nxp.com> X-ClientProxiedBy: SGAP274CA0022.SGPP274.PROD.OUTLOOK.COM (2603:1096:4:b6::34) To AM7PR04MB7046.eurprd04.prod.outlook.com (2603:10a6:20b:113::22) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM7PR04MB7046:EE_|PAXPR04MB8878:EE_ X-MS-Office365-Filtering-Correlation-Id: 6c517fee-776a-4ff1-fcd9-08dafce77881 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: znieduWDIf/vuG2eZEaZ8T7fjoewtuPykJ3MIvX9bWvg3epJAX1BZsMjuDOTVYGeveqllYLOQkn3jq/kMzVVTfaYanpxowgBJbv1LycX/lehalnbAQGSZj1fwZf9iW2SS3+KZiyhLME2oezrTi3tkLLs7pCee9syfASUL+o7ahY0rYOrd9d2sBQsmaMnuaLlWaJJShEskgfvOd19GwD8pLBmkr5oFnBj7mlQ0Oz/ydqGeePBJX0hU/GfS6i+awN5W1dPp7Tj1O5W/UFAY92ATsb9HIfQqIk0f0kUDCHXw3uDqKj5vliLBXxAh3LfRloZTLcmySo1bftxG3BK7BUK+sSbZcuSeySrzBIqYF/kb+OW8Ox2Q9ABPakZglKC+Z3LycNGLUR1IbyaLRFJ7sA6mA7S7h+nqRtU8BJy0hXe/UUy0xU6ADZvpTABrrnxmgxfT6IjBX+mk6HnOb0Qgu7v6zwL/XtIqgKkcdXyYBzI8hzW1DLiVCby80yujpHpU8tV0zkSxWbRzIPgdpzGiDEuktPZgqnYUR7dF3x0+tQMfTUjPc2ipB1DPYQQ+1xys94fLB9fUtfSPYzq9NCaH//2qGNoaSxgRQmFMXJ92otMyQ/Sz8Wz1WAyYpBTo34fHkATZo/Tctx++pJ1kPcGvHAXnls6lRDAxQUYhOJMy8x+7TkmdLD74pzXz5/Y6ZE4lbkvdIY9YvcBrLsUP5Jvzmq1SgwQ7RYF3ndtyd7Z4U4sTjCKcamNTF1lXXgKQXLxuuLxVvKS6XSXb5WiaIh6h9ioaguQHvsFVJ9jDlYQu5qw4WS++iFVmqeuicF77/4zFp23WloWKgWVuUdKUHWcNBRHb2Yr8MBzblzwI2lSjrb6gP86rt3ITzjulZudATfkKYb5hYiXogrJB8w6GV0PgpPKnbUg8esrdXfGqwpdsjoZ6y3P62bb1roGoE5j241e41YxCH9QFBZRMVLkNKFENiSZqc7tLeqFAWYtE+H0XEcb92oWz/C1I3hXQ7DOtbKxbOLxcdC/tyof50HCwMvJCKhhWlvc2iIIF7N8bPSjof7q7wUoq73JvXM0KfX/VjTwaNBUIlNpOVCkQpOMuW2G1yZx/a8uMe8hyAhKZLKJBCe7G9I4N4cfoyUHlXp1QaKHPF4d6kFGlVW8aeRkOvWLa64CJNbwEl0z+RAFpSiW2nEKS99oFWSZIdBBHZ9MkYp4C91eOqp8Gvm/QDs4b6SvuN9+x22srJdwoQFJ/GRTvwKcuzUA1dD7TQ7lJSWruYkaCyyvII4ADgRGeu3eyYZR09T3Guj0+OtkFpMITmPb5QCuJ4KnCaj3spCJxiP/zJYMXYB/oQGU5Y0SnKqmCWVvCu8wB/EzSxtsInCoZov8v70HC1rpQxMluE3dKbTntQjUlX6hlJCHh+5B+lXLYTCWoletn8YadmfxuLIkX3gOUSoNFeZPrPLOSpsBLsGzCcmU0QknM837XpuYqDjjZigLAG/JyFyVZ1APmu1EXAYU0St/4dOkg6NqkEu4130fIYoAbKJmqTcyZfpGCutlrfgmMU3weHr/o7FDZrA6e2/YcHwhtQrwTFQm0NSGVbn8Bf2nEeZ7 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 6c517fee-776a-4ff1-fcd9-08dafce77881 X-MS-Exchange-CrossTenant-AuthSource: AM7PR04MB7046.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Jan 2023 02:13:51.7493 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: qXGc1ZGqJNahAMmQTLUaZ3DsbFhld5FxhM4mHqDHaJ0qMVzojHIM/5kVqaOndDfJ07wok6Rat3w7LOj3g5ddzA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAXPR04MB8878 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Same to i.MX8mp LDB, i.MX93 LDB is controlled by mediamix blk-ctrl through LDB_CTRL and LVDS_CTRL registers. i.MX93 LDB supports only one LVDS channel(channel 0) and it's LVDS_CTRL register bit1 is used as LVDS_EN instead of CH1_EN. Add i.MX93 LDB support in the existing i.MX8mp LDB bridge driver by adding i.MX93 LDB compatible string and device data(to reflect different register offsets and LVDS_CTRL register bit1 definition). Reviewed-by: Marek Vasut Signed-off-by: Liu Ying --- v2->v3: * Provide comment on LVDS_CTRL_LVDS_EN bit when defining it's macro. (Marek) * Add Marek's R-b tag. v1->v2: * No change. drivers/gpu/drm/bridge/fsl-ldb.c | 57 +++++++++++++++++++++++++++----- 1 file changed, 48 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/bridge/fsl-ldb.c b/drivers/gpu/drm/bridge/fsl-ldb.c index f9e0f8d99268..85e0ccb27afe 100644 --- a/drivers/gpu/drm/bridge/fsl-ldb.c +++ b/drivers/gpu/drm/bridge/fsl-ldb.c @@ -18,7 +18,6 @@ #include #include -#define LDB_CTRL 0x5c #define LDB_CTRL_CH0_ENABLE BIT(0) #define LDB_CTRL_CH0_DI_SELECT BIT(1) #define LDB_CTRL_CH1_ENABLE BIT(2) @@ -35,9 +34,13 @@ #define LDB_CTRL_ASYNC_FIFO_ENABLE BIT(24) #define LDB_CTRL_ASYNC_FIFO_THRESHOLD_MASK GENMASK(27, 25) -#define LVDS_CTRL 0x128 #define LVDS_CTRL_CH0_EN BIT(0) #define LVDS_CTRL_CH1_EN BIT(1) +/* + * LVDS_CTRL_LVDS_EN bit is poorly named in i.MX93 reference manual. + * Clear it to enable LVDS and set it to disable LVDS. + */ +#define LVDS_CTRL_LVDS_EN BIT(1) #define LVDS_CTRL_VBG_EN BIT(2) #define LVDS_CTRL_HS_EN BIT(3) #define LVDS_CTRL_PRE_EMPH_EN BIT(4) @@ -52,6 +55,29 @@ #define LVDS_CTRL_VBG_ADJ(n) (((n) & 0x7) << 17) #define LVDS_CTRL_VBG_ADJ_MASK GENMASK(19, 17) +enum fsl_ldb_devtype { + IMX8MP_LDB, + IMX93_LDB, +}; + +struct fsl_ldb_devdata { + u32 ldb_ctrl; + u32 lvds_ctrl; + bool lvds_en_bit; +}; + +static const struct fsl_ldb_devdata fsl_ldb_devdata[] = { + [IMX8MP_LDB] = { + .ldb_ctrl = 0x5c, + .lvds_ctrl = 0x128, + }, + [IMX93_LDB] = { + .ldb_ctrl = 0x20, + .lvds_ctrl = 0x24, + .lvds_en_bit = true, + }, +}; + struct fsl_ldb { struct device *dev; struct drm_bridge bridge; @@ -59,6 +85,7 @@ struct fsl_ldb { struct clk *clk; struct regmap *regmap; bool lvds_dual_link; + const struct fsl_ldb_devdata *devdata; }; static inline struct fsl_ldb *to_fsl_ldb(struct drm_bridge *bridge) @@ -158,12 +185,12 @@ static void fsl_ldb_atomic_enable(struct drm_bridge *bridge, reg |= LDB_CTRL_DI1_VSYNC_POLARITY; } - regmap_write(fsl_ldb->regmap, LDB_CTRL, reg); + regmap_write(fsl_ldb->regmap, fsl_ldb->devdata->ldb_ctrl, reg); /* Program LVDS_CTRL */ reg = LVDS_CTRL_CC_ADJ(2) | LVDS_CTRL_PRE_EMPH_EN | LVDS_CTRL_PRE_EMPH_ADJ(3) | LVDS_CTRL_VBG_EN; - regmap_write(fsl_ldb->regmap, LVDS_CTRL, reg); + regmap_write(fsl_ldb->regmap, fsl_ldb->devdata->lvds_ctrl, reg); /* Wait for VBG to stabilize. */ usleep_range(15, 20); @@ -172,7 +199,7 @@ static void fsl_ldb_atomic_enable(struct drm_bridge *bridge, if (fsl_ldb->lvds_dual_link) reg |= LVDS_CTRL_CH1_EN; - regmap_write(fsl_ldb->regmap, LVDS_CTRL, reg); + regmap_write(fsl_ldb->regmap, fsl_ldb->devdata->lvds_ctrl, reg); } static void fsl_ldb_atomic_disable(struct drm_bridge *bridge, @@ -180,9 +207,14 @@ static void fsl_ldb_atomic_disable(struct drm_bridge *bridge, { struct fsl_ldb *fsl_ldb = to_fsl_ldb(bridge); - /* Stop both channels. */ - regmap_write(fsl_ldb->regmap, LVDS_CTRL, 0); - regmap_write(fsl_ldb->regmap, LDB_CTRL, 0); + /* Stop channel(s). */ + if (fsl_ldb->devdata->lvds_en_bit) + /* Set LVDS_CTRL_LVDS_EN bit to disable. */ + regmap_write(fsl_ldb->regmap, fsl_ldb->devdata->lvds_ctrl, + LVDS_CTRL_LVDS_EN); + else + regmap_write(fsl_ldb->regmap, fsl_ldb->devdata->lvds_ctrl, 0); + regmap_write(fsl_ldb->regmap, fsl_ldb->devdata->ldb_ctrl, 0); clk_disable_unprepare(fsl_ldb->clk); } @@ -248,6 +280,10 @@ static int fsl_ldb_probe(struct platform_device *pdev) if (!fsl_ldb) return -ENOMEM; + fsl_ldb->devdata = of_device_get_match_data(dev); + if (!fsl_ldb->devdata) + return -EINVAL; + fsl_ldb->dev = &pdev->dev; fsl_ldb->bridge.funcs = &funcs; fsl_ldb->bridge.of_node = dev->of_node; @@ -306,7 +342,10 @@ static int fsl_ldb_remove(struct platform_device *pdev) } static const struct of_device_id fsl_ldb_match[] = { - { .compatible = "fsl,imx8mp-ldb", }, + { .compatible = "fsl,imx8mp-ldb", + .data = &fsl_ldb_devdata[IMX8MP_LDB], }, + { .compatible = "fsl,imx93-ldb", + .data = &fsl_ldb_devdata[IMX93_LDB], }, { /* sentinel */ }, }; MODULE_DEVICE_TABLE(of, fsl_ldb_match);