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([178.197.216.144]) by smtp.gmail.com with ESMTPSA id h9-20020a5d4fc9000000b002bbb2d43f65sm3184124wrw.14.2023.01.23.07.15.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Jan 2023 07:15:22 -0800 (PST) From: Krzysztof Kozlowski To: Dinh Nguyen , Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH] ARM: dts: socfpga: align UART node name with bindings Date: Mon, 23 Jan 2023 16:15:21 +0100 Message-Id: <20230123151521.369188-1-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Bindings expect UART/serial node names to be "serial". Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/socfpga.dtsi | 4 ++-- arch/arm/boot/dts/socfpga_arria10.dtsi | 4 ++-- arch/arm/boot/dts/socfpga_vt.dts | 4 ++-- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi index 3fee80bbae21..4c1d140f40f8 100644 --- a/arch/arm/boot/dts/socfpga.dtsi +++ b/arch/arm/boot/dts/socfpga.dtsi @@ -905,7 +905,7 @@ timer3: timer3@ffd01000 { reset-names = "timer"; }; - uart0: serial0@ffc02000 { + uart0: serial@ffc02000 { compatible = "snps,dw-apb-uart"; reg = <0xffc02000 0x1000>; interrupts = <0 162 4>; @@ -918,7 +918,7 @@ uart0: serial0@ffc02000 { resets = <&rst UART0_RESET>; }; - uart1: serial1@ffc03000 { + uart1: serial@ffc03000 { compatible = "snps,dw-apb-uart"; reg = <0xffc03000 0x1000>; interrupts = <0 163 4>; diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi index 3b2a2c9c6547..72c55e5187ca 100644 --- a/arch/arm/boot/dts/socfpga_arria10.dtsi +++ b/arch/arm/boot/dts/socfpga_arria10.dtsi @@ -845,7 +845,7 @@ timer3: timer3@ffd00100 { reset-names = "timer"; }; - uart0: serial0@ffc02000 { + uart0: serial@ffc02000 { compatible = "snps,dw-apb-uart"; reg = <0xffc02000 0x100>; interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>; @@ -856,7 +856,7 @@ uart0: serial0@ffc02000 { status = "disabled"; }; - uart1: serial1@ffc02100 { + uart1: serial@ffc02100 { compatible = "snps,dw-apb-uart"; reg = <0xffc02100 0x100>; interrupts = <0 111 IRQ_TYPE_LEVEL_HIGH>; diff --git a/arch/arm/boot/dts/socfpga_vt.dts b/arch/arm/boot/dts/socfpga_vt.dts index 3d0d806888b7..845ab2cc5ce6 100644 --- a/arch/arm/boot/dts/socfpga_vt.dts +++ b/arch/arm/boot/dts/socfpga_vt.dts @@ -57,11 +57,11 @@ timer3@ffd01000 { clock-frequency = <7000000>; }; - serial0@ffc02000 { + serial@ffc02000 { clock-frequency = <7372800>; }; - serial1@ffc03000 { + serial@ffc03000 { clock-frequency = <7372800>; };