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[93.34.89.61]) by smtp.googlemail.com with ESMTPSA id m2-20020a05600c4f4200b003db0ad636d1sm9202257wmq.28.2023.01.22.09.45.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 22 Jan 2023 09:45:52 -0800 (PST) From: Christian Marangi To: Ilia Lin , Andy Gross , Bjorn Andersson , Konrad Dybcio , "Rafael J. Wysocki" , Viresh Kumar , Rob Herring , Krzysztof Kozlowski , Nishanth Menon , Stephen Boyd , Yassine Oudjana , linux-pm@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Christian Marangi Subject: [PATCH v2 1/2] dt-bindings: cpufreq: qcom-cpufreq-nvmem: make cpr bindings optional Date: Sun, 22 Jan 2023 18:45:47 +0100 Message-Id: <20230122174548.13758-1-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.38.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The qcom-cpufreq-nvmem driver supports 2 kind of devices: - pre-cpr that doesn't have power-domains and base everything on nvmem cells and multiple named microvolt bindings - cpr-based that require power-domain in the cpu nodes and use various source to decide the correct voltage and freq When the schema was introduced, it was wrongly set to always require these binding but this is not the case for pre-cpr devices. Make the power-domain optional and set them required only for qcs404 based devices. While at it also make more clear what the opp-table supports by adding ref to the opp-v2-kryo-cpu and opp-v2-qcom-level schema. Fixes: ec24d1d55469 ("dt-bindings: opp: Convert qcom-nvmem-cpufreq to DT schema") Signed-off-by: Christian Marangi --- .../bindings/cpufreq/qcom-cpufreq-nvmem.yaml | 81 +++++++++++++------ 1 file changed, 56 insertions(+), 25 deletions(-) diff --git a/Documentation/devicetree/bindings/cpufreq/qcom-cpufreq-nvmem.yaml b/Documentation/devicetree/bindings/cpufreq/qcom-cpufreq-nvmem.yaml index 9c086eac6ca7..6f5e7904181f 100644 --- a/Documentation/devicetree/bindings/cpufreq/qcom-cpufreq-nvmem.yaml +++ b/Documentation/devicetree/bindings/cpufreq/qcom-cpufreq-nvmem.yaml @@ -17,6 +17,9 @@ description: | on the CPU OPP in use. The CPUFreq driver sets the CPR power domain level according to the required OPPs defined in the CPU OPP tables. + For old implementation efuses are parsed to select the correct opp table and + voltage and CPR is not supported/used. + select: properties: compatible: @@ -33,37 +36,65 @@ select: required: - compatible -properties: - cpus: - type: object - - patternProperties: - '^cpu@[0-9a-f]+$': - type: object - - properties: - power-domains: - maxItems: 1 - - power-domain-names: - items: - - const: cpr - - required: - - power-domains - - power-domain-names - patternProperties: '^opp-table(-[a-z0-9]+)?$': - if: + allOf: + - if: + properties: + compatible: + const: operating-points-v2-kryo-cpu + then: + $ref: /schemas/opp/opp-v2-kryo-cpu.yaml# + + - if: + properties: + compatible: + const: operating-points-v2-qcom-level + then: + $ref: /schemas/opp/opp-v2-qcom-level.yaml# + + unevaluatedProperties: false + +allOf: + - if: properties: compatible: - const: operating-points-v2-kryo-cpu + contains: + enum: + - qcom,qcs404 + then: + properties: + cpus: + type: object + + patternProperties: + '^cpu@[0-9a-f]+$': + type: object + + properties: + power-domains: + maxItems: 1 + + power-domain-names: + items: + - const: cpr + + required: + - power-domains + - power-domain-names + patternProperties: - '^opp-?[0-9]+$': - required: - - required-opps + '^opp-table(-[a-z0-9]+)?$': + if: + properties: + compatible: + const: operating-points-v2-kryo-cpu + then: + patternProperties: + '^opp-?[0-9]+$': + required: + - required-opps additionalProperties: true From patchwork Sun Jan 22 17:45:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 645509 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 37673C25B4E for ; Sun, 22 Jan 2023 17:46:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231134AbjAVRqA (ORCPT ); Sun, 22 Jan 2023 12:46:00 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44382 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229934AbjAVRp6 (ORCPT ); Sun, 22 Jan 2023 12:45:58 -0500 Received: from mail-wm1-x334.google.com (mail-wm1-x334.google.com [IPv6:2a00:1450:4864:20::334]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A6556F741; Sun, 22 Jan 2023 09:45:55 -0800 (PST) Received: by mail-wm1-x334.google.com with SMTP id j17so7478156wms.0; Sun, 22 Jan 2023 09:45:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=LrGjhQpE634D6lomaeukDiYcPVKw6kiO4+o7Lkr2XV8=; b=Oiw9wjdmxkg+Z4X1DjeV2SoLl1sFCwYQDUjijKclKyrSxMeXiJqZgNr0BPZf6JIpgs gkH6Z8LGhwgAVPKDxR+v3AH/97TCjhu1hfdEB3V8hL26bcwc+kyzyEvOrRBONp3peds2 cceLM70khghwzSDhlLDzU6D66PqvIEIwA/SpkXJj9V5RRcZsPJXNRuqu8Yf64JpXzbnO dwmquxz03jwcBmB9Pd3LHY6UEFCBiTjNJ1JksQWlvhRSgAULq96D776hZg4KlOEjXkks Hvh/gddGpnTnXp/2rX3GZvmc34PhXT3rW28szanLjP/5J3f8b6wGCVJ8BIWybwwA6Nby VsgQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=LrGjhQpE634D6lomaeukDiYcPVKw6kiO4+o7Lkr2XV8=; b=t8ehyuvzU/p18lgz4gR4E7KHFVwESx2TJvsjuM2QU2m+yKu0JilRD3X4r+1NrkauYS KCM1YLKoN19pavSQfMQ/8+y6yjTocPh16gq9k6cj2oqE1P+wqw0Y3wGC8vPDy7zEUfDt OB9hvY7ddaXyj7nD0ISUUXylX9qCnQl5j2GQ6IRS4Rdhm17PXkGR7EdjwQseuB1+Pas0 YapuZN8hQkpR1MGS3VZihiXSuUJSVA8OV327Olnbo12ix8Xgl1mJBwkfvQYOiAXD0jmN rZih0AtohZtmnGAjjXJX496Q2qSvz2gXEogYrM4OeiiPvmD6gTxTMor1ym/n5PFj3tx3 aLsA== X-Gm-Message-State: AFqh2koeerSOSn5yfKdqzjMvVpr/7icAJJ718ZNp96potO3Lqt0lSIdB RSIkybY/SIJ0uVqg1DaqLCU= X-Google-Smtp-Source: AMrXdXu2iwlFsFsuAc7BfKVvsmRM3ldpfmz19j3YaSnxzG3vzgP73jSuNizCOqWKail6FpyGVa4r4A== X-Received: by 2002:a05:600c:1d85:b0:3db:1bc5:bbe7 with SMTP id p5-20020a05600c1d8500b003db1bc5bbe7mr14800225wms.0.1674409554113; Sun, 22 Jan 2023 09:45:54 -0800 (PST) Received: from localhost.localdomain (93-34-89-61.ip49.fastwebnet.it. [93.34.89.61]) by smtp.googlemail.com with ESMTPSA id m2-20020a05600c4f4200b003db0ad636d1sm9202257wmq.28.2023.01.22.09.45.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 22 Jan 2023 09:45:53 -0800 (PST) From: Christian Marangi To: Ilia Lin , Andy Gross , Bjorn Andersson , Konrad Dybcio , "Rafael J. Wysocki" , Viresh Kumar , Rob Herring , Krzysztof Kozlowski , Nishanth Menon , Stephen Boyd , Yassine Oudjana , linux-pm@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Christian Marangi Subject: [PATCH v2 2/2] dt-bindings: opp: opp-v2-kryo-cpu: enlarge opp-supported-hw maximum Date: Sun, 22 Jan 2023 18:45:48 +0100 Message-Id: <20230122174548.13758-2-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230122174548.13758-1-ansuelsmth@gmail.com> References: <20230122174548.13758-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Enlarge opp-supported-hw maximum value. In recent SoC we started matching more bit and we currently match mask of 112. The old maximum of 7 was good for old SoC that didn't had complex id, but now this is limiting and we need to enlarge it to support more variants. Document all the various mask that can be used and limit them to only reasonable values instead of using a generic maximum limit. Signed-off-by: Christian Marangi --- .../bindings/opp/opp-v2-kryo-cpu.yaml | 20 +++++++++++++++++-- 1 file changed, 18 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml b/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml index b4947b326773..908cb0d7695a 100644 --- a/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml +++ b/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml @@ -50,12 +50,28 @@ patternProperties: opp-supported-hw: description: | A single 32 bit bitmap value, representing compatible HW. - Bitmap: + Bitmap for MSM8996 format: 0: MSM8996, speedbin 0 1: MSM8996, speedbin 1 2: MSM8996, speedbin 2 3-31: unused - maximum: 0x7 + + Bitmap for MSM8996 later revision format: + 0: MSM8996, speedbin 0 + 1: MSM8996, speedbin 1 + 2: MSM8996, speedbin 2 + 3: always set + 4-31: unused + + Bitmap for MSM8996SG format (speedbin shifted of 4 left): + 0-3: unused + 4: MSM8996SG, speedbin 0 + 5: MSM8996SG, speedbin 1 + 6: MSM8996SG, speedbin 2 + 7-31: unused + enum: [0x1, 0x2, 0x3, 0x4, 0x7, + 0x9, 0xd, 0xe, 0xf, + 0x10, 0x20, 0x30, 0x70] clock-latency-ns: true