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[81.204.249.205]) by smtp.gmail.com with ESMTPSA id hp24-20020a1709073e1800b008720c458bd4sm7666851ejc.3.2023.01.21.03.06.05 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 21 Jan 2023 03:06:06 -0800 (PST) Message-ID: <03627216-54b5-5d9b-f91d-adcd637819e3@gmail.com> Date: Sat, 21 Jan 2023 12:06:05 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.3.0 From: Johan Jonker Subject: [PATCH v2 1/8] dt-bindings: gpio: rockchip, gpio-bank: add compatible string per SoC To: linus.walleij@linaro.org, brgl@bgdev.pl Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, heiko@sntech.de, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kever.yang@rock-chips.com, sjg@chromium.org, philipp.tomsich@vrull.eu, john@metanate.com, quentin.schulz@theobroma-systems.com Content-Language: en-US Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Currently all Rockchip gpio nodes have the same compatible. Compatible strings should be SoC related. Signed-off-by: Johan Jonker Acked-by: Krzysztof Kozlowski Acked-by: Krzysztof Kozlowski Reviewed-by: Linus Walleij --- .../bindings/gpio/rockchip,gpio-bank.yaml | 26 ++++++++++++++++--- 1 file changed, 22 insertions(+), 4 deletions(-) -- 2.20.1 diff --git a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml index affd823c8..a604c3638 100644 --- a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml +++ b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml @@ -11,9 +11,27 @@ maintainers: properties: compatible: - enum: - - rockchip,gpio-bank - - rockchip,rk3188-gpio-bank0 + oneOf: + - const: rockchip,gpio-bank + - const: rockchip,rk3188-gpio-bank0 + - items: + - enum: + - rockchip,px30-gpio-bank + - rockchip,rk3036-gpio-bank + - rockchip,rk3066a-gpio-bank + - rockchip,rk3128-gpio-bank + - rockchip,rk3188-gpio-bank + - rockchip,rk3228-gpio-bank + - rockchip,rk3288-gpio-bank + - rockchip,rk3328-gpio-bank + - rockchip,rk3308-gpio-bank + - rockchip,rk3368-gpio-bank + - rockchip,rk3399-gpio-bank + - rockchip,rk3568-gpio-bank + - rockchip,rk3588-gpio-bank + - rockchip,rv1108-gpio-bank + - rockchip,rv1126-gpio-bank + - const: rockchip,gpio-bank reg: maxItems: 1 @@ -75,7 +93,7 @@ examples: }; gpio1: gpio@2003c000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3188-gpio-bank", "rockchip,gpio-bank"; reg = <0x2003c000 0x100>; interrupts = ; clocks = <&clk_gates8 10>; From patchwork Sat Jan 21 11:08:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Jonker X-Patchwork-Id: 645474 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 98DD1C004D4 for ; Sat, 21 Jan 2023 11:08:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229587AbjAULI0 (ORCPT ); Sat, 21 Jan 2023 06:08:26 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38592 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229493AbjAULIZ (ORCPT ); Sat, 21 Jan 2023 06:08:25 -0500 Received: from mail-ej1-x62d.google.com (mail-ej1-x62d.google.com [IPv6:2a00:1450:4864:20::62d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F3E5B1A4A8; Sat, 21 Jan 2023 03:08:23 -0800 (PST) Received: by mail-ej1-x62d.google.com with SMTP id tz11so19958160ejc.0; Sat, 21 Jan 2023 03:08:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:in-reply-to:content-language:references :cc:to:subject:from:user-agent:mime-version:date:message-id:from:to :cc:subject:date:message-id:reply-to; bh=bV0QlH+wN08mDafAyJd6ZKnO9vWwwQ+auoKN9/OejlI=; b=abuZ60NluSmgsGz2jcp2YIhZdWoLJBvP1gSIN2DCdv0eu7xt1+3/qldtsQvJ1qvQcu V6mvEhlCLtEk54odvZbsuvpI2qP1kBGzFfxd89oEK24E+VKwqbGSYV2L2VLXWbmp9pPW KxbjY1SukwcrFCBk+7A9wmcTaoPHp9t+3xFmStJegKyX8HHc1aV2PWTxxqZGYhtcZdB1 ZGv9/xD6XbfvaRbI+miT6LQDTBYsyNqTJFUITslYim7D8pLWlnGGte7KRMxPYSaCjOIn YdUYR8Eu5w1mKJXymInUFUNfSQLC4JMG7EZFWqN98DPcrEieQyJbpIzjFpyE8V/VF2BZ rSmg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:in-reply-to:content-language:references :cc:to:subject:from:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=bV0QlH+wN08mDafAyJd6ZKnO9vWwwQ+auoKN9/OejlI=; b=PAlz7yCWbqMRmPaF4mvP24rp9xuvcP9W3YCTwQIXN7t95Mjvs0VDV+cOfvOMP/JlwP KXPMVuLMh2SoxpgXm7KQJHhF39z58HeRhj6McHwSSrP8zX8NNEb2O4qH36YJ/SvZ4a5s ghxBeR8Sph1OmWirmKBF6gowRN70eWatoGf1fL87dG3lBVTHD8rpbDoE3uE9dSwKMtUo 0iMll8IOMBsV8cFgI/uAKDHZXq31WygtgvcX32xA5RBM2VlhgdjRxiSWkZhOPVITRjbB uDa5YwU5VvqZ1gaPhhlL2882n5JGakT6PFVM36307NyFj1+FjFVRabV3A5P8UrLoI7ra j7XA== X-Gm-Message-State: AFqh2kpWA0fVKLEEJGDkwOiWcRMMlhQX7RAPE0g5dgmbILOC88frkjFr 5aaa2jMjffoOyM4Tv1xt1QE= X-Google-Smtp-Source: AMrXdXvharavu5Ec3k9/t3pIEVUoQifYmrL6N6/KDWOXmGzBGu2cKkGVU+ItgcsFfkDLRZNqjwCq6g== X-Received: by 2002:a17:906:2582:b0:877:573d:e91c with SMTP id m2-20020a170906258200b00877573de91cmr14335913ejb.63.1674299302493; Sat, 21 Jan 2023 03:08:22 -0800 (PST) Received: from [192.168.2.1] (81-204-249-205.fixed.kpn.net. [81.204.249.205]) by smtp.gmail.com with ESMTPSA id r1-20020a17090609c100b0084ce5d3afe7sm19207706eje.184.2023.01.21.03.08.21 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 21 Jan 2023 03:08:22 -0800 (PST) Message-ID: <137b56f0-8e86-f705-4ba7-d5dfe3c0b477@gmail.com> Date: Sat, 21 Jan 2023 12:08:20 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.3.0 From: Johan Jonker Subject: [PATCH v2 2/8] dt-bindings: pinctrl: rockchip, pinctrl: mark gpio sub nodes of pinctrl as deprecated To: linus.walleij@linaro.org, brgl@bgdev.pl Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, heiko@sntech.de, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kever.yang@rock-chips.com, sjg@chromium.org, philipp.tomsich@vrull.eu, john@metanate.com, quentin.schulz@theobroma-systems.com References: <03627216-54b5-5d9b-f91d-adcd637819e3@gmail.com> Content-Language: en-US In-Reply-To: <03627216-54b5-5d9b-f91d-adcd637819e3@gmail.com> Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Mark gpio sub nodes of pinctrl as deprecated. Gpio nodes are now placed in the root of the device tree. The relation to pinctrl is now described with the "gpio-ranges" property. Signed-off-by: Johan Jonker Reviewed-by: Linus Walleij --- .../devicetree/bindings/pinctrl/rockchip,pinctrl.yaml | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) -- 2.20.1 diff --git a/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.yaml index d6539723f..45b767986 100644 --- a/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.yaml @@ -76,15 +76,13 @@ allOf: required: - compatible - rockchip,grf - - "#address-cells" - - "#size-cells" - - ranges patternProperties: "gpio@[0-9a-f]+$": type: object $ref: "/schemas/gpio/rockchip,gpio-bank.yaml#" + deprecated: true unevaluatedProperties: false From patchwork Sat Jan 21 11:08:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Jonker X-Patchwork-Id: 645254 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 77625C004D4 for ; Sat, 21 Jan 2023 11:08:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229693AbjAULIr (ORCPT ); Sat, 21 Jan 2023 06:08:47 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39000 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229686AbjAULIq (ORCPT ); Sat, 21 Jan 2023 06:08:46 -0500 Received: from mail-ej1-x632.google.com (mail-ej1-x632.google.com [IPv6:2a00:1450:4864:20::632]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4C5D8521E2; Sat, 21 Jan 2023 03:08:41 -0800 (PST) Received: by mail-ej1-x632.google.com with SMTP id vw16so19794090ejc.12; Sat, 21 Jan 2023 03:08:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:in-reply-to:content-language:references :cc:to:subject:from:user-agent:mime-version:date:message-id:from:to :cc:subject:date:message-id:reply-to; bh=v3b7+rhgpzwNviPg8rPLBXq+7U8FJNnHoMKxitjzZvU=; b=lLQotlq9YYZaxdFooJZBoQlundnE/fFNTBIAufPgr/zxzvpq8RhkaAMbyjX8ENQCop tODPr0V5RMIZq/b5tIbV3IsWQRH6obQHk+BNmMuhdk5yAQ9btE29bAlUeR6HOtpgCuBC 6eXGrsSfDpkHEnVPCFyumF++ZUi7v6uwIHKvnF2AhVAslIstX/Oqwir4n2aOqy1JKxkx EBy0n2A+hY6c8mLUaSQNtZRIZ2RSPYnCgkgS4PmDKxG5z1nDlraagUPFNHiHexp82r8d 1rOTi8wtBlShKMGtZG9xUY/j7yOH546QcLdreQyhXrcTi1wTVwp2+6JvJrPz8S+HtGXZ pi0A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:in-reply-to:content-language:references :cc:to:subject:from:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=v3b7+rhgpzwNviPg8rPLBXq+7U8FJNnHoMKxitjzZvU=; b=0s1qkXd4oz6UFER2Q5kLnL4cOHRCg3ctqYhhltIuFtE74JfOaZj6f/yVNWzBweX28A 264GaNNhMjV//1k3iil3CfUwL4bf4DYuFS0EpwbIKO1OShRJzFeruOG37ht9rf/b7yHg cAapeGVkP7dGeO8yIMW19HT6QNAItZdo8Tf/SqtlvVRextShu9zd2fImYBifWQ9Ww0vz seqHZqXavXux95kBEqFCTXOX6lPTwfLY8ID9xLkNQib1a/JvScXxVElGliw264/oQSYj dsdn9XoEGVMoJaQdv02nHyZpNaVvNWkHmx5e42Yv6AXN2BCBccXKh8vogQiqJiGaoOMe kUeQ== X-Gm-Message-State: AFqh2kq/sBrp3s3voGavCU8/aRKVkAu5cQKw9/hacxp7fUCBKQvBdMlr T1JagPR085AWsKzvheA2Thc= X-Google-Smtp-Source: AMrXdXvnOIE3+iioq9IO2ZumHcM3PA+mj8N56wKlF2oayqC2u2XW5HIy0DBO2GVHGowlLY8GH4BASg== X-Received: by 2002:a17:906:1605:b0:872:41a5:7c78 with SMTP id m5-20020a170906160500b0087241a57c78mr23807819ejd.3.1674299319795; Sat, 21 Jan 2023 03:08:39 -0800 (PST) Received: from [192.168.2.1] (81-204-249-205.fixed.kpn.net. [81.204.249.205]) by smtp.gmail.com with ESMTPSA id vo13-20020a170907a80d00b0086a4bb74cf7sm11582476ejc.212.2023.01.21.03.08.38 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 21 Jan 2023 03:08:39 -0800 (PST) Message-ID: <890be9a0-8e82-a8f4-bc15-d5d1597343c2@gmail.com> Date: Sat, 21 Jan 2023 12:08:38 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.3.0 From: Johan Jonker Subject: [PATCH v2 3/8] gpio: gpio-rockchip: parse gpio-ranges for bank id To: linus.walleij@linaro.org, brgl@bgdev.pl Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, heiko@sntech.de, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kever.yang@rock-chips.com, sjg@chromium.org, philipp.tomsich@vrull.eu, john@metanate.com, quentin.schulz@theobroma-systems.com References: <03627216-54b5-5d9b-f91d-adcd637819e3@gmail.com> Content-Language: en-US In-Reply-To: <03627216-54b5-5d9b-f91d-adcd637819e3@gmail.com> Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Parse the gpio-ranges property in Rockchip gpio nodes to be independent from aliases and probe order for our bank id. Signed-off-by: Johan Jonker Acked-by: Linus Walleij Reviewed-by: Kever Yang --- drivers/gpio/gpio-rockchip.c | 24 ++++++++++++++++++------ 1 file changed, 18 insertions(+), 6 deletions(-) -- 2.20.1 diff --git a/drivers/gpio/gpio-rockchip.c b/drivers/gpio/gpio-rockchip.c index e5de15a2a..df74b71aa 100644 --- a/drivers/gpio/gpio-rockchip.c +++ b/drivers/gpio/gpio-rockchip.c @@ -702,24 +702,36 @@ static int rockchip_gpio_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct device_node *np = dev->of_node; - struct device_node *pctlnp = of_get_parent(np); + struct device_node *pctlnp; struct pinctrl_dev *pctldev = NULL; struct rockchip_pin_bank *bank = NULL; struct rockchip_pin_deferred *cfg; + struct of_phandle_args args; static int gpio; int id, ret; - if (!np || !pctlnp) + if (!np) + return -ENODEV; + + ret = of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3, 0, &args); + if (ret == 0) { + pctlnp = args.np; + id = args.args[1] / 32; + } else { + pctlnp = of_get_parent(np); + id = of_alias_get_id(np, "gpio"); + if (id < 0) + id = gpio++; + } + + if (!pctlnp) return -ENODEV; pctldev = of_pinctrl_get(pctlnp); + of_node_put(pctlnp); if (!pctldev) return -EPROBE_DEFER; - id = of_alias_get_id(np, "gpio"); - if (id < 0) - id = gpio++; - bank = rockchip_gpio_find_bank(pctldev, id); if (!bank) return -EINVAL; From patchwork Sat Jan 21 11:08:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Jonker X-Patchwork-Id: 645473 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 09678C27C76 for ; Sat, 21 Jan 2023 11:09:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229711AbjAULJC (ORCPT ); Sat, 21 Jan 2023 06:09:02 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39430 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229699AbjAULJB (ORCPT ); Sat, 21 Jan 2023 06:09:01 -0500 Received: from mail-ed1-x529.google.com (mail-ed1-x529.google.com [IPv6:2a00:1450:4864:20::529]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BE3B751C4F; Sat, 21 Jan 2023 03:08:57 -0800 (PST) Received: by mail-ed1-x529.google.com with SMTP id v5so9507828edc.3; Sat, 21 Jan 2023 03:08:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:in-reply-to:content-language:references :cc:to:subject:from:user-agent:mime-version:date:message-id:from:to :cc:subject:date:message-id:reply-to; bh=NapgBQpV8EOK/qEREONNW/kBlocdhbxkdr9Xp/TagqQ=; b=LqgYzPB6YDESYzT287UAP35a00Rf4oo9S3j+AaIbuobjgRfk1ePOCwp/HkEa6V+tcd xSpWMx/i3PNbg+Yzk+yc20TEgTJ7FqZBGh28elBWvkttJwKIqyZWpbxLf0BrXmjMwWgd kSkC71tthAKTa6GdD5M2nfqW5b713l59KE3/sSIrzKrluYEFHiO4bbwemRjOs5BQLk4j 0yds9xwzMeEbFpCKBxvdFUNZ1CJtOs4QnCMN6xabzRitXO+KYXZv20gJOUAWmwr+Xrf5 ply63AIcx7xbMh1mLn7SbjB5awNH4e/L+fOG/sM5dxEmgVBhA3/xJ2SGEbRifSFZplBY gjJg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:in-reply-to:content-language:references :cc:to:subject:from:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=NapgBQpV8EOK/qEREONNW/kBlocdhbxkdr9Xp/TagqQ=; b=6iT5dyBlU13mSzwdWXULomuHa8QSWSm+EKufW1wOIBdsA6dzEA2+PlSxIf8FezNTTv Ra3GymHP8Tf4RKJPXGjVZ8g/QZGe84kx0R8qSJkE3+j6Q+HHTuc+dHpD4J8QyL0pjKYa FcwRRug8h2cxIjOHvc0BE45Jk6y/JE82piO4LBWRv5Rqik0ycRysPEPKQ6Hks660CMeH K1B/k07v14b8Mh4QnAulNQW3mfeyq3VXjQpZqZRTxjxM7UO+LU1TY82XkpY4d2/0zKfU HYuQkRcEEVfBVqLLJ/JrYFtChu0ktgX98DTgJC574X3rI54izlWrmsffES0YYN4JDcpd XelA== X-Gm-Message-State: AFqh2kr5jzg4NI/6jIJP51ZlfU16Q+A119aMDw7eAy8lHT/i4pyBXiQ4 2S3o9WUXX3mX1hW3fW3AjSY= X-Google-Smtp-Source: AMrXdXsaanSGKMj2tYPiJEMycWxT/h/s1f6jogsJGld+WEAr2SUlS4Z6JgfaIdq2UoUttLxzM45Dwg== X-Received: by 2002:a05:6402:1044:b0:498:8c60:d7d9 with SMTP id e4-20020a056402104400b004988c60d7d9mr17820974edu.12.1674299336230; Sat, 21 Jan 2023 03:08:56 -0800 (PST) Received: from [192.168.2.1] (81-204-249-205.fixed.kpn.net. [81.204.249.205]) by smtp.gmail.com with ESMTPSA id bt16-20020a0564020a5000b00482e0c55e2bsm18388259edb.93.2023.01.21.03.08.55 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 21 Jan 2023 03:08:55 -0800 (PST) Message-ID: Date: Sat, 21 Jan 2023 12:08:54 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.3.0 From: Johan Jonker Subject: [PATCH v2 4/8] ARM: dts: rockchip: add gpio-ranges property to gpio nodes To: linus.walleij@linaro.org, brgl@bgdev.pl Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, heiko@sntech.de, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kever.yang@rock-chips.com, sjg@chromium.org, philipp.tomsich@vrull.eu, john@metanate.com, quentin.schulz@theobroma-systems.com References: <03627216-54b5-5d9b-f91d-adcd637819e3@gmail.com> Content-Language: en-US In-Reply-To: <03627216-54b5-5d9b-f91d-adcd637819e3@gmail.com> Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add a gpio-ranges property to Rockchip gpio nodes to be independent from aliases and probe order for our bank id. Signed-off-by: Johan Jonker Reviewed-by: Kever Yang --- Number of pins per bank not checked with datasheet. Use default 32 for now. --- arch/arm/boot/dts/rk3036.dtsi | 3 +++ arch/arm/boot/dts/rk3066a.dtsi | 6 ++++++ arch/arm/boot/dts/rk3128.dtsi | 4 ++++ arch/arm/boot/dts/rk3188.dtsi | 4 ++++ arch/arm/boot/dts/rk322x.dtsi | 8 ++++++++ arch/arm/boot/dts/rk3288.dtsi | 9 +++++++++ arch/arm/boot/dts/rv1108.dtsi | 4 ++++ arch/arm/boot/dts/rv1126.dtsi | 5 +++++ 8 files changed, 43 insertions(+) -- 2.20.1 diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi index 78686fc72..d99e4ea31 100644 --- a/arch/arm/boot/dts/rk3036.dtsi +++ b/arch/arm/boot/dts/rk3036.dtsi @@ -582,6 +582,7 @@ clocks = <&cru PCLK_GPIO0>; gpio-controller; + gpio-ranges = <&pinctrl 0 0 32>; #gpio-cells = <2>; interrupt-controller; @@ -595,6 +596,7 @@ clocks = <&cru PCLK_GPIO1>; gpio-controller; + gpio-ranges = <&pinctrl 0 32 32>; #gpio-cells = <2>; interrupt-controller; @@ -608,6 +610,7 @@ clocks = <&cru PCLK_GPIO2>; gpio-controller; + gpio-ranges = <&pinctrl 0 64 32>; #gpio-cells = <2>; interrupt-controller; diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi index de9915d94..6ff392735 100644 --- a/arch/arm/boot/dts/rk3066a.dtsi +++ b/arch/arm/boot/dts/rk3066a.dtsi @@ -280,6 +280,7 @@ clocks = <&cru PCLK_GPIO0>; gpio-controller; + gpio-ranges = <&pinctrl 0 0 32>; #gpio-cells = <2>; interrupt-controller; @@ -293,6 +294,7 @@ clocks = <&cru PCLK_GPIO1>; gpio-controller; + gpio-ranges = <&pinctrl 0 32 32>; #gpio-cells = <2>; interrupt-controller; @@ -306,6 +308,7 @@ clocks = <&cru PCLK_GPIO2>; gpio-controller; + gpio-ranges = <&pinctrl 0 64 32>; #gpio-cells = <2>; interrupt-controller; @@ -319,6 +322,7 @@ clocks = <&cru PCLK_GPIO3>; gpio-controller; + gpio-ranges = <&pinctrl 0 96 32>; #gpio-cells = <2>; interrupt-controller; @@ -332,6 +336,7 @@ clocks = <&cru PCLK_GPIO4>; gpio-controller; + gpio-ranges = <&pinctrl 0 128 32>; #gpio-cells = <2>; interrupt-controller; @@ -345,6 +350,7 @@ clocks = <&cru PCLK_GPIO6>; gpio-controller; + gpio-ranges = <&pinctrl 0 192 32>; #gpio-cells = <2>; interrupt-controller; diff --git a/arch/arm/boot/dts/rk3128.dtsi b/arch/arm/boot/dts/rk3128.dtsi index b63bd4ad3..0ea277eb7 100644 --- a/arch/arm/boot/dts/rk3128.dtsi +++ b/arch/arm/boot/dts/rk3128.dtsi @@ -476,6 +476,7 @@ interrupts = ; clocks = <&cru PCLK_GPIO0>; gpio-controller; + gpio-ranges = <&pinctrl 0 0 32>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; @@ -487,6 +488,7 @@ interrupts = ; clocks = <&cru PCLK_GPIO1>; gpio-controller; + gpio-ranges = <&pinctrl 0 32 32>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; @@ -498,6 +500,7 @@ interrupts = ; clocks = <&cru PCLK_GPIO2>; gpio-controller; + gpio-ranges = <&pinctrl 0 64 32>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; @@ -509,6 +512,7 @@ interrupts = ; clocks = <&cru PCLK_GPIO3>; gpio-controller; + gpio-ranges = <&pinctrl 0 96 32>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi index 44b54af0b..6677e4a10 100644 --- a/arch/arm/boot/dts/rk3188.dtsi +++ b/arch/arm/boot/dts/rk3188.dtsi @@ -231,6 +231,7 @@ clocks = <&cru PCLK_GPIO0>; gpio-controller; + gpio-ranges = <&pinctrl 0 0 32>; #gpio-cells = <2>; interrupt-controller; @@ -244,6 +245,7 @@ clocks = <&cru PCLK_GPIO1>; gpio-controller; + gpio-ranges = <&pinctrl 0 32 32>; #gpio-cells = <2>; interrupt-controller; @@ -257,6 +259,7 @@ clocks = <&cru PCLK_GPIO2>; gpio-controller; + gpio-ranges = <&pinctrl 0 64 32>; #gpio-cells = <2>; interrupt-controller; @@ -270,6 +273,7 @@ clocks = <&cru PCLK_GPIO3>; gpio-controller; + gpio-ranges = <&pinctrl 0 96 32>; #gpio-cells = <2>; interrupt-controller; diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi index ffc16d6b9..a87db48c5 100644 --- a/arch/arm/boot/dts/rk322x.dtsi +++ b/arch/arm/boot/dts/rk322x.dtsi @@ -955,10 +955,12 @@ clocks = <&cru PCLK_GPIO0>; gpio-controller; + gpio-ranges = <&pinctrl 0 0 32>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + rockchip,gpio-controller = <0>; }; gpio1: gpio@11120000 { @@ -968,10 +970,12 @@ clocks = <&cru PCLK_GPIO1>; gpio-controller; + gpio-ranges = <&pinctrl 0 32 32>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + rockchip,gpio-controller = <1>; }; gpio2: gpio@11130000 { @@ -981,10 +985,12 @@ clocks = <&cru PCLK_GPIO2>; gpio-controller; + gpio-ranges = <&pinctrl 0 64 32>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + rockchip,gpio-controller = <2>; }; gpio3: gpio@11140000 { @@ -994,10 +1000,12 @@ clocks = <&cru PCLK_GPIO3>; gpio-controller; + gpio-ranges = <&pinctrl 0 96 32>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + rockchip,gpio-controller = <3>; }; pcfg_pull_up: pcfg-pull-up { diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 2ca76b69a..20567ca98 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -1431,6 +1431,7 @@ clocks = <&cru PCLK_GPIO0>; gpio-controller; + gpio-ranges = <&pinctrl 0 0 32>; #gpio-cells = <2>; interrupt-controller; @@ -1444,6 +1445,7 @@ clocks = <&cru PCLK_GPIO1>; gpio-controller; + gpio-ranges = <&pinctrl 0 32 32>; #gpio-cells = <2>; interrupt-controller; @@ -1457,6 +1459,7 @@ clocks = <&cru PCLK_GPIO2>; gpio-controller; + gpio-ranges = <&pinctrl 0 64 32>; #gpio-cells = <2>; interrupt-controller; @@ -1470,6 +1473,7 @@ clocks = <&cru PCLK_GPIO3>; gpio-controller; + gpio-ranges = <&pinctrl 0 96 32>; #gpio-cells = <2>; interrupt-controller; @@ -1483,6 +1487,7 @@ clocks = <&cru PCLK_GPIO4>; gpio-controller; + gpio-ranges = <&pinctrl 0 128 32>; #gpio-cells = <2>; interrupt-controller; @@ -1496,6 +1501,7 @@ clocks = <&cru PCLK_GPIO5>; gpio-controller; + gpio-ranges = <&pinctrl 0 160 32>; #gpio-cells = <2>; interrupt-controller; @@ -1509,6 +1515,7 @@ clocks = <&cru PCLK_GPIO6>; gpio-controller; + gpio-ranges = <&pinctrl 0 192 32>; #gpio-cells = <2>; interrupt-controller; @@ -1522,6 +1529,7 @@ clocks = <&cru PCLK_GPIO7>; gpio-controller; + gpio-ranges = <&pinctrl 0 224 32>; #gpio-cells = <2>; interrupt-controller; @@ -1535,6 +1543,7 @@ clocks = <&cru PCLK_GPIO8>; gpio-controller; + gpio-ranges = <&pinctrl 0 256 32>; #gpio-cells = <2>; interrupt-controller; diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi index abf3006f0..d12b97ee7 100644 --- a/arch/arm/boot/dts/rv1108.dtsi +++ b/arch/arm/boot/dts/rv1108.dtsi @@ -602,6 +602,7 @@ clocks = <&cru PCLK_GPIO0_PMU>; gpio-controller; + gpio-ranges = <&pinctrl 0 0 32>; #gpio-cells = <2>; interrupt-controller; @@ -615,6 +616,7 @@ clocks = <&cru PCLK_GPIO1>; gpio-controller; + gpio-ranges = <&pinctrl 0 32 32>; #gpio-cells = <2>; interrupt-controller; @@ -628,6 +630,7 @@ clocks = <&cru PCLK_GPIO2>; gpio-controller; + gpio-ranges = <&pinctrl 0 64 32>; #gpio-cells = <2>; interrupt-controller; @@ -641,6 +644,7 @@ clocks = <&cru PCLK_GPIO3>; gpio-controller; + gpio-ranges = <&pinctrl 0 96 32>; #gpio-cells = <2>; interrupt-controller; diff --git a/arch/arm/boot/dts/rv1126.dtsi b/arch/arm/boot/dts/rv1126.dtsi index 1f07d0a4f..68e820221 100644 --- a/arch/arm/boot/dts/rv1126.dtsi +++ b/arch/arm/boot/dts/rv1126.dtsi @@ -433,6 +433,7 @@ interrupts = ; clocks = <&pmucru PCLK_GPIO0>, <&pmucru DBCLK_GPIO0>; gpio-controller; + gpio-ranges = <&pinctrl 0 0 32>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; @@ -444,6 +445,7 @@ interrupts = ; clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>; gpio-controller; + gpio-ranges = <&pinctrl 0 32 32>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; @@ -455,6 +457,7 @@ interrupts = ; clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>; gpio-controller; + gpio-ranges = <&pinctrl 0 64 32>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; @@ -466,6 +469,7 @@ interrupts = ; clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>; gpio-controller; + gpio-ranges = <&pinctrl 0 96 32>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; @@ -477,6 +481,7 @@ interrupts = ; clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>; gpio-controller; + gpio-ranges = <&pinctrl 0 128 32>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; From patchwork Sat Jan 21 11:09:10 2023 Content-Type: text/plain; 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[81.204.249.205]) by smtp.gmail.com with ESMTPSA id eg49-20020a05640228b100b00488117821ffsm18743151edb.31.2023.01.21.03.09.11 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 21 Jan 2023 03:09:11 -0800 (PST) Message-ID: <845d82ef-bd36-cc95-dde8-48429597d51b@gmail.com> Date: Sat, 21 Jan 2023 12:09:10 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.3.0 From: Johan Jonker Subject: [PATCH v2 5/8] arm64: dts: rockchip: add gpio-ranges property to gpio nodes To: linus.walleij@linaro.org, brgl@bgdev.pl Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, heiko@sntech.de, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kever.yang@rock-chips.com, sjg@chromium.org, philipp.tomsich@vrull.eu, john@metanate.com, quentin.schulz@theobroma-systems.com References: <03627216-54b5-5d9b-f91d-adcd637819e3@gmail.com> Content-Language: en-US In-Reply-To: <03627216-54b5-5d9b-f91d-adcd637819e3@gmail.com> Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add a gpio-ranges property to Rockchip gpio nodes to be independent from aliases and probe order for our bank id. Signed-off-by: Johan Jonker Reviewed-by: Kever Yang --- Number of pins per bank not checked with datasheet. Use default 32 for now. --- arch/arm64/boot/dts/rockchip/px30.dtsi | 4 ++++ arch/arm64/boot/dts/rockchip/rk3308.dtsi | 5 +++++ arch/arm64/boot/dts/rockchip/rk3328.dtsi | 4 ++++ arch/arm64/boot/dts/rockchip/rk3368.dtsi | 4 ++++ arch/arm64/boot/dts/rockchip/rk3399.dtsi | 5 +++++ arch/arm64/boot/dts/rockchip/rk356x.dtsi | 5 +++++ 6 files changed, 27 insertions(+) -- 2.20.1 diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi index 4f6959eb5..9fcc0d0f3 100644 --- a/arch/arm64/boot/dts/rockchip/px30.dtsi +++ b/arch/arm64/boot/dts/rockchip/px30.dtsi @@ -1387,6 +1387,7 @@ interrupts = ; clocks = <&pmucru PCLK_GPIO0_PMU>; gpio-controller; + gpio-ranges = <&pinctrl 0 0 32>; #gpio-cells = <2>; interrupt-controller; @@ -1399,6 +1400,7 @@ interrupts = ; clocks = <&cru PCLK_GPIO1>; gpio-controller; + gpio-ranges = <&pinctrl 0 32 32>; #gpio-cells = <2>; interrupt-controller; @@ -1411,6 +1413,7 @@ interrupts = ; clocks = <&cru PCLK_GPIO2>; gpio-controller; + gpio-ranges = <&pinctrl 0 64 32>; #gpio-cells = <2>; interrupt-controller; @@ -1423,6 +1426,7 @@ interrupts = ; clocks = <&cru PCLK_GPIO3>; gpio-controller; + gpio-ranges = <&pinctrl 0 96 32>; #gpio-cells = <2>; interrupt-controller; diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi index dd228a256..38976f413 100644 --- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi @@ -798,6 +798,7 @@ interrupts = ; clocks = <&cru PCLK_GPIO0>; gpio-controller; + gpio-ranges = <&pinctrl 0 0 32>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; @@ -809,6 +810,7 @@ interrupts = ; clocks = <&cru PCLK_GPIO1>; gpio-controller; + gpio-ranges = <&pinctrl 0 32 32>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; @@ -820,6 +822,7 @@ interrupts = ; clocks = <&cru PCLK_GPIO2>; gpio-controller; + gpio-ranges = <&pinctrl 0 64 32>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; @@ -831,6 +834,7 @@ interrupts = ; clocks = <&cru PCLK_GPIO3>; gpio-controller; + gpio-ranges = <&pinctrl 0 96 32>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; @@ -842,6 +846,7 @@ interrupts = ; clocks = <&cru PCLK_GPIO4>; gpio-controller; + gpio-ranges = <&pinctrl 0 128 32>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi index 6d7a7bf72..7ba695728 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi @@ -1051,6 +1051,7 @@ clocks = <&cru PCLK_GPIO0>; gpio-controller; + gpio-ranges = <&pinctrl 0 0 32>; #gpio-cells = <2>; interrupt-controller; @@ -1064,6 +1065,7 @@ clocks = <&cru PCLK_GPIO1>; gpio-controller; + gpio-ranges = <&pinctrl 0 32 32>; #gpio-cells = <2>; interrupt-controller; @@ -1077,6 +1079,7 @@ clocks = <&cru PCLK_GPIO2>; gpio-controller; + gpio-ranges = <&pinctrl 0 64 32>; #gpio-cells = <2>; interrupt-controller; @@ -1090,6 +1093,7 @@ clocks = <&cru PCLK_GPIO3>; gpio-controller; + gpio-ranges = <&pinctrl 0 96 32>; #gpio-cells = <2>; interrupt-controller; diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi index a4c5aaf1f..5a008ed18 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi @@ -984,6 +984,7 @@ interrupts = ; gpio-controller; + gpio-ranges = <&pinctrl 0 0 32>; #gpio-cells = <0x2>; interrupt-controller; @@ -997,6 +998,7 @@ interrupts = ; gpio-controller; + gpio-ranges = <&pinctrl 0 32 32>; #gpio-cells = <0x2>; interrupt-controller; @@ -1010,6 +1012,7 @@ interrupts = ; gpio-controller; + gpio-ranges = <&pinctrl 0 64 32>; #gpio-cells = <0x2>; interrupt-controller; @@ -1023,6 +1026,7 @@ interrupts = ; gpio-controller; + gpio-ranges = <&pinctrl 0 96 32>; #gpio-cells = <0x2>; interrupt-controller; diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index 1881b4b71..7eb96fcc6 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -2091,6 +2091,7 @@ interrupts = ; gpio-controller; + gpio-ranges = <&pinctrl 0 0 32>; #gpio-cells = <0x2>; interrupt-controller; @@ -2104,6 +2105,7 @@ interrupts = ; gpio-controller; + gpio-ranges = <&pinctrl 0 32 32>; #gpio-cells = <0x2>; interrupt-controller; @@ -2117,6 +2119,7 @@ interrupts = ; gpio-controller; + gpio-ranges = <&pinctrl 0 64 32>; #gpio-cells = <0x2>; interrupt-controller; @@ -2130,6 +2133,7 @@ interrupts = ; gpio-controller; + gpio-ranges = <&pinctrl 0 96 32>; #gpio-cells = <0x2>; interrupt-controller; @@ -2143,6 +2147,7 @@ interrupts = ; gpio-controller; + gpio-ranges = <&pinctrl 0 128 32>; #gpio-cells = <0x2>; interrupt-controller; diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi index eed0059a6..870b4d9c6 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi @@ -1808,6 +1808,7 @@ interrupts = ; clocks = <&pmucru PCLK_GPIO0>, <&pmucru DBCLK_GPIO0>; gpio-controller; + gpio-ranges = <&pinctrl 0 0 32>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; @@ -1819,6 +1820,7 @@ interrupts = ; clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>; gpio-controller; + gpio-ranges = <&pinctrl 0 32 32>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; @@ -1830,6 +1832,7 @@ interrupts = ; clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>; gpio-controller; + gpio-ranges = <&pinctrl 0 64 32>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; @@ -1841,6 +1844,7 @@ interrupts = ; clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>; gpio-controller; + gpio-ranges = <&pinctrl 0 96 32>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; @@ -1852,6 +1856,7 @@ interrupts = ; clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>; gpio-controller; + gpio-ranges = <&pinctrl 0 128 32>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; From patchwork Sat Jan 21 11:09:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Jonker X-Patchwork-Id: 645252 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 09FD1C38141 for ; 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[81.204.249.205]) by smtp.gmail.com with ESMTPSA id d9-20020a1709063ec900b007bd9e683639sm19101456ejj.130.2023.01.21.03.09.27 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 21 Jan 2023 03:09:28 -0800 (PST) Message-ID: Date: Sat, 21 Jan 2023 12:09:27 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.3.0 From: Johan Jonker Subject: [PATCH v2 6/8] ARM: dts: rockchip: replace compatible gpio nodes To: linus.walleij@linaro.org, brgl@bgdev.pl Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, heiko@sntech.de, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kever.yang@rock-chips.com, sjg@chromium.org, philipp.tomsich@vrull.eu, john@metanate.com, quentin.schulz@theobroma-systems.com References: <03627216-54b5-5d9b-f91d-adcd637819e3@gmail.com> Content-Language: en-US In-Reply-To: <03627216-54b5-5d9b-f91d-adcd637819e3@gmail.com> Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Currently all Rockchip gpio nodes have the same compatible. Compatible strings should be SoC related. Signed-off-by: Johan Jonker --- arch/arm/boot/dts/rk3036.dtsi | 6 +++--- arch/arm/boot/dts/rk3066a.dtsi | 12 ++++++------ arch/arm/boot/dts/rk3128.dtsi | 8 ++++---- arch/arm/boot/dts/rk3188.dtsi | 6 +++--- arch/arm/boot/dts/rk322x.dtsi | 8 ++++---- arch/arm/boot/dts/rk3288.dtsi | 18 +++++++++--------- arch/arm/boot/dts/rv1108.dtsi | 8 ++++---- arch/arm/boot/dts/rv1126.dtsi | 10 +++++----- 8 files changed, 38 insertions(+), 38 deletions(-) -- 2.20.1 diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi index d99e4ea31..eed21e055 100644 --- a/arch/arm/boot/dts/rk3036.dtsi +++ b/arch/arm/boot/dts/rk3036.dtsi @@ -576,7 +576,7 @@ ranges; gpio0: gpio@2007c000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3036-gpio-bank", "rockchip,gpio-bank"; reg = <0x2007c000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO0>; @@ -590,7 +590,7 @@ }; gpio1: gpio@20080000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3036-gpio-bank", "rockchip,gpio-bank"; reg = <0x20080000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO1>; @@ -604,7 +604,7 @@ }; gpio2: gpio@20084000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3036-gpio-bank", "rockchip,gpio-bank"; reg = <0x20084000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO2>; diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi index 6ff392735..4d7cf6f1b 100644 --- a/arch/arm/boot/dts/rk3066a.dtsi +++ b/arch/arm/boot/dts/rk3066a.dtsi @@ -274,7 +274,7 @@ ranges; gpio0: gpio@20034000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank"; reg = <0x20034000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO0>; @@ -288,7 +288,7 @@ }; gpio1: gpio@2003c000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank"; reg = <0x2003c000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO1>; @@ -302,7 +302,7 @@ }; gpio2: gpio@2003e000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank"; reg = <0x2003e000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO2>; @@ -316,7 +316,7 @@ }; gpio3: gpio@20080000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank"; reg = <0x20080000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO3>; @@ -330,7 +330,7 @@ }; gpio4: gpio@20084000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank"; reg = <0x20084000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO4>; @@ -344,7 +344,7 @@ }; gpio6: gpio@2000a000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank"; reg = <0x2000a000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO6>; diff --git a/arch/arm/boot/dts/rk3128.dtsi b/arch/arm/boot/dts/rk3128.dtsi index 0ea277eb7..221f6d6ca 100644 --- a/arch/arm/boot/dts/rk3128.dtsi +++ b/arch/arm/boot/dts/rk3128.dtsi @@ -471,7 +471,7 @@ ranges; gpio0: gpio@2007c000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3128-gpio-bank", "rockchip,gpio-bank"; reg = <0x2007c000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO0>; @@ -483,7 +483,7 @@ }; gpio1: gpio@20080000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3128-gpio-bank", "rockchip,gpio-bank"; reg = <0x20080000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO1>; @@ -495,7 +495,7 @@ }; gpio2: gpio@20084000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3128-gpio-bank", "rockchip,gpio-bank"; reg = <0x20084000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO2>; @@ -507,7 +507,7 @@ }; gpio3: gpio@20088000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3128-gpio-bank", "rockchip,gpio-bank"; reg = <0x20088000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO3>; diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi index 6677e4a10..22187d4c7 100644 --- a/arch/arm/boot/dts/rk3188.dtsi +++ b/arch/arm/boot/dts/rk3188.dtsi @@ -239,7 +239,7 @@ }; gpio1: gpio@2003c000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3188-gpio-bank", "rockchip,gpio-bank"; reg = <0x2003c000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO1>; @@ -253,7 +253,7 @@ }; gpio2: gpio@2003e000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3188-gpio-bank", "rockchip,gpio-bank"; reg = <0x2003e000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO2>; @@ -267,7 +267,7 @@ }; gpio3: gpio@20080000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3188-gpio-bank", "rockchip,gpio-bank"; reg = <0x20080000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO3>; diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi index a87db48c5..8dc30e45c 100644 --- a/arch/arm/boot/dts/rk322x.dtsi +++ b/arch/arm/boot/dts/rk322x.dtsi @@ -949,7 +949,7 @@ ranges; gpio0: gpio@11110000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3228-gpio-bank", "rockchip,gpio-bank"; reg = <0x11110000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO0>; @@ -964,7 +964,7 @@ }; gpio1: gpio@11120000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3228-gpio-bank", "rockchip,gpio-bank"; reg = <0x11120000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO1>; @@ -979,7 +979,7 @@ }; gpio2: gpio@11130000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3228-gpio-bank", "rockchip,gpio-bank"; reg = <0x11130000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO2>; @@ -994,7 +994,7 @@ }; gpio3: gpio@11140000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3228-gpio-bank", "rockchip,gpio-bank"; reg = <0x11140000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO3>; diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 20567ca98..3aff5955d 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -1425,7 +1425,7 @@ ranges; gpio0: gpio@ff750000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3288-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff750000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO0>; @@ -1439,7 +1439,7 @@ }; gpio1: gpio@ff780000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3288-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff780000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO1>; @@ -1453,7 +1453,7 @@ }; gpio2: gpio@ff790000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3288-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff790000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO2>; @@ -1467,7 +1467,7 @@ }; gpio3: gpio@ff7a0000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3288-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff7a0000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO3>; @@ -1481,7 +1481,7 @@ }; gpio4: gpio@ff7b0000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3288-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff7b0000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO4>; @@ -1495,7 +1495,7 @@ }; gpio5: gpio@ff7c0000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3288-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff7c0000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO5>; @@ -1509,7 +1509,7 @@ }; gpio6: gpio@ff7d0000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3288-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff7d0000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO6>; @@ -1523,7 +1523,7 @@ }; gpio7: gpio@ff7e0000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3288-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff7e0000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO7>; @@ -1537,7 +1537,7 @@ }; gpio8: gpio@ff7f0000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3288-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff7f0000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO8>; diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi index d12b97ee7..49c33a393 100644 --- a/arch/arm/boot/dts/rv1108.dtsi +++ b/arch/arm/boot/dts/rv1108.dtsi @@ -596,7 +596,7 @@ ranges; gpio0: gpio@20030000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rv1108-gpio-bank", "rockchip,gpio-bank"; reg = <0x20030000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO0_PMU>; @@ -610,7 +610,7 @@ }; gpio1: gpio@10310000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rv1108-gpio-bank", "rockchip,gpio-bank"; reg = <0x10310000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO1>; @@ -624,7 +624,7 @@ }; gpio2: gpio@10320000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rv1108-gpio-bank", "rockchip,gpio-bank"; reg = <0x10320000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO2>; @@ -638,7 +638,7 @@ }; gpio3: gpio@10330000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rv1108-gpio-bank", "rockchip,gpio-bank"; reg = <0x10330000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO3>; diff --git a/arch/arm/boot/dts/rv1126.dtsi b/arch/arm/boot/dts/rv1126.dtsi index 68e820221..68759c59a 100644 --- a/arch/arm/boot/dts/rv1126.dtsi +++ b/arch/arm/boot/dts/rv1126.dtsi @@ -428,7 +428,7 @@ ranges; gpio0: gpio@ff460000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rv1126-gpio-bank", "rockchip,gpio-bank"; reg = <0xff460000 0x100>; interrupts = ; clocks = <&pmucru PCLK_GPIO0>, <&pmucru DBCLK_GPIO0>; @@ -440,7 +440,7 @@ }; gpio1: gpio@ff620000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rv1126-gpio-bank", "rockchip,gpio-bank"; reg = <0xff620000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>; @@ -452,7 +452,7 @@ }; gpio2: gpio@ff630000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rv1126-gpio-bank", "rockchip,gpio-bank"; reg = <0xff630000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>; @@ -464,7 +464,7 @@ }; gpio3: gpio@ff640000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rv1126-gpio-bank", "rockchip,gpio-bank"; reg = <0xff640000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>; @@ -476,7 +476,7 @@ }; gpio4: gpio@ff650000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rv1126-gpio-bank", "rockchip,gpio-bank"; reg = <0xff650000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>; 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[81.204.249.205]) by smtp.gmail.com with ESMTPSA id fg11-20020a056402548b00b004873927780bsm18304030edb.20.2023.01.21.03.09.43 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 21 Jan 2023 03:09:44 -0800 (PST) Message-ID: Date: Sat, 21 Jan 2023 12:09:43 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.3.0 From: Johan Jonker Subject: [PATCH v2 7/8] arm64: dts: rockchip: replace compatible gpio nodes To: linus.walleij@linaro.org, brgl@bgdev.pl Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, heiko@sntech.de, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kever.yang@rock-chips.com, sjg@chromium.org, philipp.tomsich@vrull.eu, john@metanate.com, quentin.schulz@theobroma-systems.com References: <03627216-54b5-5d9b-f91d-adcd637819e3@gmail.com> Content-Language: en-US In-Reply-To: <03627216-54b5-5d9b-f91d-adcd637819e3@gmail.com> Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Currently all Rockchip gpio nodes have the same compatible. Compatible strings should be SoC related. Signed-off-by: Johan Jonker --- arch/arm64/boot/dts/rockchip/px30.dtsi | 8 ++++---- arch/arm64/boot/dts/rockchip/rk3308.dtsi | 10 +++++----- arch/arm64/boot/dts/rockchip/rk3328.dtsi | 8 ++++---- arch/arm64/boot/dts/rockchip/rk3368.dtsi | 8 ++++---- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 10 +++++----- arch/arm64/boot/dts/rockchip/rk356x.dtsi | 10 +++++----- arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 10 +++++----- 7 files changed, 32 insertions(+), 32 deletions(-) -- 2.20.1 diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi index 9fcc0d0f3..5f8886623 100644 --- a/arch/arm64/boot/dts/rockchip/px30.dtsi +++ b/arch/arm64/boot/dts/rockchip/px30.dtsi @@ -1382,7 +1382,7 @@ ranges; gpio0: gpio@ff040000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,px30-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff040000 0x0 0x100>; interrupts = ; clocks = <&pmucru PCLK_GPIO0_PMU>; @@ -1395,7 +1395,7 @@ }; gpio1: gpio@ff250000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,px30-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff250000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO1>; @@ -1408,7 +1408,7 @@ }; gpio2: gpio@ff260000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,px30-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff260000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO2>; @@ -1421,7 +1421,7 @@ }; gpio3: gpio@ff270000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,px30-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff270000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO3>; diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi index 38976f413..1e5742441 100644 --- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi @@ -793,7 +793,7 @@ ranges; gpio0: gpio@ff220000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3308-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff220000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO0>; @@ -805,7 +805,7 @@ }; gpio1: gpio@ff230000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3308-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff230000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO1>; @@ -817,7 +817,7 @@ }; gpio2: gpio@ff240000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3308-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff240000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO2>; @@ -829,7 +829,7 @@ }; gpio3: gpio@ff250000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3308-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff250000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO3>; @@ -841,7 +841,7 @@ }; gpio4: gpio@ff260000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3308-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff260000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO4>; diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi index 7ba695728..b99bef14f 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi @@ -1045,7 +1045,7 @@ ranges; gpio0: gpio@ff210000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3328-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff210000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO0>; @@ -1059,7 +1059,7 @@ }; gpio1: gpio@ff220000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3328-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff220000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO1>; @@ -1073,7 +1073,7 @@ }; gpio2: gpio@ff230000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3328-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff230000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO2>; @@ -1087,7 +1087,7 @@ }; gpio3: gpio@ff240000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3328-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff240000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO3>; diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi index 5a008ed18..1ece57343 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi @@ -978,7 +978,7 @@ ranges; gpio0: gpio@ff750000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3368-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff750000 0x0 0x100>; clocks = <&cru PCLK_GPIO0>; interrupts = ; @@ -992,7 +992,7 @@ }; gpio1: gpio@ff780000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3368-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff780000 0x0 0x100>; clocks = <&cru PCLK_GPIO1>; interrupts = ; @@ -1006,7 +1006,7 @@ }; gpio2: gpio@ff790000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3368-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff790000 0x0 0x100>; clocks = <&cru PCLK_GPIO2>; interrupts = ; @@ -1020,7 +1020,7 @@ }; gpio3: gpio@ff7a0000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3368-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff7a0000 0x0 0x100>; clocks = <&cru PCLK_GPIO3>; interrupts = ; diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index 7eb96fcc6..e60917fff 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -2085,7 +2085,7 @@ ranges; gpio0: gpio@ff720000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3399-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff720000 0x0 0x100>; clocks = <&pmucru PCLK_GPIO0_PMU>; interrupts = ; @@ -2099,7 +2099,7 @@ }; gpio1: gpio@ff730000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3399-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff730000 0x0 0x100>; clocks = <&pmucru PCLK_GPIO1_PMU>; interrupts = ; @@ -2113,7 +2113,7 @@ }; gpio2: gpio@ff780000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3399-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff780000 0x0 0x100>; clocks = <&cru PCLK_GPIO2>; interrupts = ; @@ -2127,7 +2127,7 @@ }; gpio3: gpio@ff788000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3399-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff788000 0x0 0x100>; clocks = <&cru PCLK_GPIO3>; interrupts = ; @@ -2141,7 +2141,7 @@ }; gpio4: gpio@ff790000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3399-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff790000 0x0 0x100>; clocks = <&cru PCLK_GPIO4>; interrupts = ; diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi index 870b4d9c6..892afccfd 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi @@ -1803,7 +1803,7 @@ ranges; gpio0: gpio@fdd60000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3568-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xfdd60000 0x0 0x100>; interrupts = ; clocks = <&pmucru PCLK_GPIO0>, <&pmucru DBCLK_GPIO0>; @@ -1815,7 +1815,7 @@ }; gpio1: gpio@fe740000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3568-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xfe740000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>; @@ -1827,7 +1827,7 @@ }; gpio2: gpio@fe750000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3568-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xfe750000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>; @@ -1839,7 +1839,7 @@ }; gpio3: gpio@fe760000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3568-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xfe760000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>; @@ -1851,7 +1851,7 @@ }; gpio4: gpio@fe770000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3568-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xfe770000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>; diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi index 005cde61b..09bd4a508 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi @@ -1639,7 +1639,7 @@ #size-cells = <2>; gpio0: gpio@fd8a0000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3588-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xfd8a0000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO0>, <&cru DBCLK_GPIO0>; @@ -1651,7 +1651,7 @@ }; gpio1: gpio@fec20000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3588-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xfec20000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>; @@ -1663,7 +1663,7 @@ }; gpio2: gpio@fec30000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3588-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xfec30000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>; @@ -1675,7 +1675,7 @@ }; gpio3: gpio@fec40000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3588-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xfec40000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>; @@ -1687,7 +1687,7 @@ }; gpio4: gpio@fec50000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3588-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xfec50000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>; From patchwork Sat Jan 21 11:10:03 2023 Content-Type: text/plain; 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[81.204.249.205]) by smtp.gmail.com with ESMTPSA id kv23-20020a17090778d700b008699bacc03csm11898900ejc.14.2023.01.21.03.10.03 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 21 Jan 2023 03:10:04 -0800 (PST) Message-ID: <0266aabd-2991-2958-ab1e-55f58ab14461@gmail.com> Date: Sat, 21 Jan 2023 12:10:03 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.3.0 From: Johan Jonker Subject: [PATCH v2 8/8] ARM: dts: rockchip: rk3066a: move gpio nodes to root To: linus.walleij@linaro.org, brgl@bgdev.pl Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, heiko@sntech.de, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kever.yang@rock-chips.com, sjg@chromium.org, philipp.tomsich@vrull.eu, john@metanate.com, quentin.schulz@theobroma-systems.com References: <03627216-54b5-5d9b-f91d-adcd637819e3@gmail.com> Content-Language: en-US In-Reply-To: <03627216-54b5-5d9b-f91d-adcd637819e3@gmail.com> Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The relation between gpio and pinctrl is now described by the gpio-ranges property. Move rk3066a gpio nodes to root. Signed-off-by: Johan Jonker --- arch/arm/boot/dts/rk3066a.dtsi | 159 +++++++++++++++------------------ 1 file changed, 72 insertions(+), 87 deletions(-) -- 2.20.1 diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi index 4d7cf6f1b..ac329cf14 100644 --- a/arch/arm/boot/dts/rk3066a.dtsi +++ b/arch/arm/boot/dts/rk3066a.dtsi @@ -217,6 +217,18 @@ <150000000>, <75000000>; }; + gpio6: gpio@2000a000 { + compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank"; + reg = <0x2000a000 0x100>; + interrupts = ; + clocks = <&cru PCLK_GPIO6>; + gpio-controller; + gpio-ranges = <&pinctrl 0 192 32>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + timer2: timer@2000e000 { compatible = "snps,dw-apb-timer"; reg = <0x2000e000 0x100>; @@ -238,6 +250,18 @@ }; }; + gpio0: gpio@20034000 { + compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank"; + reg = <0x20034000 0x100>; + interrupts = ; + clocks = <&cru PCLK_GPIO0>; + gpio-controller; + gpio-ranges = <&pinctrl 0 0 32>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + timer0: timer@20038000 { compatible = "snps,dw-apb-timer"; reg = <0x20038000 0x100>; @@ -254,6 +278,30 @@ clock-names = "timer", "pclk"; }; + gpio1: gpio@2003c000 { + compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank"; + reg = <0x2003c000 0x100>; + interrupts = ; + clocks = <&cru PCLK_GPIO1>; + gpio-controller; + gpio-ranges = <&pinctrl 0 32 32>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio2: gpio@2003e000 { + compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank"; + reg = <0x2003e000 0x100>; + interrupts = ; + clocks = <&cru PCLK_GPIO2>; + gpio-controller; + gpio-ranges = <&pinctrl 0 64 32>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + tsadc: tsadc@20060000 { compatible = "rockchip,rk3066-tsadc"; reg = <0x20060000 0x100>; @@ -266,96 +314,33 @@ status = "disabled"; }; + gpio3: gpio@20080000 { + compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank"; + reg = <0x20080000 0x100>; + interrupts = ; + clocks = <&cru PCLK_GPIO3>; + gpio-controller; + gpio-ranges = <&pinctrl 0 96 32>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio4: gpio@20084000 { + compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank"; + reg = <0x20084000 0x100>; + interrupts = ; + clocks = <&cru PCLK_GPIO4>; + gpio-controller; + gpio-ranges = <&pinctrl 0 128 32>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + pinctrl: pinctrl { compatible = "rockchip,rk3066a-pinctrl"; rockchip,grf = <&grf>; - #address-cells = <1>; - #size-cells = <1>; - ranges; - - gpio0: gpio@20034000 { - compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank"; - reg = <0x20034000 0x100>; - interrupts = ; - clocks = <&cru PCLK_GPIO0>; - - gpio-controller; - gpio-ranges = <&pinctrl 0 0 32>; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio1: gpio@2003c000 { - compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank"; - reg = <0x2003c000 0x100>; - interrupts = ; - clocks = <&cru PCLK_GPIO1>; - - gpio-controller; - gpio-ranges = <&pinctrl 0 32 32>; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio2: gpio@2003e000 { - compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank"; - reg = <0x2003e000 0x100>; - interrupts = ; - clocks = <&cru PCLK_GPIO2>; - - gpio-controller; - gpio-ranges = <&pinctrl 0 64 32>; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio3: gpio@20080000 { - compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank"; - reg = <0x20080000 0x100>; - interrupts = ; - clocks = <&cru PCLK_GPIO3>; - - gpio-controller; - gpio-ranges = <&pinctrl 0 96 32>; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio4: gpio@20084000 { - compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank"; - reg = <0x20084000 0x100>; - interrupts = ; - clocks = <&cru PCLK_GPIO4>; - - gpio-controller; - gpio-ranges = <&pinctrl 0 128 32>; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio6: gpio@2000a000 { - compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank"; - reg = <0x2000a000 0x100>; - interrupts = ; - clocks = <&cru PCLK_GPIO6>; - - gpio-controller; - gpio-ranges = <&pinctrl 0 192 32>; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; pcfg_pull_default: pcfg-pull-default { bias-pull-pin-default;