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[93.34.92.88]) by smtp.googlemail.com with ESMTPSA id h11-20020a05600c314b00b003db2e3f2c7csm5284292wmo.0.2023.01.20.16.01.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Jan 2023 16:01:52 -0800 (PST) From: Christian Marangi To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Ilia Lin , "Rafael J. Wysocki" , Viresh Kumar , Rob Herring , Krzysztof Kozlowski , Nishanth Menon , Stephen Boyd , Yassine Oudjana , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Christian Marangi Subject: [PATCH 1/3] dt-bindings: cpufreq: qcom-cpufreq-nvmem: make cpr bindings optional Date: Sat, 21 Jan 2023 01:01:44 +0100 Message-Id: <20230121000146.7809-1-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.38.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The qcom-cpufreq-nvmem driver also supports legacy devices pre-cpr that doesn't have power-domains. When the schema was introduced, it was wrongly set to always require these binding but this is not the case for legacy device that base everything on nvmem cells and multiple microvolt binding providing values based on speedbin, psv and version. Make the power-domain optional and set them required only for qcs404 based devices. Fixes: ec24d1d55469 ("dt-bindings: opp: Convert qcom-nvmem-cpufreq to DT schema") Signed-off-by: Christian Marangi --- .../bindings/cpufreq/qcom-cpufreq-nvmem.yaml | 78 +++++++++++++------ 1 file changed, 54 insertions(+), 24 deletions(-) diff --git a/Documentation/devicetree/bindings/cpufreq/qcom-cpufreq-nvmem.yaml b/Documentation/devicetree/bindings/cpufreq/qcom-cpufreq-nvmem.yaml index 9c086eac6ca7..04aac634d7fc 100644 --- a/Documentation/devicetree/bindings/cpufreq/qcom-cpufreq-nvmem.yaml +++ b/Documentation/devicetree/bindings/cpufreq/qcom-cpufreq-nvmem.yaml @@ -17,6 +17,9 @@ description: | on the CPU OPP in use. The CPUFreq driver sets the CPR power domain level according to the required OPPs defined in the CPU OPP tables. + For old implementation efuses are parsed to select the correct opp table and + voltage and CPR is not supported/used. + select: properties: compatible: @@ -33,37 +36,64 @@ select: required: - compatible -properties: - cpus: - type: object +if: + properties: + compatible: + contains: + enum: + - qcom,qcs404 - patternProperties: - '^cpu@[0-9a-f]+$': - type: object +then: + properties: + cpus: + type: object - properties: - power-domains: - maxItems: 1 + patternProperties: + '^cpu@[0-9a-f]+$': + type: object + + properties: + power-domains: + maxItems: 1 - power-domain-names: - items: - - const: cpr + power-domain-names: + items: + - const: cpr - required: - - power-domains - - power-domain-names + required: + - power-domains + - power-domain-names + + patternProperties: + '^opp-table(-[a-z0-9]+)?$': + if: + properties: + compatible: + const: operating-points-v2-kryo-cpu + then: + patternProperties: + '^opp-?[0-9]+$': + required: + - required-opps patternProperties: '^opp-table(-[a-z0-9]+)?$': - if: - properties: - compatible: - const: operating-points-v2-kryo-cpu - then: - patternProperties: - '^opp-?[0-9]+$': - required: - - required-opps + allOf: + - if: + properties: + compatible: + const: operating-points-v2-kryo-cpu + then: + $ref: /schemas/opp/opp-v2-kryo-cpu.yaml# + + - if: + properties: + compatible: + const: operating-points-v2-qcom-level + then: + $ref: /schemas/opp/opp-v2-qcom-level.yaml# + + unevaluatedProperties: false additionalProperties: true From patchwork Sat Jan 21 00:01:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 644901 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9C7F6C52D11 for ; Sat, 21 Jan 2023 00:01:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229764AbjAUAB5 (ORCPT ); Fri, 20 Jan 2023 19:01:57 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43478 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229523AbjAUAB4 (ORCPT ); Fri, 20 Jan 2023 19:01:56 -0500 Received: from mail-wm1-x336.google.com (mail-wm1-x336.google.com [IPv6:2a00:1450:4864:20::336]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DDD6E8B745; Fri, 20 Jan 2023 16:01:55 -0800 (PST) Received: by mail-wm1-x336.google.com with SMTP id l8so5218199wms.3; Fri, 20 Jan 2023 16:01:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=zd8X1w31p03LQ0JCvCdaSsk+BBXGwn/BPzQzqQpcm5U=; b=M6mW/VOyceIQU6kCUiqbPhsj390voQEygv7Xj7G/EX8aHytisKgnuyyHVCcMAEhl2c qvFRTzkHmqwxGaUbuggPsI2qm985n8Mm+y2XeAlof1TyLCDIWTYJFxdvD+QhVV+HfiEz Xb2emrjNNYupzLmYVcp4zOU/v6Jipdi20YSqkfu/P6IOQc/eDL6ecGiWabGMRuI6Nx6g DZWLwR76BATF8xH5vFmiqgm11Jd/VCRt+HIiJWo/6drEroHVQ8eGoN2P6jIMu4qeQhde 3zNZ9Vh1ukdMJ8F1tDsXj4A3GK2Lljn5bZ7GAdDZo0J31UvON2W28p+p7eYjOEfOdUek c4Gg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=zd8X1w31p03LQ0JCvCdaSsk+BBXGwn/BPzQzqQpcm5U=; b=Kw0jhchT7cC2GzjBeYRtc06UQvnZqI8ZNtHvMfawXcPr0fpW4zjyhu2YWyXQHB+hZP X3ukiFyjB0NHae9eudfPEa589g94I8ooat0KLc7J7nWFCs11GWQL4Hq1BHzJ8I8UHY1V x6Ozz11BK6HNaZelmARer1mN9yi5uHPrnJurZCNzKTSF6zNfchuMFdjN+XIjQlfcHmot OZRdYgBT9kS1HEvtsB46FSOO2x3SijxSfWtTLgZgA/CDtPj1XhILOERQn1O/M++ZSuCL bLLzpTxzLPjhhYTG7/eK72EVK8EclJK2EYh3uX7296/xs2Sgnldgmnkf51m95jnIar1R 0Gew== X-Gm-Message-State: AFqh2kpib5I2oXFz6gE+n1s7lelXIG2CPtjELIBTkGt2zuNj8a+m/W9G nfNzHe/W+9+0UVavh6r1Yt0D4NkIZ9E= X-Google-Smtp-Source: AMrXdXuYxoqI6p90pT35ZxeGJDEQ9mmGhNkEEZL6jHIzpZhm55SA6ZRINh+VoLsTszG9hQQAaHc68A== X-Received: by 2002:a05:600c:4a27:b0:3da:fae5:7e2f with SMTP id c39-20020a05600c4a2700b003dafae57e2fmr16019245wmp.3.1674259314228; Fri, 20 Jan 2023 16:01:54 -0800 (PST) Received: from localhost.localdomain (93-34-92-88.ip49.fastwebnet.it. [93.34.92.88]) by smtp.googlemail.com with ESMTPSA id h11-20020a05600c314b00b003db2e3f2c7csm5284292wmo.0.2023.01.20.16.01.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Jan 2023 16:01:53 -0800 (PST) From: Christian Marangi To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Ilia Lin , "Rafael J. Wysocki" , Viresh Kumar , Rob Herring , Krzysztof Kozlowski , Nishanth Menon , Stephen Boyd , Yassine Oudjana , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Christian Marangi Subject: [PATCH 2/3] dt-bindings: opp: opp-v2-kryo-cpu: add opp-microvolt nvmem based Date: Sat, 21 Jan 2023 01:01:45 +0100 Message-Id: <20230121000146.7809-2-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230121000146.7809-1-ansuelsmth@gmail.com> References: <20230121000146.7809-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The operating-points-v2-kryo-cpu driver supports defining multiple opp-microvolt based on the blown efuses in the soc. It consist of 3 values that are parsed: speedbin, psv and version. They are all appended to the opp-microvolt name and selected by the nvmem driver and loaded dynamically at runtime. Example: opp-microvolt-speed0-pvs0-v0 = <1050000 997500 1102500>; opp-microvolt-speed0-pvs1-v0 = <975000 926250 1023750>; opp-microvolt-speed0-pvs2-v0 = <925000 878750 971250>; opp-microvolt-speed0-pvs3-v0 = <850000 807500 892500>; Add support for this and reject these special binding if we don't have a nvmem-cell to read data from. Signed-off-by: Christian Marangi --- .../devicetree/bindings/opp/opp-v2-kryo-cpu.yaml | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml b/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml index b4947b326773..cea932339faf 100644 --- a/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml +++ b/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml @@ -61,6 +61,17 @@ patternProperties: required-opps: true + patternProperties: + '^opp-microvolt-speed[0-9]-pvs[0-9]-v[0-9]$': + description: | + Assign a microvolt value to the opp hz based on the efuses value from + speedbin, pvs and version value read from the provided nvmem cell. + minItems: 1 + maxItems: 8 # Should be enough regulators + items: + minItems: 1 + maxItems: 3 + required: - opp-hz @@ -75,6 +86,11 @@ then: '^opp-?[0-9]+$': required: - opp-supported-hw +else: + patternProperties: + '^opp-?[0-9]+$': + patternProperties: + '^opp-microvolt-speed[0-9]-pvs[0-9]-v[0-9]$': false additionalProperties: false From patchwork Sat Jan 21 00:01:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 644900 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AEA55C54737 for ; Sat, 21 Jan 2023 00:02:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229877AbjAUAB7 (ORCPT ); Fri, 20 Jan 2023 19:01:59 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43484 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229780AbjAUAB5 (ORCPT ); Fri, 20 Jan 2023 19:01:57 -0500 Received: from mail-wm1-x331.google.com (mail-wm1-x331.google.com [IPv6:2a00:1450:4864:20::331]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C91138B753; Fri, 20 Jan 2023 16:01:56 -0800 (PST) Received: by mail-wm1-x331.google.com with SMTP id q10-20020a1cf30a000000b003db0edfdb74so1639315wmq.1; Fri, 20 Jan 2023 16:01:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=0ogL/1lSUlkuM5blt1CF8xgQb3CjQ2KzCvYZsa2SRR4=; b=evrm8fT/Kwu45Vp+aemRE5zqqp7ggtVo8Ps1wtNglPyWMeHF63ePTlgrUZQ9viVblW GTGge4PNNEC9bRo1l4jpE/eJc/jGolUTAZ4oiQWSP5d9D8CN1/zXoDrY//Fcc3RE+AXy YZFTM0OXU6Y6y8YTLuOCF166yVzqay+8/Ae+dQ0AFviC2MXKRD0UY47etrQL3xqdenjX VAPUzJnaK/xlXx/ybEUKOX7zmW1shQ/WbIeuY1BGRH5JYJ8iJNueWZlU+oynSkr2RLuA T8JUUQXbGfZXM+4icMDk69Lc7dDoMXGrIorMkg69QgDkDbePRNxwLynqlfPt93FRyVSm rkgw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=0ogL/1lSUlkuM5blt1CF8xgQb3CjQ2KzCvYZsa2SRR4=; b=InaKtcafF2yO1w/LiRnPCuhGPtv0q35NM+dNT86C6UymeAFCdDCG2WpwaMYpF499ML cmXhsLM8nxRgsLVSXXiNHQ8+VVR9TuX8s9R6Y4kZwF/6lleMeiv4STx32b97lMMlMrF2 SmNgda6U2zsq/TrzxPY2cuqFq46cvoF1M/cXgE4UgRVhoC7nIcEY3qZ1Wx/jQjei+QQC Ogu9Iqn/IxG6HHiGVIWgdaxseP6ROtVl3tHWhLcUIEjPcbzfaw2EwAhnZ1vx96c33oaD NqIA29BKzoMAmwSXW5SjXBTeljOIVwE4+FlnH389LQnRszZzXvdHIMh356rstsaTELmm XX3A== X-Gm-Message-State: AFqh2kry7XaQhc7FEmp44gZgUYIETcQno19gmenOBVkkI6sKMcDfh2RW ZR0+eDrw0njLRci72lhqeWM= X-Google-Smtp-Source: AMrXdXskIekwssjYf6UOlU07IJ2OwDZ/ncq/l6EMFJqKhTAczBKb+Q/Rw+oKkR5Sxac9CGOc724cuQ== X-Received: by 2002:a05:600c:ad0:b0:3d9:ebab:ccff with SMTP id c16-20020a05600c0ad000b003d9ebabccffmr24307431wmr.33.1674259315287; Fri, 20 Jan 2023 16:01:55 -0800 (PST) Received: from localhost.localdomain (93-34-92-88.ip49.fastwebnet.it. [93.34.92.88]) by smtp.googlemail.com with ESMTPSA id h11-20020a05600c314b00b003db2e3f2c7csm5284292wmo.0.2023.01.20.16.01.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Jan 2023 16:01:54 -0800 (PST) From: Christian Marangi To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Ilia Lin , "Rafael J. Wysocki" , Viresh Kumar , Rob Herring , Krzysztof Kozlowski , Nishanth Menon , Stephen Boyd , Yassine Oudjana , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Christian Marangi Subject: [PATCH 3/3] dt-bindings: opp: opp-v2-kryo-cpu: enlarge opp-supported-hw maximum Date: Sat, 21 Jan 2023 01:01:46 +0100 Message-Id: <20230121000146.7809-3-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230121000146.7809-1-ansuelsmth@gmail.com> References: <20230121000146.7809-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Enlarge opp-supported-hw maximum value. In recent SoC we started matching more bit and we currently match mask of 112. The old maximum of 7 was good for old SoC that didn't had complex id, but now this is limiting and we need to enlarge it to support more variants. Signed-off-by: Christian Marangi --- Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml b/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml index cea932339faf..b4ebaf68b43e 100644 --- a/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml +++ b/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml @@ -55,7 +55,7 @@ patternProperties: 1: MSM8996, speedbin 1 2: MSM8996, speedbin 2 3-31: unused - maximum: 0x7 + maximum: 0xff clock-latency-ns: true