From patchwork Mon Jan 16 19:43:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Brown X-Patchwork-Id: 643944 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B17EAC677F1 for ; Mon, 16 Jan 2023 19:44:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233684AbjAPTo3 (ORCPT ); Mon, 16 Jan 2023 14:44:29 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50920 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233710AbjAPToW (ORCPT ); Mon, 16 Jan 2023 14:44:22 -0500 Received: from mail-pj1-x1029.google.com (mail-pj1-x1029.google.com [IPv6:2607:f8b0:4864:20::1029]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 729C02C66C for ; Mon, 16 Jan 2023 11:44:21 -0800 (PST) Received: by mail-pj1-x1029.google.com with SMTP id u1-20020a17090a450100b0022936a63a21so8399059pjg.4 for ; Mon, 16 Jan 2023 11:44:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=schmorgal.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=03eAFj9VhLKHE3IgtLCemPDAW1kmJII0gHscpQ7Af5w=; b=TuLm9d3XeRr8ZnhaDhDfmRkXJoUBNzb3BPP4l4llD4jUZTBF1yQzV8ZivgqwjutmXI oolOIQbwHi9sH9TzxQiylM9TEbFrj44rWpLmZNZuZiXvpzIFHKG5LZLMUmiBYkz94gZh 2rDMh/ecuA9TYwO+texE1tjGK0/p1IoDdTCtU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=03eAFj9VhLKHE3IgtLCemPDAW1kmJII0gHscpQ7Af5w=; b=tdgzf71ddjGWrEpkNaJRzS8/AWkag2vzQ1IXq95PG/yrxSiJQRVSsnM84LlwYxHyhS gumsz4OOfXqMjP3SGusS1/oaasYhqUHfAZ5lnR1Z8PJakmmaq/ewsuGxwd7cTfeVfFzE Y+ySV+8Xsw5dGcf1r23epTPnyZ/u+OsAGY07R8WyCfOo648kYxJZD6iME4klQGe2JlWT cTRj6mAiXIbQhd6AtJdcFvBTKHLlbj/t38RZc2PJZPrJHEn57V80nmvWpGRYjlioAeBy DUavc89RwV4VtSrLWpQaqUSD56mlmJ4FWwWAFiNV4z/lK+jo9HQslwWwc/NikLTFq9Pd Rilg== X-Gm-Message-State: AFqh2kpbF0FpJ8+GqAGRvPU5iD/3h8R4kaB7a8phFiv2MkJYRcwA9CCL kKqwORc/gKgvQja1spUKal4c9U+VJhQn50zcSde3lw== X-Google-Smtp-Source: AMrXdXsi6O1q2cGPf1xvJLNedp6DYNMEJoZGllLmxyWO9BkE7pQvlCL6Y+SXst53RoRLUS7rBcrXTA== X-Received: by 2002:a17:902:8b81:b0:194:87e1:41a with SMTP id ay1-20020a1709028b8100b0019487e1041amr834985plb.42.1673898260834; Mon, 16 Jan 2023 11:44:20 -0800 (PST) Received: from doug-ryzen-5700G.. ([192.183.212.197]) by smtp.gmail.com with ESMTPSA id t13-20020a170902b20d00b001926a76e8absm19734663plr.114.2023.01.16.11.44.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Jan 2023 11:44:20 -0800 (PST) From: Doug Brown To: Ulf Hansson , Adrian Hunter Cc: Rob Herring , Krzysztof Kozlowski , linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, Doug Brown Subject: [PATCH v5 1/8] mmc: sdhci-pxav2: add initial support for PXA168 V1 controller Date: Mon, 16 Jan 2023 11:43:54 -0800 Message-Id: <20230116194401.20372-2-doug@schmorgal.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230116194401.20372-1-doug@schmorgal.com> References: <20230116194401.20372-1-doug@schmorgal.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org Add a new compatible string for the version 1 controller used in the PXA168, along with necessary quirks. Use a separate ops struct in preparation for a silicon bug workaround only necessary on V1. Signed-off-by: Doug Brown Acked-by: Adrian Hunter --- drivers/mmc/host/sdhci-pxav2.c | 40 +++++++++++++++++++++++++++------- 1 file changed, 32 insertions(+), 8 deletions(-) diff --git a/drivers/mmc/host/sdhci-pxav2.c b/drivers/mmc/host/sdhci-pxav2.c index f18906b5575f..5707d597ecae 100644 --- a/drivers/mmc/host/sdhci-pxav2.c +++ b/drivers/mmc/host/sdhci-pxav2.c @@ -101,6 +101,24 @@ static void pxav2_mmc_set_bus_width(struct sdhci_host *host, int width) writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL); } +struct sdhci_pxa_variant { + const struct sdhci_ops *ops; + unsigned int extra_quirks; +}; + +static const struct sdhci_ops pxav1_sdhci_ops = { + .set_clock = sdhci_set_clock, + .get_max_clock = sdhci_pltfm_clk_get_max_clock, + .set_bus_width = pxav2_mmc_set_bus_width, + .reset = pxav2_reset, + .set_uhs_signaling = sdhci_set_uhs_signaling, +}; + +static const struct sdhci_pxa_variant __maybe_unused pxav1_variant = { + .ops = &pxav1_sdhci_ops, + .extra_quirks = SDHCI_QUIRK_NO_BUSY_IRQ | SDHCI_QUIRK_32BIT_DMA_SIZE, +}; + static const struct sdhci_ops pxav2_sdhci_ops = { .set_clock = sdhci_set_clock, .get_max_clock = sdhci_pltfm_clk_get_max_clock, @@ -109,11 +127,14 @@ static const struct sdhci_ops pxav2_sdhci_ops = { .set_uhs_signaling = sdhci_set_uhs_signaling, }; +static const struct sdhci_pxa_variant pxav2_variant = { + .ops = &pxav2_sdhci_ops, +}; + #ifdef CONFIG_OF static const struct of_device_id sdhci_pxav2_of_match[] = { - { - .compatible = "mrvl,pxav2-mmc", - }, + { .compatible = "mrvl,pxav1-mmc", .data = &pxav1_variant, }, + { .compatible = "mrvl,pxav2-mmc", .data = &pxav2_variant, }, {}, }; MODULE_DEVICE_TABLE(of, sdhci_pxav2_of_match); @@ -157,7 +178,7 @@ static int sdhci_pxav2_probe(struct platform_device *pdev) struct sdhci_pxa_platdata *pdata = pdev->dev.platform_data; struct device *dev = &pdev->dev; struct sdhci_host *host = NULL; - const struct of_device_id *match; + const struct sdhci_pxa_variant *variant; int ret; struct clk *clk; @@ -185,10 +206,12 @@ static int sdhci_pxav2_probe(struct platform_device *pdev) | SDHCI_QUIRK_BROKEN_TIMEOUT_VAL | SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN; - match = of_match_device(of_match_ptr(sdhci_pxav2_of_match), &pdev->dev); - if (match) { + variant = of_device_get_match_data(dev); + if (variant) pdata = pxav2_get_mmc_pdata(dev); - } + else + variant = &pxav2_variant; + if (pdata) { if (pdata->flags & PXA_FLAG_CARD_PERMANENT) { /* on-chip device */ @@ -208,7 +231,8 @@ static int sdhci_pxav2_probe(struct platform_device *pdev) host->mmc->pm_caps |= pdata->pm_caps; } - host->ops = &pxav2_sdhci_ops; + host->quirks |= variant->extra_quirks; + host->ops = variant->ops; ret = sdhci_add_host(host); if (ret) From patchwork Mon Jan 16 19:43:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Brown X-Patchwork-Id: 643343 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 34860C54EBE for ; Mon, 16 Jan 2023 19:44:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232314AbjAPToe (ORCPT ); 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([192.183.212.197]) by smtp.gmail.com with ESMTPSA id t13-20020a170902b20d00b001926a76e8absm19734663plr.114.2023.01.16.11.44.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Jan 2023 11:44:31 -0800 (PST) From: Doug Brown To: Ulf Hansson , Adrian Hunter Cc: Rob Herring , Krzysztof Kozlowski , linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, Doug Brown Subject: [PATCH v5 2/8] mmc: sdhci-pxav2: enable CONFIG_MMC_SDHCI_IO_ACCESSORS Date: Mon, 16 Jan 2023 11:43:55 -0800 Message-Id: <20230116194401.20372-3-doug@schmorgal.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230116194401.20372-1-doug@schmorgal.com> References: <20230116194401.20372-1-doug@schmorgal.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org Enable CONFIG_MMC_SDHCI_IO_ACCESSORS for the pxav2 driver. The read_w callback is needed for a silicon bug workaround in the PXA168. Signed-off-by: Doug Brown Acked-by: Adrian Hunter --- drivers/mmc/host/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig index 5e19a961c34d..b9e9185c86a6 100644 --- a/drivers/mmc/host/Kconfig +++ b/drivers/mmc/host/Kconfig @@ -360,6 +360,7 @@ config MMC_SDHCI_PXAV2 depends on MMC_SDHCI_PLTFM depends on ARCH_MMP || COMPILE_TEST default CPU_PXA910 + select MMC_SDHCI_IO_ACCESSORS help This selects the Marvell(R) PXAV2 SD Host Controller. If you have a PXA9XX platform with SD Host Controller From patchwork Mon Jan 16 19:43:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Brown X-Patchwork-Id: 643943 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2667AC677F1 for ; Mon, 16 Jan 2023 19:44:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233095AbjAPToo (ORCPT ); Mon, 16 Jan 2023 14:44:44 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51344 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233710AbjAPTon (ORCPT ); Mon, 16 Jan 2023 14:44:43 -0500 Received: from mail-pl1-x630.google.com (mail-pl1-x630.google.com [IPv6:2607:f8b0:4864:20::630]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 408442C66C for ; Mon, 16 Jan 2023 11:44:42 -0800 (PST) Received: by mail-pl1-x630.google.com with SMTP id jn22so31277901plb.13 for ; Mon, 16 Jan 2023 11:44:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=schmorgal.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=p1/rux+dB2ue+u77r+Lmx539KLyGVCKrU+T8EBWwu5M=; b=CydmbJdsei6OFAeI2GGDrf/oSjrqJBYxHdg3KwV1fhsSU6AKm2pY4m98oLPM2wjZ6H CBH0fhnbui8iLgSSYMBomOvtpWLSNujIYdLXvhlE0pF1943cZfFppPOZdqpT9aI1jmKs tRFPjWEWOZ+wc3Pc751ZLn8sjx/7jC4yvK4hM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=p1/rux+dB2ue+u77r+Lmx539KLyGVCKrU+T8EBWwu5M=; b=gMQ1YEcMrxDlWhYRux4LrC6swKOrv3hj/nXwVAv8WJrIc0QuuxKrNpHZFsS8QnuZIm f1EP9FpKyzsIV3ZZQr1g/OlqlXG8Tq1dCLdeiDa5fsFGXqiqUQyslDkUfUZCj7QeLd45 +i+Ldg8EvSar7bIS5/sHI8J0a9ULl+eNdIlKxv8QUGq1EM1lw0wGZiZhMJ+NxYG43dto sDOZsSO53ABkhg6acKev9t+Mgnu+fdndvXO+bfvOnZI9gYhF2hoX06l1MehYxuoBxmN7 CcCh6Y/vNVyUEA1ETbXtVeYby5uudmyibN35lENxlg4yaGKKS+tfRTSIkGeSgXkDJXgk GOEg== X-Gm-Message-State: AFqh2koc0iqpPbs/YGigqJ0i77OrbYekA3j4I7wHLf5viblbgnzc0exK /qLV4i9Ua4JEIqfDzd7gU49BcA== X-Google-Smtp-Source: AMrXdXvvv+eJ86qAtMbNzubFkNTlO6sPiXQQ7ZKeX1Q9Rm3iJwd5iL8ITW89Y+lRnw4PHtUZb1OFBQ== X-Received: by 2002:a17:902:f60b:b0:194:a663:675b with SMTP id n11-20020a170902f60b00b00194a663675bmr532235plg.19.1673898281606; Mon, 16 Jan 2023 11:44:41 -0800 (PST) Received: from doug-ryzen-5700G.. ([192.183.212.197]) by smtp.gmail.com with ESMTPSA id t13-20020a170902b20d00b001926a76e8absm19734663plr.114.2023.01.16.11.44.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Jan 2023 11:44:40 -0800 (PST) From: Doug Brown To: Ulf Hansson , Adrian Hunter Cc: Rob Herring , Krzysztof Kozlowski , linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, Doug Brown Subject: [PATCH v5 3/8] mmc: sdhci-pxav2: add register workaround for PXA168 silicon bug Date: Mon, 16 Jan 2023 11:43:56 -0800 Message-Id: <20230116194401.20372-4-doug@schmorgal.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230116194401.20372-1-doug@schmorgal.com> References: <20230116194401.20372-1-doug@schmorgal.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org The PXA168 has a documented silicon bug that results in a data abort exception when accessing the SDHCI_HOST_VERSION register on SDH2 and SDH4 through a 16-bit read. Implement the workaround described in the errata, which performs a 32-bit read from a lower address instead. This is safe to use on all four SDH peripherals. Signed-off-by: Doug Brown Acked-by: Adrian Hunter --- drivers/mmc/host/sdhci-pxav2.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/mmc/host/sdhci-pxav2.c b/drivers/mmc/host/sdhci-pxav2.c index 5707d597ecae..5e01dab94426 100644 --- a/drivers/mmc/host/sdhci-pxav2.c +++ b/drivers/mmc/host/sdhci-pxav2.c @@ -80,6 +80,15 @@ static void pxav2_reset(struct sdhci_host *host, u8 mask) } } +static u16 pxav1_readw(struct sdhci_host *host, int reg) +{ + /* Workaround for data abort exception on SDH2 and SDH4 on PXA168 */ + if (reg == SDHCI_HOST_VERSION) + return readl(host->ioaddr + SDHCI_HOST_VERSION - 2) >> 16; + + return readw(host->ioaddr + reg); +} + static void pxav2_mmc_set_bus_width(struct sdhci_host *host, int width) { u8 ctrl; @@ -107,6 +116,7 @@ struct sdhci_pxa_variant { }; static const struct sdhci_ops pxav1_sdhci_ops = { + .read_w = pxav1_readw, .set_clock = sdhci_set_clock, .get_max_clock = sdhci_pltfm_clk_get_max_clock, .set_bus_width = pxav2_mmc_set_bus_width, From patchwork Mon Jan 16 19:43:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Brown X-Patchwork-Id: 643342 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4DD6FC46467 for ; Mon, 16 Jan 2023 19:44:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233949AbjAPTow (ORCPT ); Mon, 16 Jan 2023 14:44:52 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51394 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233185AbjAPTor (ORCPT ); Mon, 16 Jan 2023 14:44:47 -0500 Received: from mail-pj1-x1030.google.com (mail-pj1-x1030.google.com [IPv6:2607:f8b0:4864:20::1030]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8FAEE2CC48 for ; Mon, 16 Jan 2023 11:44:45 -0800 (PST) Received: by mail-pj1-x1030.google.com with SMTP id q23-20020a17090a065700b002290913a521so12617055pje.5 for ; Mon, 16 Jan 2023 11:44:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=schmorgal.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=WqYz5wS1ns0kl8A6NpaJdCKujdrpwt6VlQVEZ72mUB8=; b=JgGZYlqHWBDT0cSi8VIWA3vQKajGGfoljiLjNUR+0boPilQkPK6/05Ab4AgGogOeJB 1uNS8OKQ7znEpz4DR3ExcfV3qkM0shC5fUX0odRr0vDasuPeWy6aH650rw0v6+INA3BL 4j7Wt5LRfuMSOo7vJsD2f3NPkTZ6jJxAXPSRI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=WqYz5wS1ns0kl8A6NpaJdCKujdrpwt6VlQVEZ72mUB8=; b=rH61E0kS2jraOdnrb84QvtpO9k+pGXDd3+VurJ4xEefKUAuN+lmfa+qBjbkiqc5J5k LNSh9POxq7cL3MjKt2uefA6WxLy41yAYZXgcQbqZHs+ZyyWQyRbZOKtbon9GI6nVLFu6 UA1XIgMDAGMvMEr4/jVV40z1J4mn/7U0XjrRN202bEsZpjbxUF4IMBANOXMjh/TWKbT2 1NCTMgK0B3Ts6CkoGPRbYjcMoa86U6LCIjSIF2GpvBfrd4XJ6NpBxGGPHegN8swuzAJ4 PNzOOGnYkgF93zwfTy5kamB7Ur0FS3XdfD3nz05rRJGny6bv14qV7wHsZ38XhcYe5jWS U+ug== X-Gm-Message-State: AFqh2kp4fhJrskc+tAXIFafkHqyZPf4m3/o2q0v0CHAkTHHA4USp9cPP P/ClkN448/dUARChXnbeyjx+L6oYEVhtbRMCizY0gg== X-Google-Smtp-Source: AMrXdXubMwBfH/DZX7c3dFUOa8kG4jN6M/+ViULMkQLspFA2078qgDhevkj/6jCy6zbxF8nNGc/Aow== X-Received: by 2002:a17:902:e9cd:b0:194:5de4:52d0 with SMTP id 13-20020a170902e9cd00b001945de452d0mr970515plk.41.1673898285006; Mon, 16 Jan 2023 11:44:45 -0800 (PST) Received: from doug-ryzen-5700G.. ([192.183.212.197]) by smtp.gmail.com with ESMTPSA id t13-20020a170902b20d00b001926a76e8absm19734663plr.114.2023.01.16.11.44.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Jan 2023 11:44:44 -0800 (PST) From: Doug Brown To: Ulf Hansson , Adrian Hunter Cc: Rob Herring , Krzysztof Kozlowski , linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, Doug Brown Subject: [PATCH v5 4/8] mmc: sdhci-pxav2: change clock name to match DT bindings Date: Mon, 16 Jan 2023 11:43:57 -0800 Message-Id: <20230116194401.20372-5-doug@schmorgal.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230116194401.20372-1-doug@schmorgal.com> References: <20230116194401.20372-1-doug@schmorgal.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org The devicetree bindings for this driver specify that the two allowed clock names are io and core. Change this driver to look for io, but allow any name if it fails for backwards compatibility. Follow the same pattern used in sdhci-pxav3, but add support for EPROBE_DEFER. Get rid of an unnecessary pdev->dev while we're at it. Signed-off-by: Doug Brown Acked-by: Adrian Hunter --- drivers/mmc/host/sdhci-pxav2.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/mmc/host/sdhci-pxav2.c b/drivers/mmc/host/sdhci-pxav2.c index 5e01dab94426..f5c86e1ba734 100644 --- a/drivers/mmc/host/sdhci-pxav2.c +++ b/drivers/mmc/host/sdhci-pxav2.c @@ -199,16 +199,18 @@ static int sdhci_pxav2_probe(struct platform_device *pdev) pltfm_host = sdhci_priv(host); - clk = devm_clk_get(dev, "PXA-SDHCLK"); + clk = devm_clk_get(dev, "io"); + if (IS_ERR(clk) && PTR_ERR(clk) != -EPROBE_DEFER) + clk = devm_clk_get(dev, NULL); if (IS_ERR(clk)) { - dev_err(dev, "failed to get io clock\n"); ret = PTR_ERR(clk); + dev_err_probe(dev, ret, "failed to get io clock\n"); goto free; } pltfm_host->clk = clk; ret = clk_prepare_enable(clk); if (ret) { - dev_err(&pdev->dev, "failed to enable io clock\n"); + dev_err(dev, "failed to enable io clock\n"); goto free; } From patchwork Mon Jan 16 19:43:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Brown X-Patchwork-Id: 643942 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C5CAEC678D4 for ; Mon, 16 Jan 2023 19:44:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233746AbjAPToz (ORCPT ); Mon, 16 Jan 2023 14:44:55 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51424 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233912AbjAPTov (ORCPT ); Mon, 16 Jan 2023 14:44:51 -0500 Received: from mail-pl1-x636.google.com (mail-pl1-x636.google.com [IPv6:2607:f8b0:4864:20::636]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1201D2CC51 for ; Mon, 16 Jan 2023 11:44:50 -0800 (PST) Received: by mail-pl1-x636.google.com with SMTP id y1so31319665plb.2 for ; Mon, 16 Jan 2023 11:44:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=schmorgal.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=MY5kf847zY0nN9lKzWJgGUhJ3Yit9Nb6tzRd8EwwrE0=; b=ZZ/FQ4Pb5VLNmaqh3DetovgycLhPjdlVhGYnnT1PlKhOw6wCs+LUeFb0mWhJ4n00yk yGj0AGH8dDXpMoNf9MKu/5f7AOVVUn4L+YUsh0zDqMGXnJEnZST6l3xqmv7MNJhavTP0 0f+ORcYJCBizuyMkfqdCxEKFMbD144okWIYd4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=MY5kf847zY0nN9lKzWJgGUhJ3Yit9Nb6tzRd8EwwrE0=; b=hYIxA8hQ1mcKK1b/T6mLqhsHNEJQCigHXHEppI+bk210ZBFDIXEMfMA653yoQk21le sO+lXP6blBqK6JDVE8/rGNibEbh/PPYoJLAkHzcVeeEqMK2JwVy72Eu5c9qLiqPPHDOH L2JbXcO6PEw0DzjaVihkBqiyCHy4J+eVxvRedrdJGA/i0Nf8YsGLGOZO98DHLi6AqnnJ a1Fg6f0Xjjx6aoKdn1r5615DU33UrJvo15V6edxNX4WPnp7K8ewo8o0h2X6k5jhuNeLb tdLbDw+VlmmnlM8q0OR+3DYk90ZLT1nrmiF1DExW4xBtMgX0hng+82U+iR0ToTvxB1Ib 43Lw== X-Gm-Message-State: AFqh2kp63fF3CVGE5p8bVQfnqWxilvUASkL/P7jKjmnteqyKpqi0GlZf Wnu4CF2YUe1ch5MtczLG3IG5yw== X-Google-Smtp-Source: AMrXdXu7LX8J0YgkYfZOFsZB5M2RQdPva+1b3z/ocNn4FConU3pe1sX2UUPpQG0a06B9a6rVjp6Riw== X-Received: by 2002:a17:902:8a8a:b0:191:13f2:173a with SMTP id p10-20020a1709028a8a00b0019113f2173amr816676plo.36.1673898289317; Mon, 16 Jan 2023 11:44:49 -0800 (PST) Received: from doug-ryzen-5700G.. ([192.183.212.197]) by smtp.gmail.com with ESMTPSA id t13-20020a170902b20d00b001926a76e8absm19734663plr.114.2023.01.16.11.44.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Jan 2023 11:44:48 -0800 (PST) From: Doug Brown To: Ulf Hansson , Adrian Hunter Cc: Rob Herring , Krzysztof Kozlowski , linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, Doug Brown , kernel test robot , Dan Carpenter Subject: [PATCH v5 5/8] mmc: sdhci-pxav2: add optional core clock Date: Mon, 16 Jan 2023 11:43:58 -0800 Message-Id: <20230116194401.20372-6-doug@schmorgal.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230116194401.20372-1-doug@schmorgal.com> References: <20230116194401.20372-1-doug@schmorgal.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org Add ability to have an optional core clock just like the pxav3 driver. The PXA168 needs this because its SDHC controllers have separate core and io clocks that both need to be enabled. This also correctly matches the documented devicetree bindings for this driver. Reported-by: kernel test robot Reported-by: Dan Carpenter Signed-off-by: Doug Brown --- The Reported-by tags above refer to a missing assignment to ret in an earlier version of this patch. The kernel test robot caught it. drivers/mmc/host/sdhci-pxav2.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci-pxav2.c b/drivers/mmc/host/sdhci-pxav2.c index f5c86e1ba734..3141901e1558 100644 --- a/drivers/mmc/host/sdhci-pxav2.c +++ b/drivers/mmc/host/sdhci-pxav2.c @@ -191,7 +191,7 @@ static int sdhci_pxav2_probe(struct platform_device *pdev) const struct sdhci_pxa_variant *variant; int ret; - struct clk *clk; + struct clk *clk, *clk_core; host = sdhci_pltfm_init(pdev, NULL, 0); if (IS_ERR(host)) @@ -214,6 +214,13 @@ static int sdhci_pxav2_probe(struct platform_device *pdev) goto free; } + clk_core = devm_clk_get_optional_enabled(dev, "core"); + if (IS_ERR(clk_core)) { + ret = PTR_ERR(clk_core); + dev_err_probe(dev, ret, "failed to enable core clock\n"); + goto disable_clk; + } + host->quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_BROKEN_TIMEOUT_VAL | SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN; From patchwork Mon Jan 16 19:43:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Brown X-Patchwork-Id: 643341 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 866D0C67871 for ; Mon, 16 Jan 2023 19:44:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233185AbjAPToy (ORCPT ); Mon, 16 Jan 2023 14:44:54 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51408 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233953AbjAPTox (ORCPT ); Mon, 16 Jan 2023 14:44:53 -0500 Received: from mail-pj1-x1030.google.com (mail-pj1-x1030.google.com [IPv6:2607:f8b0:4864:20::1030]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5AA172CC4A for ; Mon, 16 Jan 2023 11:44:52 -0800 (PST) Received: by mail-pj1-x1030.google.com with SMTP id q23-20020a17090a065700b002290913a521so12617272pje.5 for ; Mon, 16 Jan 2023 11:44:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=schmorgal.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=WH9Ep3uciWgkLfBeEVh7HFxTyVvCPCqhIdElzlqZypI=; b=lp7kZdOssvwiag2+7RvuTbYpYcK6IBTol756TLJwt+drgLeZlrksEptqLDO2TAyaWA T7Q2G0TRnk/CJs6P3c/WZVZsEvBlCZHF4l7FcBvEMOaR6RtFrr9IK688DTA527Mk/+9e E9vvRnZwkTUptPu9xt3Wnw+kBKxnz2gml2HJ8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=WH9Ep3uciWgkLfBeEVh7HFxTyVvCPCqhIdElzlqZypI=; b=IkMHk7Nv7sK9U74B/e3UhTjQiJ2vVdv8KGPK+c7lj67XteiPHWh6hf2axcUjXOOPCh Mxb5+hdzhwzXO79zsc+NsFoq78AmkJcJifq+c+llRLxr35RMb7nUloqmCsfVROrlrI0z 7tE2vW4e4JNWlA5+snym264iM9/jMEui+ccIQCahsOlcZW4e7t3+41G6a3pUeFDZzhcV 5v3DliSyQumLwjytOWO+BbQ3Ln9wVlGoRWtWNq8a+3ifzklZrKcka8k9bsdOM0Chs9sk bdjuVhUdm/4093r66oQz3WZcfZkjl+i8ph70AEcpAoHMUB5htF5iNNts/9RP85PUOj9G vTBQ== X-Gm-Message-State: AFqh2kpa/udcXMhcwB48W5VrBMNZEEq8aStPKaXmMzElf47CzwFpH2OC wIWpOXb9TNUljPXtNaApT6KfKA== X-Google-Smtp-Source: AMrXdXtxosTU5MyCo7GT+yWFkfjdSfPuhQBubAD4FukTuZ2NwUt2FbGyylzJkecuzexk+KRlcpSyIw== X-Received: by 2002:a17:902:7e47:b0:193:3215:9621 with SMTP id a7-20020a1709027e4700b0019332159621mr20647429pln.33.1673898292063; Mon, 16 Jan 2023 11:44:52 -0800 (PST) Received: from doug-ryzen-5700G.. ([192.183.212.197]) by smtp.gmail.com with ESMTPSA id t13-20020a170902b20d00b001926a76e8absm19734663plr.114.2023.01.16.11.44.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Jan 2023 11:44:51 -0800 (PST) From: Doug Brown To: Ulf Hansson , Adrian Hunter Cc: Rob Herring , Krzysztof Kozlowski , linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, Doug Brown Subject: [PATCH v5 6/8] mmc: sdhci-pxav2: add SDIO card IRQ workaround for PXA168 V1 controller Date: Mon, 16 Jan 2023 11:43:59 -0800 Message-Id: <20230116194401.20372-7-doug@schmorgal.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230116194401.20372-1-doug@schmorgal.com> References: <20230116194401.20372-1-doug@schmorgal.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org The PXA168 has a documented silicon bug that causes SDIO card IRQs to be missed. Implement the first half of the suggested workaround, which involves resetting the data port logic and issuing a dummy CMD0 to restart the clock. Signed-off-by: Doug Brown Acked-by: Adrian Hunter --- drivers/mmc/host/sdhci-pxav2.c | 56 +++++++++++++++++++++++++++++++++- 1 file changed, 55 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci-pxav2.c b/drivers/mmc/host/sdhci-pxav2.c index 3141901e1558..3dafffaa0c6e 100644 --- a/drivers/mmc/host/sdhci-pxav2.c +++ b/drivers/mmc/host/sdhci-pxav2.c @@ -20,6 +20,8 @@ #include #include #include +#include +#include #include "sdhci.h" #include "sdhci-pltfm.h" @@ -41,6 +43,10 @@ #define MMC_CARD 0x1000 #define MMC_WIDTH 0x0100 +struct sdhci_pxav2_host { + struct mmc_request *sdio_mrq; +}; + static void pxav2_reset(struct sdhci_host *host, u8 mask) { struct platform_device *pdev = to_platform_device(mmc_dev(host->mmc)); @@ -89,6 +95,52 @@ static u16 pxav1_readw(struct sdhci_host *host, int reg) return readw(host->ioaddr + reg); } +static u32 pxav1_irq(struct sdhci_host *host, u32 intmask) +{ + struct sdhci_pxav2_host *pxav2_host = sdhci_pltfm_priv(sdhci_priv(host)); + struct mmc_request *sdio_mrq; + + if (pxav2_host->sdio_mrq && (intmask & SDHCI_INT_CMD_MASK)) { + /* The dummy CMD0 for the SDIO workaround just completed */ + sdhci_writel(host, intmask & SDHCI_INT_CMD_MASK, SDHCI_INT_STATUS); + intmask &= ~SDHCI_INT_CMD_MASK; + sdio_mrq = pxav2_host->sdio_mrq; + pxav2_host->sdio_mrq = NULL; + mmc_request_done(host->mmc, sdio_mrq); + } + + return intmask; +} + +static void pxav1_request_done(struct sdhci_host *host, struct mmc_request *mrq) +{ + u16 tmp; + struct sdhci_pxav2_host *pxav2_host; + + /* If this is an SDIO command, perform errata workaround for silicon bug */ + if (mrq->cmd && !mrq->cmd->error && + (mrq->cmd->opcode == SD_IO_RW_DIRECT || + mrq->cmd->opcode == SD_IO_RW_EXTENDED)) { + /* Reset data port */ + tmp = readw(host->ioaddr + SDHCI_TIMEOUT_CONTROL); + tmp |= 0x400; + writew(tmp, host->ioaddr + SDHCI_TIMEOUT_CONTROL); + + /* Clock is now stopped, so restart it by sending a dummy CMD0 */ + pxav2_host = sdhci_pltfm_priv(sdhci_priv(host)); + pxav2_host->sdio_mrq = mrq; + sdhci_writel(host, 0, SDHCI_ARGUMENT); + sdhci_writew(host, 0, SDHCI_TRANSFER_MODE); + sdhci_writew(host, SDHCI_MAKE_CMD(MMC_GO_IDLE_STATE, SDHCI_CMD_RESP_NONE), + SDHCI_COMMAND); + + /* Don't finish this request until the dummy CMD0 finishes */ + return; + } + + mmc_request_done(host->mmc, mrq); +} + static void pxav2_mmc_set_bus_width(struct sdhci_host *host, int width) { u8 ctrl; @@ -118,10 +170,12 @@ struct sdhci_pxa_variant { static const struct sdhci_ops pxav1_sdhci_ops = { .read_w = pxav1_readw, .set_clock = sdhci_set_clock, + .irq = pxav1_irq, .get_max_clock = sdhci_pltfm_clk_get_max_clock, .set_bus_width = pxav2_mmc_set_bus_width, .reset = pxav2_reset, .set_uhs_signaling = sdhci_set_uhs_signaling, + .request_done = pxav1_request_done, }; static const struct sdhci_pxa_variant __maybe_unused pxav1_variant = { @@ -193,7 +247,7 @@ static int sdhci_pxav2_probe(struct platform_device *pdev) int ret; struct clk *clk, *clk_core; - host = sdhci_pltfm_init(pdev, NULL, 0); + host = sdhci_pltfm_init(pdev, NULL, sizeof(struct sdhci_pxav2_host)); if (IS_ERR(host)) return PTR_ERR(host); From patchwork Mon Jan 16 19:44:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Brown X-Patchwork-Id: 643941 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 20417C46467 for ; Mon, 16 Jan 2023 19:45:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233688AbjAPTo6 (ORCPT ); Mon, 16 Jan 2023 14:44:58 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51490 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233908AbjAPTo4 (ORCPT ); Mon, 16 Jan 2023 14:44:56 -0500 Received: from mail-pj1-x1034.google.com (mail-pj1-x1034.google.com [IPv6:2607:f8b0:4864:20::1034]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7DBDB2CC4A for ; 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Mon, 16 Jan 2023 11:44:54 -0800 (PST) Received: from doug-ryzen-5700G.. ([192.183.212.197]) by smtp.gmail.com with ESMTPSA id t13-20020a170902b20d00b001926a76e8absm19734663plr.114.2023.01.16.11.44.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Jan 2023 11:44:54 -0800 (PST) From: Doug Brown To: Ulf Hansson , Adrian Hunter Cc: Rob Herring , Krzysztof Kozlowski , linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, Doug Brown Subject: [PATCH v5 7/8] mmc: sdhci-pxav2: add optional pinctrl for SDIO IRQ workaround Date: Mon, 16 Jan 2023 11:44:00 -0800 Message-Id: <20230116194401.20372-8-doug@schmorgal.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230116194401.20372-1-doug@schmorgal.com> References: <20230116194401.20372-1-doug@schmorgal.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org The PXA168 errata recommends that the CMD signal should be detached from the SD bus while performing the dummy CMD0 to restart the clock. Implement this using pinctrl states. Signed-off-by: Doug Brown Acked-by: Adrian Hunter --- drivers/mmc/host/sdhci-pxav2.c | 33 ++++++++++++++++++++++++++++++++- 1 file changed, 32 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci-pxav2.c b/drivers/mmc/host/sdhci-pxav2.c index 3dafffaa0c6e..fc306eb1f845 100644 --- a/drivers/mmc/host/sdhci-pxav2.c +++ b/drivers/mmc/host/sdhci-pxav2.c @@ -22,6 +22,7 @@ #include #include #include +#include #include "sdhci.h" #include "sdhci-pltfm.h" @@ -45,6 +46,9 @@ struct sdhci_pxav2_host { struct mmc_request *sdio_mrq; + struct pinctrl *pinctrl; + struct pinctrl_state *pins_default; + struct pinctrl_state *pins_cmd_gpio; }; static void pxav2_reset(struct sdhci_host *host, u8 mask) @@ -104,6 +108,11 @@ static u32 pxav1_irq(struct sdhci_host *host, u32 intmask) /* The dummy CMD0 for the SDIO workaround just completed */ sdhci_writel(host, intmask & SDHCI_INT_CMD_MASK, SDHCI_INT_STATUS); intmask &= ~SDHCI_INT_CMD_MASK; + + /* Restore MMC function to CMD pin */ + if (pxav2_host->pinctrl && pxav2_host->pins_default) + pinctrl_select_state(pxav2_host->pinctrl, pxav2_host->pins_default); + sdio_mrq = pxav2_host->sdio_mrq; pxav2_host->sdio_mrq = NULL; mmc_request_done(host->mmc, sdio_mrq); @@ -129,6 +138,11 @@ static void pxav1_request_done(struct sdhci_host *host, struct mmc_request *mrq) /* Clock is now stopped, so restart it by sending a dummy CMD0 */ pxav2_host = sdhci_pltfm_priv(sdhci_priv(host)); pxav2_host->sdio_mrq = mrq; + + /* Set CMD as high output rather than MMC function while we do CMD0 */ + if (pxav2_host->pinctrl && pxav2_host->pins_cmd_gpio) + pinctrl_select_state(pxav2_host->pinctrl, pxav2_host->pins_cmd_gpio); + sdhci_writel(host, 0, SDHCI_ARGUMENT); sdhci_writew(host, 0, SDHCI_TRANSFER_MODE); sdhci_writew(host, SDHCI_MAKE_CMD(MMC_GO_IDLE_STATE, SDHCI_CMD_RESP_NONE), @@ -240,6 +254,7 @@ static int sdhci_pxav2_probe(struct platform_device *pdev) { struct sdhci_pltfm_host *pltfm_host; struct sdhci_pxa_platdata *pdata = pdev->dev.platform_data; + struct sdhci_pxav2_host *pxav2_host; struct device *dev = &pdev->dev; struct sdhci_host *host = NULL; const struct sdhci_pxa_variant *variant; @@ -247,11 +262,12 @@ static int sdhci_pxav2_probe(struct platform_device *pdev) int ret; struct clk *clk, *clk_core; - host = sdhci_pltfm_init(pdev, NULL, sizeof(struct sdhci_pxav2_host)); + host = sdhci_pltfm_init(pdev, NULL, sizeof(*pxav2_host)); if (IS_ERR(host)) return PTR_ERR(host); pltfm_host = sdhci_priv(host); + pxav2_host = sdhci_pltfm_priv(pltfm_host); clk = devm_clk_get(dev, "io"); if (IS_ERR(clk) && PTR_ERR(clk) != -EPROBE_DEFER) @@ -307,6 +323,21 @@ static int sdhci_pxav2_probe(struct platform_device *pdev) host->quirks |= variant->extra_quirks; host->ops = variant->ops; + /* Set up optional pinctrl for PXA168 SDIO IRQ fix */ + pxav2_host->pinctrl = devm_pinctrl_get(dev); + if (!IS_ERR(pxav2_host->pinctrl)) { + pxav2_host->pins_cmd_gpio = pinctrl_lookup_state(pxav2_host->pinctrl, + "state_cmd_gpio"); + if (IS_ERR(pxav2_host->pins_cmd_gpio)) + pxav2_host->pins_cmd_gpio = NULL; + pxav2_host->pins_default = pinctrl_lookup_state(pxav2_host->pinctrl, + "default"); + if (IS_ERR(pxav2_host->pins_default)) + pxav2_host->pins_default = NULL; + } else { + pxav2_host->pinctrl = NULL; + } + ret = sdhci_add_host(host); if (ret) goto disable_clk; From patchwork Mon Jan 16 19:44:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Brown X-Patchwork-Id: 643340 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 86249C677F1 for ; Mon, 16 Jan 2023 19:45:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233911AbjAPTpD (ORCPT ); Mon, 16 Jan 2023 14:45:03 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51568 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233912AbjAPTpA (ORCPT ); Mon, 16 Jan 2023 14:45:00 -0500 Received: from mail-pj1-x102e.google.com (mail-pj1-x102e.google.com [IPv6:2607:f8b0:4864:20::102e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 119D02CC7F for ; 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Mon, 16 Jan 2023 11:44:58 -0800 (PST) Received: from doug-ryzen-5700G.. ([192.183.212.197]) by smtp.gmail.com with ESMTPSA id t13-20020a170902b20d00b001926a76e8absm19734663plr.114.2023.01.16.11.44.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Jan 2023 11:44:58 -0800 (PST) From: Doug Brown To: Ulf Hansson , Adrian Hunter Cc: Rob Herring , Krzysztof Kozlowski , linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, Doug Brown , Krzysztof Kozlowski Subject: [PATCH v5 8/8] dt-bindings: mmc: sdhci-pxa: add pxav1 Date: Mon, 16 Jan 2023 11:44:01 -0800 Message-Id: <20230116194401.20372-9-doug@schmorgal.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230116194401.20372-1-doug@schmorgal.com> References: <20230116194401.20372-1-doug@schmorgal.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org Add a compatible for the pxav1 controller in the PXA168, along with optional pinctrl properties to use for an errata workaround. Signed-off-by: Doug Brown Reviewed-by: Krzysztof Kozlowski --- .../devicetree/bindings/mmc/sdhci-pxa.yaml | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mmc/sdhci-pxa.yaml b/Documentation/devicetree/bindings/mmc/sdhci-pxa.yaml index 3d46c2525787..09455f9fa8de 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-pxa.yaml +++ b/Documentation/devicetree/bindings/mmc/sdhci-pxa.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/mmc/sdhci-pxa.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Marvell PXA SDHCI v2/v3 +title: Marvell PXA SDHCI v1/v2/v3 maintainers: - Ulf Hansson @@ -34,6 +34,7 @@ allOf: properties: compatible: enum: + - mrvl,pxav1-mmc - mrvl,pxav2-mmc - mrvl,pxav3-mmc - marvell,armada-380-sdhci @@ -61,6 +62,22 @@ properties: - const: io - const: core + pinctrl-names: + description: + Optional for supporting PXA168 SDIO IRQ errata to switch CMD pin between + SDIO CMD and GPIO mode. + items: + - const: default + - const: state_cmd_gpio + + pinctrl-0: + description: + Should contain default pinctrl. + + pinctrl-1: + description: + Should switch CMD pin to GPIO mode as a high output. + mrvl,clk-delay-cycles: description: Specify a number of cycles to delay for tuning. $ref: /schemas/types.yaml#/definitions/uint32