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[92.34.216.5]) by smtp.gmail.com with ESMTPSA id r12-20020ac252ac000000b004aab0ca795csm4780439lfm.211.2023.01.15.11.53.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 Jan 2023 11:53:27 -0800 (PST) From: Linus Walleij To: u-boot@lists.denx.de, Tom Rini Cc: Anand Gore , William Zhang , Kursad Oney , Joel Peshkin , Philippe Reynes , Boris Brezillon , Linus Walleij Subject: [PATCH 01/14] mtd: nand: brcm: switch to mtd_ooblayout_ops Date: Sun, 15 Jan 2023 20:52:59 +0100 Message-Id: <20230115195312.1477845-2-linus.walleij@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230115195312.1477845-1-linus.walleij@linaro.org> References: <20230115195312.1477845-1-linus.walleij@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Boris Brezillon Implementing the mtd_ooblayout_ops interface is the new way of exposing ECC/OOB layout to MTD users. Signed-off-by: Boris Brezillon [Ported to U-Boot from the Linux kernel] Signed-off-by: Linus Walleij --- drivers/mtd/nand/raw/brcmnand/brcmnand.c | 260 ++++++++++++++--------- 1 file changed, 156 insertions(+), 104 deletions(-) diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index 74c9348f7fc4..8ea33e861354 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -894,131 +894,183 @@ static inline bool is_hamming_ecc(struct brcmnand_controller *ctrl, } /* - * Returns a nand_ecclayout strucutre for the given layout/configuration. - * Returns NULL on failure. + * Set mtd->ooblayout to the appropriate mtd_ooblayout_ops given + * the layout/configuration. + * Returns -ERRCODE on failure. */ -static struct nand_ecclayout *brcmnand_create_layout(int ecc_level, - struct brcmnand_host *host) +static int brcmnand_hamming_ooblayout_ecc(struct mtd_info *mtd, int section, + struct mtd_oob_region *oobregion) { + struct nand_chip *chip = mtd_to_nand(mtd); + struct brcmnand_host *host = nand_get_controller_data(chip); struct brcmnand_cfg *cfg = &host->hwcfg; - int i, j; - struct nand_ecclayout *layout; - int req; - int sectors; - int sas; - int idx1, idx2; -#ifndef __UBOOT__ - layout = devm_kzalloc(&host->pdev->dev, sizeof(*layout), GFP_KERNEL); -#else - layout = devm_kzalloc(host->pdev, sizeof(*layout), GFP_KERNEL); -#endif - if (!layout) - return NULL; - - sectors = cfg->page_size / (512 << cfg->sector_size_1k); - sas = cfg->spare_area_size << cfg->sector_size_1k; - - /* Hamming */ - if (is_hamming_ecc(host->ctrl, cfg)) { - for (i = 0, idx1 = 0, idx2 = 0; i < sectors; i++) { - /* First sector of each page may have BBI */ - if (i == 0) { - layout->oobfree[idx2].offset = i * sas + 1; - /* Small-page NAND use byte 6 for BBI */ - if (cfg->page_size == 512) - layout->oobfree[idx2].offset--; - layout->oobfree[idx2].length = 5; - } else { - layout->oobfree[idx2].offset = i * sas; - layout->oobfree[idx2].length = 6; - } - idx2++; - layout->eccpos[idx1++] = i * sas + 6; - layout->eccpos[idx1++] = i * sas + 7; - layout->eccpos[idx1++] = i * sas + 8; - layout->oobfree[idx2].offset = i * sas + 9; - layout->oobfree[idx2].length = 7; - idx2++; - /* Leave zero-terminated entry for OOBFREE */ - if (idx1 >= MTD_MAX_ECCPOS_ENTRIES_LARGE || - idx2 >= MTD_MAX_OOBFREE_ENTRIES_LARGE - 1) - break; - } + int sas = cfg->spare_area_size << cfg->sector_size_1k; + int sectors = cfg->page_size / (512 << cfg->sector_size_1k); - return layout; - } + if (section >= sectors) + return -ERANGE; + oobregion->offset = (section * sas) + 6; + oobregion->length = 3; - /* - * CONTROLLER_VERSION: - * < v5.0: ECC_REQ = ceil(BCH_T * 13/8) - * >= v5.0: ECC_REQ = ceil(BCH_T * 14/8) - * But we will just be conservative. - */ - req = DIV_ROUND_UP(ecc_level * 14, 8); - if (req >= sas) { - dev_err(host->pdev, - "error: ECC too large for OOB (ECC bytes %d, spare sector %d)\n", - req, sas); - return NULL; - } + return 0; +} + +static int brcmnand_hamming_ooblayout_free(struct mtd_info *mtd, int section, + struct mtd_oob_region *oobregion) +{ + struct nand_chip *chip = mtd_to_nand(mtd); + struct brcmnand_host *host = nand_get_controller_data(chip); + struct brcmnand_cfg *cfg = &host->hwcfg; + int sas = cfg->spare_area_size << cfg->sector_size_1k; + int sectors = cfg->page_size / (512 << cfg->sector_size_1k); + + if (section >= sectors * 2) + return -ERANGE; + + oobregion->offset = (section / 2) * sas; - layout->eccbytes = req * sectors; - for (i = 0, idx1 = 0, idx2 = 0; i < sectors; i++) { - for (j = sas - req; j < sas && idx1 < - MTD_MAX_ECCPOS_ENTRIES_LARGE; j++, idx1++) - layout->eccpos[idx1] = i * sas + j; + if (section & 1) { + oobregion->offset += 9; + oobregion->length = 7; + } else { + oobregion->length = 6; /* First sector of each page may have BBI */ - if (i == 0) { - if (cfg->page_size == 512 && (sas - req >= 6)) { - /* Small-page NAND use byte 6 for BBI */ - layout->oobfree[idx2].offset = 0; - layout->oobfree[idx2].length = 5; - idx2++; - if (sas - req > 6) { - layout->oobfree[idx2].offset = 6; - layout->oobfree[idx2].length = - sas - req - 6; - idx2++; - } - } else if (sas > req + 1) { - layout->oobfree[idx2].offset = i * sas + 1; - layout->oobfree[idx2].length = sas - req - 1; - idx2++; - } - } else if (sas > req) { - layout->oobfree[idx2].offset = i * sas; - layout->oobfree[idx2].length = sas - req; - idx2++; + if (!section) { + /* + * Small-page NAND use byte 6 for BBI while large-page + * NAND use byte 0. + */ + if (cfg->page_size > 512) + oobregion->offset++; + oobregion->length--; } - /* Leave zero-terminated entry for OOBFREE */ - if (idx1 >= MTD_MAX_ECCPOS_ENTRIES_LARGE || - idx2 >= MTD_MAX_OOBFREE_ENTRIES_LARGE - 1) - break; } - return layout; + return 0; } -static struct nand_ecclayout *brcmstb_choose_ecc_layout( - struct brcmnand_host *host) +static const struct mtd_ooblayout_ops brcmnand_hamming_ooblayout_ops = { + .ecc = brcmnand_hamming_ooblayout_ecc, + .rfree = brcmnand_hamming_ooblayout_free, +}; + +static int brcmnand_bch_ooblayout_ecc(struct mtd_info *mtd, int section, + struct mtd_oob_region *oobregion) +{ + struct nand_chip *chip = mtd_to_nand(mtd); + struct brcmnand_host *host = nand_get_controller_data(chip); + struct brcmnand_cfg *cfg = &host->hwcfg; + int sas = cfg->spare_area_size << cfg->sector_size_1k; + int sectors = cfg->page_size / (512 << cfg->sector_size_1k); + + if (section >= sectors) + return -ERANGE; + + oobregion->offset = (section * (sas + 1)) - chip->ecc.bytes; + oobregion->length = chip->ecc.bytes; + + return 0; +} + +static int brcmnand_bch_ooblayout_free_lp(struct mtd_info *mtd, int section, + struct mtd_oob_region *oobregion) +{ + struct nand_chip *chip = mtd_to_nand(mtd); + struct brcmnand_host *host = nand_get_controller_data(chip); + struct brcmnand_cfg *cfg = &host->hwcfg; + int sas = cfg->spare_area_size << cfg->sector_size_1k; + int sectors = cfg->page_size / (512 << cfg->sector_size_1k); + + if (section >= sectors) + return -ERANGE; + + if (sas <= chip->ecc.bytes) + return 0; + + oobregion->offset = section * sas; + oobregion->length = sas - chip->ecc.bytes; + + if (!section) { + oobregion->offset++; + oobregion->length--; + } + + return 0; +} + +static int brcmnand_bch_ooblayout_free_sp(struct mtd_info *mtd, int section, + struct mtd_oob_region *oobregion) +{ + struct nand_chip *chip = mtd_to_nand(mtd); + struct brcmnand_host *host = nand_get_controller_data(chip); + struct brcmnand_cfg *cfg = &host->hwcfg; + int sas = cfg->spare_area_size << cfg->sector_size_1k; + + if (section > 1 || sas - chip->ecc.bytes < 6 || + (section && sas - chip->ecc.bytes == 6)) + return -ERANGE; + + if (!section) { + oobregion->offset = 0; + oobregion->length = 5; + } else { + oobregion->offset = 6; + oobregion->length = sas - chip->ecc.bytes - 6; + } + + return 0; +} + +static const struct mtd_ooblayout_ops brcmnand_bch_lp_ooblayout_ops = { + .ecc = brcmnand_bch_ooblayout_ecc, + .rfree = brcmnand_bch_ooblayout_free_lp, +}; + +static const struct mtd_ooblayout_ops brcmnand_bch_sp_ooblayout_ops = { + .ecc = brcmnand_bch_ooblayout_ecc, + .rfree = brcmnand_bch_ooblayout_free_sp, +}; + +static int brcmstb_choose_ecc_layout(struct brcmnand_host *host) { - struct nand_ecclayout *layout; struct brcmnand_cfg *p = &host->hwcfg; + struct mtd_info *mtd = nand_to_mtd(&host->chip); + struct nand_ecc_ctrl *ecc = &host->chip.ecc; unsigned int ecc_level = p->ecc_level; + int sas = p->spare_area_size << p->sector_size_1k; + int sectors = p->page_size / (512 << p->sector_size_1k); if (p->sector_size_1k) ecc_level <<= 1; - layout = brcmnand_create_layout(ecc_level, host); - if (!layout) { + if (is_hamming_ecc(host->ctrl, p)) { + ecc->bytes = 3 * sectors; + mtd_set_ooblayout(mtd, &brcmnand_hamming_ooblayout_ops); + return 0; + } + + /* + * CONTROLLER_VERSION: + * < v5.0: ECC_REQ = ceil(BCH_T * 13/8) + * >= v5.0: ECC_REQ = ceil(BCH_T * 14/8) + * But we will just be conservative. + */ + ecc->bytes = DIV_ROUND_UP(ecc_level * 14, 8); + if (p->page_size == 512) + mtd_set_ooblayout(mtd, &brcmnand_bch_sp_ooblayout_ops); + else + mtd_set_ooblayout(mtd, &brcmnand_bch_lp_ooblayout_ops); + + if (ecc->bytes >= sas) { dev_err(host->pdev, - "no proper ecc_layout for this NAND cfg\n"); - return NULL; + "error: ECC too large for OOB (ECC bytes %d, spare sector %d)\n", + ecc->bytes, sas); + return -EINVAL; } - return layout; + return 0; } static void brcmnand_wp(struct mtd_info *mtd, int wp) @@ -2329,9 +2381,9 @@ static int brcmnand_init_cs(struct brcmnand_host *host, ofnode dn) /* only use our internal HW threshold */ mtd->bitflip_threshold = 1; - chip->ecc.layout = brcmstb_choose_ecc_layout(host); - if (!chip->ecc.layout) - return -ENXIO; + ret = brcmstb_choose_ecc_layout(host); + if (ret) + return ret; ret = nand_scan_tail(mtd); if (ret) From patchwork Sun Jan 15 19:53:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 642949 Delivered-To: patch@linaro.org Received: by 2002:a17:522:b9de:b0:4b9:b062:db3b with SMTP id fj30csp250763pvb; Sun, 15 Jan 2023 11:53:57 -0800 (PST) X-Google-Smtp-Source: AMrXdXtuzwecuzczLpytYEhl/Uh6OW55YzQsvc0NPrHpt9zaX4qIKdV2nDRiNo6SF9WeiiFa/7Mn X-Received: by 2002:a05:6830:6997:b0:684:c322:917c with SMTP id cy23-20020a056830699700b00684c322917cmr8172082otb.5.1673812437089; Sun, 15 Jan 2023 11:53:57 -0800 (PST) ARC-Seal: i=1; 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[92.34.216.5]) by smtp.gmail.com with ESMTPSA id r12-20020ac252ac000000b004aab0ca795csm4780439lfm.211.2023.01.15.11.53.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 Jan 2023 11:53:29 -0800 (PST) From: Linus Walleij To: u-boot@lists.denx.de, Tom Rini Cc: Anand Gore , William Zhang , Kursad Oney , Joel Peshkin , Philippe Reynes , Kamal Dasu , Florian Fainelli , Miquel Raynal , Linus Walleij Subject: [PATCH 02/14] mtd: rawnand: brcmnand: Fix BCH ECC layout for large page NAND parts Date: Sun, 15 Jan 2023 20:53:00 +0100 Message-Id: <20230115195312.1477845-3-linus.walleij@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230115195312.1477845-1-linus.walleij@linaro.org> References: <20230115195312.1477845-1-linus.walleij@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Kamal Dasu The way oobregion->offset is derived for large page NAND parts is wrong, fixes it. Fixes: ef5eeea6e911 ("mtd: nand: brcm: switch to mtd_ooblayout_ops") Signed-off-by: Kamal Dasu Reviewed-by: Florian Fainelli Signed-off-by: Miquel Raynal [Ported to U-Boot from the Linux kernel] Signed-off-by: Linus Walleij --- drivers/mtd/nand/raw/brcmnand/brcmnand.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index 8ea33e861354..65aab4be87b9 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -968,7 +968,7 @@ static int brcmnand_bch_ooblayout_ecc(struct mtd_info *mtd, int section, if (section >= sectors) return -ERANGE; - oobregion->offset = (section * (sas + 1)) - chip->ecc.bytes; + oobregion->offset = ((section + 1) * sas) - chip->ecc.bytes; oobregion->length = chip->ecc.bytes; return 0; From patchwork Sun Jan 15 19:53:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 642950 Delivered-To: patch@linaro.org Received: by 2002:a17:522:b9de:b0:4b9:b062:db3b with SMTP id fj30csp250809pvb; Sun, 15 Jan 2023 11:54:10 -0800 (PST) X-Google-Smtp-Source: AMrXdXsWDSBi9q2dZDy0jmNO8Lu7kMxVZlNuHkhdT30BioxmRTsD9kDHSvgYXOT5m0oWNkCGGZ/8 X-Received: by 2002:a05:6870:b69c:b0:15d:6027:e914 with SMTP id cy28-20020a056870b69c00b0015d6027e914mr10192044oab.32.1673812450643; Sun, 15 Jan 2023 11:54:10 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1673812450; cv=none; d=google.com; s=arc-20160816; b=LgZdo/GYvVmORfiaK945VLh4/UsQd6RleEKK7/HfKlMLo8JtTt5PH11T4nurf+nJgM YKzRK0vcSNfrSjMWMMYmM1totNk13WBPqPPxHYZ9tVulDloByCHwB6cNtT/SFcAm1Hrb mgUjw2skrD5UvJAquNtNRYkYEjZmBfvw8XD9Em21R53uhgR0FuY9F627BraSftnvT4XN s0QBQszyjMSeJwYCEt6EWkBj4cg/uwQgWnP50Oyg5uqLQ8wFvCB9MRhvvoZWfesFfOR4 KQYJ8JX++egZMmqQwhkRFBmKHEtE+aIJfWVsl7szDRCY2Qc8OYeAIuxUeM3+1997mzri ceAw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=BTzztGHggWOIIL4rLs0PVy+1pF1eeJ8z2GWVK25AqMI=; b=G3UQXOnK/qrw9qTxIovxKLjHk2ddHpTNYDJA7tLOeqiSJqcql9kEh6zfhRBYkCOLA2 cUZOXh4HqB+fkbF8aH6mzXdqfLd6fk0Ry6ZONBpvWv8J9M9DrBVYIY3AXwcbvLp3mTaJ esxSB+BNdt84OuaaFLGxHiPNmRGOtzPi1q/xc8wctlgq+6k/8HL7RdGbhFi5e+qI1qi6 6nB67wdOCnDvmL0/PJ8rfkUMZxudxWHWo6YcZslT7OijvEEEaUBdn+rbaPRAsFSglIWM PJx6Oc94Zm+LXoEMduEdrv0pNAXPmqqLOAt1HLOReGQ2XSCrUCUbGg3zQidFvB+jAKmN yPog== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=RcmbHI86; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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[92.34.216.5]) by smtp.gmail.com with ESMTPSA id r12-20020ac252ac000000b004aab0ca795csm4780439lfm.211.2023.01.15.11.53.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 Jan 2023 11:53:31 -0800 (PST) From: Linus Walleij To: u-boot@lists.denx.de, Tom Rini Cc: Anand Gore , William Zhang , Kursad Oney , Joel Peshkin , Philippe Reynes , Kamal Dasu , Miquel Raynal , Linus Walleij Subject: [PATCH 03/14] mtd: rawnand: brcmnand: Refactored code to introduce helper functions Date: Sun, 15 Jan 2023 20:53:01 +0100 Message-Id: <20230115195312.1477845-4-linus.walleij@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230115195312.1477845-1-linus.walleij@linaro.org> References: <20230115195312.1477845-1-linus.walleij@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Kamal Dasu Refactored NAND ECC and CMD address configuration code to use helper functions. Signed-off-by: Kamal Dasu Signed-off-by: Miquel Raynal [Ported to U-Boot from the Linux kernel] Signed-off-by: Linus Walleij --- drivers/mtd/nand/raw/brcmnand/brcmnand.c | 100 ++++++++++++++--------- 1 file changed, 62 insertions(+), 38 deletions(-) diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index 65aab4be87b9..ede51def5063 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -595,6 +595,54 @@ static inline void brcmnand_write_fc(struct brcmnand_controller *ctrl, __raw_writel(val, ctrl->nand_fc + word * 4); } +static void brcmnand_clear_ecc_addr(struct brcmnand_controller *ctrl) +{ + + /* Clear error addresses */ + brcmnand_write_reg(ctrl, BRCMNAND_UNCORR_ADDR, 0); + brcmnand_write_reg(ctrl, BRCMNAND_CORR_ADDR, 0); + brcmnand_write_reg(ctrl, BRCMNAND_UNCORR_EXT_ADDR, 0); + brcmnand_write_reg(ctrl, BRCMNAND_CORR_EXT_ADDR, 0); +} + +static u64 brcmnand_get_uncorrecc_addr(struct brcmnand_controller *ctrl) +{ + u64 err_addr; + + err_addr = brcmnand_read_reg(ctrl, BRCMNAND_UNCORR_ADDR); + err_addr |= ((u64)(brcmnand_read_reg(ctrl, + BRCMNAND_UNCORR_EXT_ADDR) + & 0xffff) << 32); + + return err_addr; +} + +static u64 brcmnand_get_correcc_addr(struct brcmnand_controller *ctrl) +{ + u64 err_addr; + + err_addr = brcmnand_read_reg(ctrl, BRCMNAND_CORR_ADDR); + err_addr |= ((u64)(brcmnand_read_reg(ctrl, + BRCMNAND_CORR_EXT_ADDR) + & 0xffff) << 32); + + return err_addr; +} + +static void brcmnand_set_cmd_addr(struct mtd_info *mtd, u64 addr) +{ + struct nand_chip *chip = mtd_to_nand(mtd); + struct brcmnand_host *host = nand_get_controller_data(chip); + struct brcmnand_controller *ctrl = host->ctrl; + + brcmnand_write_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS, + (host->cs << 16) | ((addr >> 32) & 0xffff)); + (void)brcmnand_read_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS); + brcmnand_write_reg(ctrl, BRCMNAND_CMD_ADDRESS, + lower_32_bits(addr)); + (void)brcmnand_read_reg(ctrl, BRCMNAND_CMD_ADDRESS); +} + static inline u16 brcmnand_cs_offset(struct brcmnand_controller *ctrl, int cs, enum brcmnand_cs_reg reg) { @@ -1242,9 +1290,12 @@ static void brcmnand_send_cmd(struct brcmnand_host *host, int cmd) { struct brcmnand_controller *ctrl = host->ctrl; int ret; + u64 cmd_addr; + + cmd_addr = brcmnand_read_reg(ctrl, BRCMNAND_CMD_ADDRESS); + + dev_dbg(ctrl->dev, "send native cmd %d addr 0x%llx\n", cmd, cmd_addr); - dev_dbg(ctrl->dev, "send native cmd %d addr_lo 0x%x\n", cmd, - brcmnand_read_reg(ctrl, BRCMNAND_CMD_ADDRESS)); BUG_ON(ctrl->cmd_pending != 0); ctrl->cmd_pending = cmd; @@ -1417,12 +1468,7 @@ static void brcmnand_cmdfunc(struct mtd_info *mtd, unsigned command, if (!native_cmd) return; - brcmnand_write_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS, - (host->cs << 16) | ((addr >> 32) & 0xffff)); - (void)brcmnand_read_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS); - brcmnand_write_reg(ctrl, BRCMNAND_CMD_ADDRESS, lower_32_bits(addr)); - (void)brcmnand_read_reg(ctrl, BRCMNAND_CMD_ADDRESS); - + brcmnand_set_cmd_addr(mtd, addr); brcmnand_send_cmd(host, native_cmd); brcmnand_waitfunc(mtd, chip); @@ -1652,20 +1698,10 @@ static int brcmnand_read_by_pio(struct mtd_info *mtd, struct nand_chip *chip, struct brcmnand_controller *ctrl = host->ctrl; int i, j, ret = 0; - /* Clear error addresses */ - brcmnand_write_reg(ctrl, BRCMNAND_UNCORR_ADDR, 0); - brcmnand_write_reg(ctrl, BRCMNAND_CORR_ADDR, 0); - brcmnand_write_reg(ctrl, BRCMNAND_UNCORR_EXT_ADDR, 0); - brcmnand_write_reg(ctrl, BRCMNAND_CORR_EXT_ADDR, 0); - - brcmnand_write_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS, - (host->cs << 16) | ((addr >> 32) & 0xffff)); - (void)brcmnand_read_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS); + brcmnand_clear_ecc_addr(ctrl); for (i = 0; i < trans; i++, addr += FC_BYTES) { - brcmnand_write_reg(ctrl, BRCMNAND_CMD_ADDRESS, - lower_32_bits(addr)); - (void)brcmnand_read_reg(ctrl, BRCMNAND_CMD_ADDRESS); + brcmnand_set_cmd_addr(mtd, addr); /* SPARE_AREA_READ does not use ECC, so just use PAGE_READ */ brcmnand_send_cmd(host, CMD_PAGE_READ); brcmnand_waitfunc(mtd, chip); @@ -1685,21 +1721,15 @@ static int brcmnand_read_by_pio(struct mtd_info *mtd, struct nand_chip *chip, host->hwcfg.sector_size_1k); if (ret != -EBADMSG) { - *err_addr = brcmnand_read_reg(ctrl, - BRCMNAND_UNCORR_ADDR) | - ((u64)(brcmnand_read_reg(ctrl, - BRCMNAND_UNCORR_EXT_ADDR) - & 0xffff) << 32); + *err_addr = brcmnand_get_uncorrecc_addr(ctrl); + if (*err_addr) ret = -EBADMSG; } if (!ret) { - *err_addr = brcmnand_read_reg(ctrl, - BRCMNAND_CORR_ADDR) | - ((u64)(brcmnand_read_reg(ctrl, - BRCMNAND_CORR_EXT_ADDR) - & 0xffff) << 32); + *err_addr = brcmnand_get_correcc_addr(ctrl); + if (*err_addr) ret = -EUCLEAN; } @@ -1773,7 +1803,7 @@ static int brcmnand_read(struct mtd_info *mtd, struct nand_chip *chip, dev_dbg(ctrl->dev, "read %llx -> %p\n", (unsigned long long)addr, buf); try_dmaread: - brcmnand_write_reg(ctrl, BRCMNAND_UNCORR_COUNT, 0); + brcmnand_clear_ecc_addr(ctrl); #ifndef __UBOOT__ if (has_flash_dma(ctrl) && !oob && flash_dma_buf_ok(buf)) { @@ -1927,15 +1957,9 @@ static int brcmnand_write(struct mtd_info *mtd, struct nand_chip *chip, } #endif /* __UBOOT__ */ - brcmnand_write_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS, - (host->cs << 16) | ((addr >> 32) & 0xffff)); - (void)brcmnand_read_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS); - for (i = 0; i < trans; i++, addr += FC_BYTES) { /* full address MUST be set before populating FC */ - brcmnand_write_reg(ctrl, BRCMNAND_CMD_ADDRESS, - lower_32_bits(addr)); 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[92.34.216.5]) by smtp.gmail.com with ESMTPSA id r12-20020ac252ac000000b004aab0ca795csm4780439lfm.211.2023.01.15.11.53.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 Jan 2023 11:53:33 -0800 (PST) From: Linus Walleij To: u-boot@lists.denx.de, Tom Rini Cc: Anand Gore , William Zhang , Kursad Oney , Joel Peshkin , Philippe Reynes , Kamal Dasu , Miquel Raynal , Linus Walleij Subject: [PATCH 04/14] mtd: rawnand: brcmnand: Add support for v7.3 controller Date: Sun, 15 Jan 2023 20:53:02 +0100 Message-Id: <20230115195312.1477845-5-linus.walleij@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230115195312.1477845-1-linus.walleij@linaro.org> References: <20230115195312.1477845-1-linus.walleij@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Kamal Dasu This change adds support for brcm NAND v7.3 controller. This controller uses a newer version of flash_dma engine and change mostly implements these differences. Signed-off-by: Kamal Dasu Signed-off-by: Miquel Raynal [Ported to U-Boot from the Linux kernel] Signed-off-by: Linus Walleij --- drivers/mtd/nand/raw/brcmnand/brcmnand.c | 106 ++++++++++++++++++----- 1 file changed, 84 insertions(+), 22 deletions(-) diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index ede51def5063..ef73205d8c18 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -86,6 +86,12 @@ struct brcm_nand_dma_desc { #define FLASH_DMA_ECC_ERROR (1 << 8) #define FLASH_DMA_CORR_ERROR (1 << 9) +/* Bitfields for DMA_MODE */ +#define FLASH_DMA_MODE_STOP_ON_ERROR BIT(1) /* stop in Uncorr ECC error */ +#define FLASH_DMA_MODE_MODE BIT(0) /* link list */ +#define FLASH_DMA_MODE_MASK (FLASH_DMA_MODE_STOP_ON_ERROR | \ + FLASH_DMA_MODE_MODE) + /* 512B flash cache in the NAND controller HW */ #define FC_SHIFT 9U #define FC_BYTES 512U @@ -98,6 +104,53 @@ struct brcm_nand_dma_desc { #define NAND_CTRL_RDY (INTFC_CTLR_READY | INTFC_FLASH_READY) #define NAND_POLL_STATUS_TIMEOUT_MS 100 +/* flash_dma registers */ +enum flash_dma_reg { + FLASH_DMA_REVISION = 0, + FLASH_DMA_FIRST_DESC, + FLASH_DMA_FIRST_DESC_EXT, + FLASH_DMA_CTRL, + FLASH_DMA_MODE, + FLASH_DMA_STATUS, + FLASH_DMA_INTERRUPT_DESC, + FLASH_DMA_INTERRUPT_DESC_EXT, + FLASH_DMA_ERROR_STATUS, + FLASH_DMA_CURRENT_DESC, + FLASH_DMA_CURRENT_DESC_EXT, +}; + +#ifndef __UBOOT__ +/* flash_dma registers v1*/ +static const u16 flash_dma_regs_v1[] = { + [FLASH_DMA_REVISION] = 0x00, + [FLASH_DMA_FIRST_DESC] = 0x04, + [FLASH_DMA_FIRST_DESC_EXT] = 0x08, + [FLASH_DMA_CTRL] = 0x0c, + [FLASH_DMA_MODE] = 0x10, + [FLASH_DMA_STATUS] = 0x14, + [FLASH_DMA_INTERRUPT_DESC] = 0x18, + [FLASH_DMA_INTERRUPT_DESC_EXT] = 0x1c, + [FLASH_DMA_ERROR_STATUS] = 0x20, + [FLASH_DMA_CURRENT_DESC] = 0x24, + [FLASH_DMA_CURRENT_DESC_EXT] = 0x28, +}; + +/* flash_dma registers v4 */ +static const u16 flash_dma_regs_v4[] = { + [FLASH_DMA_REVISION] = 0x00, + [FLASH_DMA_FIRST_DESC] = 0x08, + [FLASH_DMA_FIRST_DESC_EXT] = 0x0c, + [FLASH_DMA_CTRL] = 0x10, + [FLASH_DMA_MODE] = 0x14, + [FLASH_DMA_STATUS] = 0x18, + [FLASH_DMA_INTERRUPT_DESC] = 0x20, + [FLASH_DMA_INTERRUPT_DESC_EXT] = 0x24, + [FLASH_DMA_ERROR_STATUS] = 0x28, + [FLASH_DMA_CURRENT_DESC] = 0x30, + [FLASH_DMA_CURRENT_DESC_EXT] = 0x34, +}; +#endif /* __UBOOT__ */ + /* Controller feature flags */ enum { BRCMNAND_HAS_1K_SECTORS = BIT(0), @@ -135,6 +188,8 @@ struct brcmnand_controller { /* List of NAND hosts (one for each chip-select) */ struct list_head host_list; + /* flash_dma reg */ + const u16 *flash_dma_offsets; struct brcm_nand_dma_desc *dma_desc; dma_addr_t dma_pa; @@ -473,7 +528,7 @@ static int brcmnand_revision_init(struct brcmnand_controller *ctrl) /* Register offsets */ if (ctrl->nand_version >= 0x0702) ctrl->reg_offsets = brcmnand_regs_v72; - else if (ctrl->nand_version >= 0x0701) + else if (ctrl->nand_version == 0x0701) ctrl->reg_offsets = brcmnand_regs_v71; else if (ctrl->nand_version >= 0x0600) ctrl->reg_offsets = brcmnand_regs_v60; @@ -518,7 +573,7 @@ static int brcmnand_revision_init(struct brcmnand_controller *ctrl) } /* Maximum spare area sector size (per 512B) */ - if (ctrl->nand_version >= 0x0702) + if (ctrl->nand_version == 0x0702) ctrl->max_oob = 128; else if (ctrl->nand_version >= 0x0600) ctrl->max_oob = 64; @@ -553,6 +608,17 @@ static int brcmnand_revision_init(struct brcmnand_controller *ctrl) return 0; } +#ifndef __UBOOT__ +static void brcmnand_flash_dma_revision_init(struct brcmnand_controller *ctrl) +{ + /* flash_dma register offsets */ + if (ctrl->nand_version >= 0x0703) + ctrl->flash_dma_offsets = flash_dma_regs_v4; + else + ctrl->flash_dma_offsets = flash_dma_regs_v1; +} +#endif /* __UBOOT__ */ + static inline u32 brcmnand_read_reg(struct brcmnand_controller *ctrl, enum brcmnand_reg reg) { @@ -675,7 +741,7 @@ static void brcmnand_wr_corr_thresh(struct brcmnand_host *host, u8 val) enum brcmnand_reg reg = BRCMNAND_CORR_THRESHOLD; int cs = host->cs; - if (ctrl->nand_version >= 0x0702) + if (ctrl->nand_version == 0x0702) bits = 7; else if (ctrl->nand_version >= 0x0600) bits = 6; @@ -729,7 +795,7 @@ enum { static inline u32 brcmnand_spare_area_mask(struct brcmnand_controller *ctrl) { - if (ctrl->nand_version >= 0x0702) + if (ctrl->nand_version == 0x0702) return GENMASK(7, 0); else if (ctrl->nand_version >= 0x0600) return GENMASK(6, 0); @@ -877,20 +943,6 @@ static inline void brcmnand_set_wp(struct brcmnand_controller *ctrl, bool en) * Flash DMA ***********************************************************************/ -enum flash_dma_reg { - FLASH_DMA_REVISION = 0x00, - FLASH_DMA_FIRST_DESC = 0x04, - FLASH_DMA_FIRST_DESC_EXT = 0x08, - FLASH_DMA_CTRL = 0x0c, - FLASH_DMA_MODE = 0x10, - FLASH_DMA_STATUS = 0x14, - FLASH_DMA_INTERRUPT_DESC = 0x18, - FLASH_DMA_INTERRUPT_DESC_EXT = 0x1c, - FLASH_DMA_ERROR_STATUS = 0x20, - FLASH_DMA_CURRENT_DESC = 0x24, - FLASH_DMA_CURRENT_DESC_EXT = 0x28, -}; - static inline bool has_flash_dma(struct brcmnand_controller *ctrl) { return ctrl->flash_dma_base; @@ -906,14 +958,19 @@ static inline bool flash_dma_buf_ok(const void *buf) #endif /* __UBOOT__ */ } -static inline void flash_dma_writel(struct brcmnand_controller *ctrl, u8 offs, - u32 val) +static inline void flash_dma_writel(struct brcmnand_controller *ctrl, + enum flash_dma_reg dma_reg, u32 val) { + u16 offs = ctrl->flash_dma_offsets[dma_reg]; + brcmnand_writel(val, ctrl->flash_dma_base + offs); } -static inline u32 flash_dma_readl(struct brcmnand_controller *ctrl, u8 offs) +static inline u32 flash_dma_readl(struct brcmnand_controller *ctrl, + enum flash_dma_reg dma_reg) { + u16 offs = ctrl->flash_dma_offsets[dma_reg]; + return brcmnand_readl(ctrl->flash_dma_base + offs); } @@ -2522,6 +2579,7 @@ static const struct of_device_id brcmnand_of_match[] = { { .compatible = "brcm,brcmnand-v7.0" }, { .compatible = "brcm,brcmnand-v7.1" }, { .compatible = "brcm,brcmnand-v7.2" }, + { .compatible = "brcm,brcmnand-v7.3" }, {}, }; MODULE_DEVICE_TABLE(of, brcmnand_of_match); @@ -2652,7 +2710,11 @@ int brcmnand_probe(struct udevice *dev, struct brcmnand_soc *soc) goto err; } - flash_dma_writel(ctrl, FLASH_DMA_MODE, 1); /* linked-list */ + /* initialize the dma version */ + brcmnand_flash_dma_revision_init(ctrl); + + /* linked-list and stop on error */ + flash_dma_writel(ctrl, FLASH_DMA_MODE, FLASH_DMA_MODE_MASK); flash_dma_writel(ctrl, FLASH_DMA_ERROR_STATUS, 0); /* Allocate descriptor(s) */ From patchwork Sun Jan 15 19:53:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 642952 Delivered-To: patch@linaro.org Received: by 2002:a17:522:b9de:b0:4b9:b062:db3b with SMTP id fj30csp250921pvb; Sun, 15 Jan 2023 11:54:37 -0800 (PST) X-Google-Smtp-Source: AMrXdXsoTOZAnR3uKdO1XKtOmmh6z8iNrFvdq6MufX6taXSQHHC76c9o8y1m/t1qOe06UlQTtncp X-Received: by 2002:a05:6808:3096:b0:35e:bb7f:81b1 with SMTP id bl22-20020a056808309600b0035ebb7f81b1mr50273835oib.6.1673812477484; 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[92.34.216.5]) by smtp.gmail.com with ESMTPSA id r12-20020ac252ac000000b004aab0ca795csm4780439lfm.211.2023.01.15.11.53.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 Jan 2023 11:53:35 -0800 (PST) From: Linus Walleij To: u-boot@lists.denx.de, Tom Rini Cc: Anand Gore , William Zhang , Kursad Oney , Joel Peshkin , Philippe Reynes , Claire Lin , Ray Jui , Kamal Dasu , Miquel Raynal , Linus Walleij Subject: [PATCH 05/14] mtd: rawnand: brcmnand: Fix ecc chunk calculation for erased page bitfips Date: Sun, 15 Jan 2023 20:53:03 +0100 Message-Id: <20230115195312.1477845-6-linus.walleij@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230115195312.1477845-1-linus.walleij@linaro.org> References: <20230115195312.1477845-1-linus.walleij@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Claire Lin In brcmstb_nand_verify_erased_page(), the ECC chunk pointer calculation while correcting erased page bitflips is wrong, fix it. Fixes: 02b88eea9f9c ("mtd: brcmnand: Add check for erased page bitflips") Signed-off-by: Claire Lin Reviewed-by: Ray Jui Signed-off-by: Kamal Dasu Signed-off-by: Miquel Raynal [Ported to U-Boot from the Linux kernel] Signed-off-by: Linus Walleij --- drivers/mtd/nand/raw/brcmnand/brcmnand.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index ef73205d8c18..bbaf403d2a03 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -1817,6 +1817,7 @@ static int brcmstb_nand_verify_erased_page(struct mtd_info *mtd, int bitflips = 0; int page = addr >> chip->page_shift; int ret; + void *ecc_chunk; if (!buf) { #ifndef __UBOOT__ @@ -1836,7 +1837,9 @@ static int brcmstb_nand_verify_erased_page(struct mtd_info *mtd, return ret; for (i = 0; i < chip->ecc.steps; i++, oob += sas) { - ret = nand_check_erased_ecc_chunk(buf, chip->ecc.size, + ecc_chunk = buf + chip->ecc.size * i; + ret = nand_check_erased_ecc_chunk(ecc_chunk, + chip->ecc.size, oob, sas, NULL, 0, chip->ecc.strength); if (ret < 0) From patchwork Sun Jan 15 19:53:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 642953 Delivered-To: patch@linaro.org Received: by 2002:a17:522:b9de:b0:4b9:b062:db3b with SMTP id fj30csp250977pvb; Sun, 15 Jan 2023 11:54:49 -0800 (PST) X-Google-Smtp-Source: AMrXdXvWQpAIa8GIAjwf+XvQP5IUPLyctktIkDdQ9gTEaIdnzwInEyWeSfCI5f39tYpwfFIr9eDu X-Received: by 2002:a05:6808:2119:b0:360:e8d6:fe81 with SMTP id r25-20020a056808211900b00360e8d6fe81mr11574665oiw.35.1673812489458; Sun, 15 Jan 2023 11:54:49 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1673812489; cv=none; d=google.com; s=arc-20160816; b=U8hwkmjrA1jeqoQuq+KfVTwRY4gpkbsjXNw1HBTuUNRZB0xTZhozhKqUDJXHrn5uJJ bVhEBMzceNyIWZ4KUIGyYUEiEia5euUFNDOaacnamxG5dEkbJT0thPG95xx62IvR8ikP kzjNPC0oTO6PBCYIY/bKyGGGiN3JHqGkwEirWgySy4dVDWzmFYG3VWXJca8kmt5O7RsZ Ovtt8/WY0Js3vlYrH9CXw649y6PcQ2Q9LFUf+lCbzf01oCgrGUbLCKL4SI4kWGYovxPt 4ItLAlyVCiE5ortMfSnGY/GUlqhc5nyfngn533cXl/PHjNzD+zOqbRZGhwFdzDH7dkGC B+nA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=hleifINoKSJcvOOW97S95HhXuiYRV/pmpWjLNU7J8Ac=; b=xpwN4B5UcUHptA+oYqgU/wp5Xvf5TL/wRtiTjZNlUR/GDK2M9sVy2lUC8hzibqOoUV WsqHvAHddfJAcSMYEfshsg7VIOuoj2ZR6cBSgamAKg1Uv9LDYSrAM3mH+WEH+0/gtTbC CeGoZytXLTmKcrMNVFfZTxFFRUFELGf4lwUCWscIvmHA+adiDFyazSPNcdn9nY35pTYo XlAdpGecnjH9zbNf+Nqnx6LXp+ivBM7KQucI1gkYgYVuCe5Q3UZY4ufIAYPmuGXf3nNh YP+Pfug+pud8vYIcU7RuHzS7p3OifBjcAxV9aHkM9w9QkJv/zGZbIh6EiQIDHDI4NziC sSfA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="bCXIMhy/"; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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[92.34.216.5]) by smtp.gmail.com with ESMTPSA id r12-20020ac252ac000000b004aab0ca795csm4780439lfm.211.2023.01.15.11.53.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 Jan 2023 11:53:37 -0800 (PST) From: Linus Walleij To: u-boot@lists.denx.de, Tom Rini Cc: Anand Gore , William Zhang , Kursad Oney , Joel Peshkin , Philippe Reynes , Kamal Dasu , Miquel Raynal , Linus Walleij Subject: [PATCH 06/14] mtd: nand: brcmnand: Add support for flash-dma v0 Date: Sun, 15 Jan 2023 20:53:04 +0100 Message-Id: <20230115195312.1477845-7-linus.walleij@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230115195312.1477845-1-linus.walleij@linaro.org> References: <20230115195312.1477845-1-linus.walleij@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Kamal Dasu This change adds support for flash dma v0.0. Signed-off-by: Kamal Dasu Signed-off-by: Miquel Raynal [Ported to U-Boot from the Linux kernel] Signed-off-by: Linus Walleij --- drivers/mtd/nand/raw/brcmnand/brcmnand.c | 21 +++++++++++++++++++-- 1 file changed, 19 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index bbaf403d2a03..fdc1fc6c1043 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -120,6 +120,18 @@ enum flash_dma_reg { }; #ifndef __UBOOT__ +/* flash_dma registers v0*/ +static const u16 flash_dma_regs_v0[] = { + [FLASH_DMA_REVISION] = 0x00, + [FLASH_DMA_FIRST_DESC] = 0x04, + [FLASH_DMA_CTRL] = 0x08, + [FLASH_DMA_MODE] = 0x0c, + [FLASH_DMA_STATUS] = 0x10, + [FLASH_DMA_INTERRUPT_DESC] = 0x14, + [FLASH_DMA_ERROR_STATUS] = 0x18, + [FLASH_DMA_CURRENT_DESC] = 0x1c, +}; + /* flash_dma registers v1*/ static const u16 flash_dma_regs_v1[] = { [FLASH_DMA_REVISION] = 0x00, @@ -614,6 +626,8 @@ static void brcmnand_flash_dma_revision_init(struct brcmnand_controller *ctrl) /* flash_dma register offsets */ if (ctrl->nand_version >= 0x0703) ctrl->flash_dma_offsets = flash_dma_regs_v4; + else if (ctrl->nand_version == 0x0602) + ctrl->flash_dma_offsets = flash_dma_regs_v0; else ctrl->flash_dma_offsets = flash_dma_regs_v1; } @@ -1697,8 +1711,11 @@ static void brcmnand_dma_run(struct brcmnand_host *host, dma_addr_t desc) flash_dma_writel(ctrl, FLASH_DMA_FIRST_DESC, lower_32_bits(desc)); (void)flash_dma_readl(ctrl, FLASH_DMA_FIRST_DESC); - flash_dma_writel(ctrl, FLASH_DMA_FIRST_DESC_EXT, upper_32_bits(desc)); - (void)flash_dma_readl(ctrl, FLASH_DMA_FIRST_DESC_EXT); + if (ctrl->nand_version > 0x0602) { + flash_dma_writel(ctrl, FLASH_DMA_FIRST_DESC_EXT, + upper_32_bits(desc)); + (void)flash_dma_readl(ctrl, FLASH_DMA_FIRST_DESC_EXT); + } /* Start FLASH_DMA engine */ ctrl->dma_pending = true; From patchwork Sun Jan 15 19:53:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 642954 Delivered-To: patch@linaro.org Received: by 2002:a17:522:b9de:b0:4b9:b062:db3b with SMTP id fj30csp251039pvb; Sun, 15 Jan 2023 11:55:01 -0800 (PST) X-Google-Smtp-Source: AMrXdXvgUhX+K2x5wIXXNKzwEF3PMsNIjwh1r2Z39Vpyo4iuHL5M7kptGArr+Io2DPP+2NREbC1t X-Received: by 2002:a05:6808:2906:b0:35e:7b67:2eca with SMTP id ev6-20020a056808290600b0035e7b672ecamr35195427oib.2.1673812500747; Sun, 15 Jan 2023 11:55:00 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1673812500; cv=none; d=google.com; s=arc-20160816; b=lsOKcZFYDD1fnZS7WGtJ/72fOSNY6JuIX8TwbLY63VsZufwVoJfh9gBL0IqRGlEDEO 2UH5lHnQfhXPnYxmJZhbCbPhv5KUH1R+1/Fc/94PWeK7E03JNXgzikO5EfaiVwm/Z1po 14dllTxxita6HwisZtNz8Apvdsbfz+lH6pzpP28dtCiPeOcFCuE+7LebYFPlPv7OlvBF Rxl1BzLIYblKqDYzZispEEE9ThcX4EW6TTGBojVxmRRF/7G0vfJkZmmRLt2C25kkbCIV DT2OQluCHQiBjJOmih+QXNmwcCplmGmEQhPiVf0RlqKnSu4nDxewUtH1DPCxEGMLOXPd 7cRg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=R/ejN6HxLTHHDXLF7+I38WOnnbW5uVWnufthnnCTFuY=; b=QYLAqtcr0qgZJ/SCWUNxqwydt5PdNxuTdJlxCTD9yCHo3sCZE990sKLnSEO/IaKUxP SyRs6LNOUDZgY3qx7nhfVezZU8qswEehmBU551aAkRer34wT2EVQhV5wTcBM0yY6ipiL xc+pPdSrHHi6JEW7I942h0OZinYasfqoh+ZpQsnFNALtSB5SrHfRRqnlw5bw0DxM2Ozn L+AF38Mu6EInqkfGUy6uzwiaeqxHOwV2xlmBNYj7JoFu2GM7YO/qoRrtBiXDW7spuUJV sb1/foqKWRcmqvymbQsCfpia7HZBGY2C5tFqkU1mw2EAahdR6k8qCCH2PhWTpTwn/tXT lLKQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=gJXRrElF; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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[92.34.216.5]) by smtp.gmail.com with ESMTPSA id r12-20020ac252ac000000b004aab0ca795csm4780439lfm.211.2023.01.15.11.53.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 Jan 2023 11:53:39 -0800 (PST) From: Linus Walleij To: u-boot@lists.denx.de, Tom Rini Cc: Anand Gore , William Zhang , Kursad Oney , Joel Peshkin , Philippe Reynes , =?utf-8?q?=C3=81lvaro_Fer?= =?utf-8?q?n=C3=A1ndez_Rojas?= , stable@vger.kernel.org, Miquel Raynal , Linus Walleij Subject: [PATCH 07/14] mtd: rawnand: brcmnand: fix hamming oob layout Date: Sun, 15 Jan 2023 20:53:05 +0100 Message-Id: <20230115195312.1477845-8-linus.walleij@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230115195312.1477845-1-linus.walleij@linaro.org> References: <20230115195312.1477845-1-linus.walleij@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Álvaro Fernández Rojas First 2 bytes are used in large-page nand. Fixes: ef5eeea6e911 ("mtd: nand: brcm: switch to mtd_ooblayout_ops") Cc: stable@vger.kernel.org Signed-off-by: Álvaro Fernández Rojas Signed-off-by: Miquel Raynal Link: https://lore.kernel.org/linux-mtd/20200512075733.745374-2-noltari@gmail.com [Ported to U-Boot from the Linux kernel] Signed-off-by: Linus Walleij --- drivers/mtd/nand/raw/brcmnand/brcmnand.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index fdc1fc6c1043..7cb6f2651250 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -1059,11 +1059,14 @@ static int brcmnand_hamming_ooblayout_free(struct mtd_info *mtd, int section, if (!section) { /* * Small-page NAND use byte 6 for BBI while large-page - * NAND use byte 0. + * NAND use bytes 0 and 1. */ - if (cfg->page_size > 512) - oobregion->offset++; - oobregion->length--; + if (cfg->page_size > 512) { + oobregion->offset += 2; + oobregion->length -= 2; + } else { + oobregion->length--; + } } } From patchwork Sun Jan 15 19:53:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 642955 Delivered-To: patch@linaro.org Received: by 2002:a17:522:b9de:b0:4b9:b062:db3b with SMTP id fj30csp251108pvb; Sun, 15 Jan 2023 11:55:14 -0800 (PST) X-Google-Smtp-Source: AMrXdXuzw9j3zpK606x16D4zapzPh3Zrc8iCXedaItrRm2RId8YF9rymWiiXesvufEjmqKib1Dzu X-Received: by 2002:a05:6871:4307:b0:15f:193d:37f1 with SMTP id lu7-20020a056871430700b0015f193d37f1mr2389697oab.5.1673812513699; Sun, 15 Jan 2023 11:55:13 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1673812513; cv=none; d=google.com; s=arc-20160816; b=iPUCfESrCtEYNZ8s+yesGhTPWDKN+nnRJ+SmKsmKxTuKUecUySgU4BANUBAGv+z+fz R9sivETnhxNYx+0M9WVNkdeg8EYvst04B3SG0Dem+YmdVSe33GjPeFxILj+onW1nND8O UD3VSmsXJn/qMCnvho4JmdCEnmG1PwM9SFTOK4Cy32yMip2SWv6fRi4+aKEo9tbhAYMr YCWOrmZ/x9uxodMPOOKQoi1VFfCciDSyO47bQia99OgOkj4MyA5tEhAvLAu1B5i3SQKP jPiVnGNN24PL7ZlPUuylvMcnhXCQW/DgTh/L5VpsN6tUPQPCcILjSMj+7ZEdgk6dZSjL MrQQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=NbBdtYS7ES3bn+CKQckBE4ZAU2uZNNmorTZjk223ioc=; b=NYSGJILOp9OT2uBEDsAnzlPeSP1XQGQ45WXemrhOHl9BrM3E8P46T+1eST5685XsYv tiOUr/yKVT5+MkVjMf6PexW94qM4UneHLT6G0HBsVPvW6CDT7P0538otq6c/yT383MIk QpltGHQyhld5zf1eXVls/kepspIVPl/iDoLAeC2su4UfRSzbFrJDQFm/KXSCAaTlaWhA IWDXtNlTiL1CvOp7gXDrDqBy44vDMVx6cmQTk4C+j/WzgEBpCSUep+Drw9emAtZGRMIi zYeRIIRmoVvjGrAVzE4Gh6cyc60INbQkEQIcScvaWHfmGvEg/4yfvYN8zH/ur4tuA5kX P3UQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="L3fEv/c+"; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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[92.34.216.5]) by smtp.gmail.com with ESMTPSA id r12-20020ac252ac000000b004aab0ca795csm4780439lfm.211.2023.01.15.11.53.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 Jan 2023 11:53:41 -0800 (PST) From: Linus Walleij To: u-boot@lists.denx.de, Tom Rini Cc: Anand Gore , William Zhang , Kursad Oney , Joel Peshkin , Philippe Reynes , =?utf-8?q?=C3=81lvaro_Fer?= =?utf-8?q?n=C3=A1ndez_Rojas?= , Miquel Raynal , Linus Walleij Subject: [PATCH 08/14] mtd: rawnand: brcmnand: improve hamming oob layout Date: Sun, 15 Jan 2023 20:53:06 +0100 Message-Id: <20230115195312.1477845-9-linus.walleij@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230115195312.1477845-1-linus.walleij@linaro.org> References: <20230115195312.1477845-1-linus.walleij@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Álvaro Fernández Rojas The current code generates 8 oob sections: S1 1-5 ECC 6-8 S2 9-15 S3 16-21 ECC 22-24 S4 25-31 S5 32-37 ECC 38-40 S6 41-47 S7 48-53 ECC 54-56 S8 57-63 Change it by merging continuous sections: S1 1-5 ECC 6-8 S2 9-21 ECC 22-24 S3 25-37 ECC 38-40 S4 41-53 ECC 54-56 S5 57-63 Signed-off-by: Álvaro Fernández Rojas Signed-off-by: Miquel Raynal Link: https://lore.kernel.org/linux-mtd/20200512075733.745374-3-noltari@gmail.com [Ported to U-Boot from the Linux kernel] Signed-off-by: Linus Walleij --- drivers/mtd/nand/raw/brcmnand/brcmnand.c | 35 +++++++++++------------- 1 file changed, 16 insertions(+), 19 deletions(-) diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index 7cb6f2651250..d082801b8306 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -1043,33 +1043,30 @@ static int brcmnand_hamming_ooblayout_free(struct mtd_info *mtd, int section, struct brcmnand_cfg *cfg = &host->hwcfg; int sas = cfg->spare_area_size << cfg->sector_size_1k; int sectors = cfg->page_size / (512 << cfg->sector_size_1k); + u32 next; - if (section >= sectors * 2) + if (section > sectors) return -ERANGE; - oobregion->offset = (section / 2) * sas; + next = (section * sas); + if (section < sectors) + next += 6; - if (section & 1) { - oobregion->offset += 9; - oobregion->length = 7; + if (section) { + oobregion->offset = ((section - 1) * sas) + 9; } else { - oobregion->length = 6; - - /* First sector of each page may have BBI */ - if (!section) { - /* - * Small-page NAND use byte 6 for BBI while large-page - * NAND use bytes 0 and 1. - */ - if (cfg->page_size > 512) { - oobregion->offset += 2; - oobregion->length -= 2; - } else { - oobregion->length--; - } + if (cfg->page_size > 512) { + /* Large page NAND uses first 2 bytes for BBI */ + oobregion->offset = 2; + } else { + /* Small page NAND uses last byte before ECC for BBI */ + oobregion->offset = 0; + next--; } } + oobregion->length = next - oobregion->offset; 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[92.34.216.5]) by smtp.gmail.com with ESMTPSA id r12-20020ac252ac000000b004aab0ca795csm4780439lfm.211.2023.01.15.11.53.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 Jan 2023 11:53:43 -0800 (PST) From: Linus Walleij To: u-boot@lists.denx.de, Tom Rini Cc: Anand Gore , William Zhang , Kursad Oney , Joel Peshkin , Philippe Reynes , =?utf-8?q?=C3=81lvaro_Fer?= =?utf-8?q?n=C3=A1ndez_Rojas?= , Miquel Raynal , Linus Walleij Subject: [PATCH 09/14] mtd: rawnand: brcmnand: correctly verify erased pages Date: Sun, 15 Jan 2023 20:53:07 +0100 Message-Id: <20230115195312.1477845-10-linus.walleij@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230115195312.1477845-1-linus.walleij@linaro.org> References: <20230115195312.1477845-1-linus.walleij@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Álvaro Fernández Rojas The current code checks that the whole OOB area is erased. This is a problem when JFFS2 cleanmarkers are added to the OOB, since it will fail due to the usable OOB bytes not being 0xff. Correct this by only checking that data and ECC bytes aren't 0xff. Fixes: 02b88eea9f9c ("mtd: brcmnand: Add check for erased page bitflips") Signed-off-by: Álvaro Fernández Rojas Signed-off-by: Miquel Raynal Link: https://lore.kernel.org/linux-mtd/20200512082451.771212-1-noltari@gmail.com [Ported to U-Boot from the Linux kernel] Signed-off-by: Linus Walleij --- drivers/mtd/nand/raw/brcmnand/brcmnand.c | 19 +++++++++++-------- 1 file changed, 11 insertions(+), 8 deletions(-) diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index d082801b8306..b87e3e0656df 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -1829,11 +1829,12 @@ static int brcmnand_read_by_pio(struct mtd_info *mtd, struct nand_chip *chip, static int brcmstb_nand_verify_erased_page(struct mtd_info *mtd, struct nand_chip *chip, void *buf, u64 addr) { - int i, sas; - void *oob = chip->oob_poi; + struct mtd_oob_region ecc; + int i; int bitflips = 0; int page = addr >> chip->page_shift; int ret; + void *ecc_bytes; void *ecc_chunk; if (!buf) { @@ -1846,18 +1847,20 @@ static int brcmstb_nand_verify_erased_page(struct mtd_info *mtd, chip->pagebuf = -1; } - sas = mtd->oobsize / chip->ecc.steps; - /* read without ecc for verification */ ret = chip->ecc.read_page_raw(mtd, chip, buf, true, page); if (ret) return ret; - for (i = 0; i < chip->ecc.steps; i++, oob += sas) { + for (i = 0; i < chip->ecc.steps; i++) { ecc_chunk = buf + chip->ecc.size * i; - ret = nand_check_erased_ecc_chunk(ecc_chunk, - chip->ecc.size, - oob, sas, NULL, 0, + + mtd_ooblayout_ecc(mtd, i, &ecc); + ecc_bytes = chip->oob_poi + ecc.offset; + + ret = nand_check_erased_ecc_chunk(ecc_chunk, chip->ecc.size, + ecc_bytes, ecc.length, + NULL, 0, chip->ecc.strength); if (ret < 0) return ret; From patchwork Sun Jan 15 19:53:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 642956 Delivered-To: patch@linaro.org Received: by 2002:a17:522:b9de:b0:4b9:b062:db3b with SMTP id fj30csp251167pvb; Sun, 15 Jan 2023 11:55:25 -0800 (PST) X-Google-Smtp-Source: AMrXdXsNdFxUCBEX6ydLpdZsE6DBTbWGlOuJuSHLLmTdg27xGX9fvKPnicYSb8l9292nfkMyaBWz X-Received: by 2002:a05:6808:1a0b:b0:364:533d:8469 with SMTP id bk11-20020a0568081a0b00b00364533d8469mr11205025oib.24.1673812525386; Sun, 15 Jan 2023 11:55:25 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1673812525; cv=none; d=google.com; s=arc-20160816; b=lTZOSHvav2L3kIICgtUByEvGB7FfztczdBl0+XzH3SJbm4eeLK9GJGrBAPd0iDJ7mo XBCUy8nVdLZc1Nn+5Pl82mtXwz3TWrfqkUW4K34Qe4OEiJhS5+s4MRVZLChSeQ/q4zHv QXhhYn4mgV0JJLtg31vfjmMkVTmYmKNk65/ELALOEC/bhoasPpszSDNYS0HfMTkFoSbE x6ni6++FGunVueziaLOzp1gi7Un922lG8Sg+qzAKZRJRXy5KN8LqiG0trvZVmgn5qF48 VDjr4c71KhvU/ZtQJTmDIx/ehU6EjRRxNS82Nn4vu7sa4fZYYGANQZcedSxFAOFLTEcE zVhw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=kWVZy1tLCv9QYmVr1MKSQYafeRr97iAb92ovxdVifM4=; b=lPwFLU2pmjOGfBBqLA7pXSagOZhq/AGUQM9weNnfZXvwS1XCWGal1L5GOtIkCuAilI 0kevPxqcFSKdbETwixh+cWC+a0WySeoZgahSAHBavZndE9n3titnSAXHmWcPIxnjGbTU zIsYa+fuZR2LVQ2XUPut8rI0cjUdb+NwrqT5eMdEcNUhlDPgxfu/6Ry/gdLm1q0N/5d8 y5FebgXKzSA9bQmWbDx8V/SRlM2QguVaK12Cvzr35Lb5Qp3DZiv2FO+bf1sGtfB8HSuE hh5Z6HcRs7fYQd3ngG4SxO/JcHf1f7kkFGzL/6R3OIWzE7kq8Srq/b13Hc3GPNayoQG9 qtmQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=o3bYpd6W; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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[92.34.216.5]) by smtp.gmail.com with ESMTPSA id r12-20020ac252ac000000b004aab0ca795csm4780439lfm.211.2023.01.15.11.53.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 Jan 2023 11:53:45 -0800 (PST) From: Linus Walleij To: u-boot@lists.denx.de, Tom Rini Cc: Anand Gore , William Zhang , Kursad Oney , Joel Peshkin , Philippe Reynes , =?utf-8?q?=C3=81lvaro_Fer?= =?utf-8?q?n=C3=A1ndez_Rojas?= , Miquel Raynal , Florian Fainelli , Linus Walleij Subject: [PATCH 10/14] mtd: rawnand: brcmnand: rename v4 registers Date: Sun, 15 Jan 2023 20:53:08 +0100 Message-Id: <20230115195312.1477845-11-linus.walleij@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230115195312.1477845-1-linus.walleij@linaro.org> References: <20230115195312.1477845-1-linus.walleij@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Álvaro Fernández Rojas These registers are also used on v3.3. Signed-off-by: Álvaro Fernández Rojas Reviewed-by: Miquel Raynal Acked-by: Florian Fainelli Signed-off-by: Miquel Raynal Link: https://lore.kernel.org/linux-mtd/20200522121524.4161539-2-noltari@gmail.com [Ported to U-Boot from the Linux kernel] Signed-off-by: Linus Walleij --- drivers/mtd/nand/raw/brcmnand/brcmnand.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index b87e3e0656df..effc7f1ea802 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -293,8 +293,8 @@ enum brcmnand_reg { BRCMNAND_FC_BASE, }; -/* BRCMNAND v4.0 */ -static const u16 brcmnand_regs_v40[] = { +/* BRCMNAND v3.3-v4.0 */ +static const u16 brcmnand_regs_v33[] = { [BRCMNAND_CMD_START] = 0x04, [BRCMNAND_CMD_EXT_ADDRESS] = 0x08, [BRCMNAND_CMD_ADDRESS] = 0x0c, @@ -546,8 +546,8 @@ static int brcmnand_revision_init(struct brcmnand_controller *ctrl) ctrl->reg_offsets = brcmnand_regs_v60; else if (ctrl->nand_version >= 0x0500) ctrl->reg_offsets = brcmnand_regs_v50; - else if (ctrl->nand_version >= 0x0400) - ctrl->reg_offsets = brcmnand_regs_v40; + else if (ctrl->nand_version >= 0x0303) + ctrl->reg_offsets = brcmnand_regs_v33; /* Chip-select stride */ if (ctrl->nand_version >= 0x0701) From patchwork Sun Jan 15 19:53:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 642958 Delivered-To: patch@linaro.org Received: by 2002:a17:522:b9de:b0:4b9:b062:db3b with SMTP id fj30csp251254pvb; Sun, 15 Jan 2023 11:55:48 -0800 (PST) X-Google-Smtp-Source: AMrXdXtn2oA7oZxZtroS8BD3bLAoCIGW9lrjdVVg9zx3EKOX4NX6yrxnqrIq3TVeX/6j0CwCuc1O X-Received: by 2002:a05:6808:438b:b0:364:615a:2260 with SMTP id dz11-20020a056808438b00b00364615a2260mr7895141oib.47.1673812548461; Sun, 15 Jan 2023 11:55:48 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1673812548; cv=none; d=google.com; s=arc-20160816; b=pKgLKsH0W6IZh7ocgZMPuI7ptIhdXNB496TlE3CK1FXYhhly4A4zhAqbCd7OBRz87f vHrnMc/E4hpd67b/0xvQsxVuioL2L54VEmXWrlGiEwOknNe7TiACsLx86EAZ12cS1Omc ho0jL872j3NFmhCW2HfeTlixtHRn2Q9JnY/c1EgB9j5zK5GcKP3OGLvr+22Ek2TkShcI z9DaM+2bWwI0AcLA68JgGHvLUTt86yc606kCWl8alxLplof77U+NUsd/QZQB3JXNtWCp LqnpqDZlgSnmGQlTCvGVI20wdHMOOuM1ZqoYIhaGJQXYrikMDhhVCP05IOAkb9zoXNP4 08OQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=gHXQQOFqPOHDrmQDTZEWScxDN+5O4bgLMTUZebCtLxc=; b=b91Yzs+vMJx+CsenWB3o8RyOPBueZcdV9rkZwwJIJ1w3KBpN9TsSu5z3oN5rEl6uRk 7SthkohSpXRnSaG6lsf3livVge9eUJ0yoxIWQnJPn40rx4KpT/Q/dUmz9EQxF6iiXZiX mgv8fc5FXaL81JJZeYnOLYfXcs69LaShj1WusmmsFL+G9Ycc4KiLHx2lIyVd+cElZVJY nzPZx3W1nqfz+xosBbUeI1Iik6BS66nJ1KvchnppylxkdKsBUpEvnSAXqhUEfIxeGo47 fncbStBWT4GSktr3YI5Wt9HaJzTxVI2HiWEjJIS3vvmL27zz0iGSLcZ/88Su1O8YqD41 x0SQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=sPeopwu0; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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[92.34.216.5]) by smtp.gmail.com with ESMTPSA id r12-20020ac252ac000000b004aab0ca795csm4780439lfm.211.2023.01.15.11.53.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 Jan 2023 11:53:47 -0800 (PST) From: Linus Walleij To: u-boot@lists.denx.de, Tom Rini Cc: Anand Gore , William Zhang , Kursad Oney , Joel Peshkin , Philippe Reynes , =?utf-8?q?=C3=81lvaro_Fer?= =?utf-8?q?n=C3=A1ndez_Rojas?= , Florian Fainelli , Miquel Raynal , Linus Walleij Subject: [PATCH 11/14] mtd: rawnand: brcmnand: fix CS0 layout Date: Sun, 15 Jan 2023 20:53:09 +0100 Message-Id: <20230115195312.1477845-12-linus.walleij@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230115195312.1477845-1-linus.walleij@linaro.org> References: <20230115195312.1477845-1-linus.walleij@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Álvaro Fernández Rojas Only v3.3-v5.0 have a different CS0 layout. Controllers before v3.3 use the same layout for every CS. Fixes: 27c5b17cd1b1 ("mtd: nand: add NAND driver "library" for Broadcom STB NAND controller") Signed-off-by: Álvaro Fernández Rojas Acked-by: Florian Fainelli Signed-off-by: Miquel Raynal Link: https://lore.kernel.org/linux-mtd/20200522121524.4161539-3-noltari@gmail.com [Ported to U-Boot from the Linux kernel] Signed-off-by: Linus Walleij --- drivers/mtd/nand/raw/brcmnand/brcmnand.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index effc7f1ea802..c02d34ffbc95 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -561,8 +561,9 @@ static int brcmnand_revision_init(struct brcmnand_controller *ctrl) } else { ctrl->cs_offsets = brcmnand_cs_offsets; - /* v5.0 and earlier has a different CS0 offset layout */ - if (ctrl->nand_version <= 0x0500) + /* v3.3-5.0 have a different CS0 offset layout */ + if (ctrl->nand_version >= 0x0303 && + ctrl->nand_version <= 0x0500) ctrl->cs0_offsets = brcmnand_cs_offsets_cs0; } From patchwork Sun Jan 15 19:53:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 642959 Delivered-To: patch@linaro.org Received: by 2002:a17:522:b9de:b0:4b9:b062:db3b with SMTP id fj30csp251285pvb; Sun, 15 Jan 2023 11:55:59 -0800 (PST) X-Google-Smtp-Source: AMrXdXvnZM7IpIFiAojF0P0LIPU/un7EZVOOMoJwgblzwr6jBfCECcjwctT56tKxmxVsJOBznrOa X-Received: by 2002:a05:6870:b4ab:b0:150:a0c9:21f with SMTP id y43-20020a056870b4ab00b00150a0c9021fmr10521904oap.35.1673812559449; Sun, 15 Jan 2023 11:55:59 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1673812559; cv=none; d=google.com; s=arc-20160816; b=qr2zpWxncCHofFcjGcY5DRRP2+q1I6eulAu/VQfj6ipS/SYVGXfWeNe5z7456d4pIV lM6BRTKAz0S6YAToiMCh7IyBX5gO6qywO3tQjVw96bHoYc05xBoO7aBzb74snoXGR7r+ Ka/5BFD3CJAtjRvC51KLPBzrMvcLZHz2HOapDV8N8IJsktbI6UVJHS/i2bfSkC1ru5kU SQEqRZ1SxuSFC2FyCYnv2svQL006l+s0h2JKmD36kvTMxkvhM9OSJe1txzvJdNlh1aU2 6LslrB5l3If4LzOwgAEP3ISWiU13wKoZTHJtiOpiU+o7KIAOXqTONt1vlLYV/nHPG1jk AT/w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=zQb9g7CFBZPq3D03AQ3ll53uid9ISKaU20qZ7CiaxeE=; b=ALDqoy/DQwtweflBghZrq5BqYpwByEUL9IYEQP/iFauPMKpTkus/ffxuyUWIHaHgCn r7V9ipVoBX1dmfy/0m6gDtqByDeyidi5syBktG+StDGpmMG6fkbOmp6vky6HA2Lo1JAG 9zmb3JamVTyXKiz9H70k+3mP4XCJzFr3zaXi4eiGB2sAj1U2qCvl1z9dRXDo+DmMBprg PUulCD1gO9VBHxngodi3MP60bui/5SHZXRzqPUvYQkZWZWoQbXcqw6aCLqhXDU4irzQV RWTgVUHFRvm1QqaS0o7nB38sHWUzrRMROrZKWFFQLbIn3pX3VRvdB6IYEFwpAc0zBLk6 NyZA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=mvGXiEEy; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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[92.34.216.5]) by smtp.gmail.com with ESMTPSA id r12-20020ac252ac000000b004aab0ca795csm4780439lfm.211.2023.01.15.11.53.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 Jan 2023 11:53:49 -0800 (PST) From: Linus Walleij To: u-boot@lists.denx.de, Tom Rini Cc: Anand Gore , William Zhang , Kursad Oney , Joel Peshkin , Philippe Reynes , =?utf-8?q?=C3=81lvaro_Fer?= =?utf-8?q?n=C3=A1ndez_Rojas?= , Florian Fainelli , Miquel Raynal , Linus Walleij Subject: [PATCH 12/14] mtd: rawnand: brcmnand: rename page sizes Date: Sun, 15 Jan 2023 20:53:10 +0100 Message-Id: <20230115195312.1477845-13-linus.walleij@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230115195312.1477845-1-linus.walleij@linaro.org> References: <20230115195312.1477845-1-linus.walleij@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Álvaro Fernández Rojas Current pages sizes apply to controllers after v3.4 Signed-off-by: Álvaro Fernández Rojas Acked-by: Florian Fainelli Signed-off-by: Miquel Raynal Link: https://lore.kernel.org/linux-mtd/20200522121524.4161539-4-noltari@gmail.com [Ported to U-Boot from the Linux kernel] Signed-off-by: Linus Walleij --- drivers/mtd/nand/raw/brcmnand/brcmnand.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index c02d34ffbc95..934981e2f3fe 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -526,7 +526,7 @@ static int brcmnand_revision_init(struct brcmnand_controller *ctrl) { static const unsigned int block_sizes_v6[] = { 8, 16, 128, 256, 512, 1024, 2048, 0 }; static const unsigned int block_sizes_v4[] = { 16, 128, 8, 512, 256, 1024, 2048, 0 }; - static const unsigned int page_sizes[] = { 512, 2048, 4096, 8192, 0 }; + static const unsigned int page_sizes_v3_4[] = { 512, 2048, 4096, 8192, 0 }; ctrl->nand_version = nand_readreg(ctrl, 0) & 0xffff; @@ -573,7 +573,7 @@ static int brcmnand_revision_init(struct brcmnand_controller *ctrl) ctrl->max_page_size = 16 * 1024; ctrl->max_block_size = 2 * 1024 * 1024; } else { - ctrl->page_sizes = page_sizes; + ctrl->page_sizes = page_sizes_v3_4; if (ctrl->nand_version >= 0x0600) ctrl->block_sizes = block_sizes_v6; else From patchwork Sun Jan 15 19:53:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 642960 Delivered-To: patch@linaro.org Received: by 2002:a17:522:b9de:b0:4b9:b062:db3b with SMTP id fj30csp251341pvb; Sun, 15 Jan 2023 11:56:11 -0800 (PST) X-Google-Smtp-Source: AMrXdXuuAVwZ9ezbAGA2Exwcfst2bmdg29pyP1ybcbiBS0FtGA9km/AB5a0WsNzrI+kFbYTaTGHl X-Received: by 2002:a05:6830:204e:b0:684:a327:589c with SMTP id f14-20020a056830204e00b00684a327589cmr10773767otp.6.1673812571354; Sun, 15 Jan 2023 11:56:11 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1673812571; cv=none; d=google.com; s=arc-20160816; b=NHXd02USS0/ox00bVlakLsdV8NOR5Wh0BBdvB0gzHwpsT/vgej20KOSX++CR+n7K2m oCVysWkLPZgbBDTl5vwiNvRSQ8luYlqMNerhCBdcR84ZnlbX3QHhUJyvDu8jtiRZ/gm/ urV3YPUxJFkx7QRJ0M7RFlpJDt1ezR/IFjnXn4YCcqrrsg81nWu+wuhXkBKtnvWtkdAv 4GBWIGoeXjfEvusg5LdajKByskUulqYHZ3hG1ScF+zHSxELmYa07CPV80+nWPONhWgSF IlZkcPL+0ntcgNOwJ/g1V6vCwk9ufC8RNQ9mtT3+oH+UF9VUNqnoSsqxKxXLk0hx6dTh ifvw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=6BtRk0Ya7oo4tGMqcvjkrG5TrM/LbtGhSZTnDbiag+o=; b=WHsn9DdJoqrT7YL0KJJcSPs0ZSDS11rab9qjc5HFQkaRv4cyH2slgdeZYFGTwTGy+e oVitJUeiwrS7y5B9c2AMzE4IAIKbBDxFwTuUsE4DKl2KyNR6gnTv8Kcy0WQV1AfGlfN1 +3NfyV6uz6l551snwouvVmZlhuuRgaP+jFYCnoDPpJ+Yx46IyPCrJC7rRPPaj8izHgMT f8Rmyfdf2BjLJG17+vNL+HHPngT6QmAobTOtVqmYTiO+vVgSsZ6b0ghSh9UPjggWVfgv Z3FOaprE9brf8klS8sEVpl4Juo4ohxGK1pMXvH8/cT/KsBuDOaeP7gX1AY7bRRfOgTsm yU2g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="E5V/fqir"; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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[92.34.216.5]) by smtp.gmail.com with ESMTPSA id r12-20020ac252ac000000b004aab0ca795csm4780439lfm.211.2023.01.15.11.53.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 Jan 2023 11:53:50 -0800 (PST) From: Linus Walleij To: u-boot@lists.denx.de, Tom Rini Cc: Anand Gore , William Zhang , Kursad Oney , Joel Peshkin , Philippe Reynes , =?utf-8?q?=C3=81lvaro_Fer?= =?utf-8?q?n=C3=A1ndez_Rojas?= , Florian Fainelli , Miquel Raynal , Linus Walleij Subject: [PATCH 13/14] mtd: rawnand: brcmnand: support v2.1-v2.2 controllers Date: Sun, 15 Jan 2023 20:53:11 +0100 Message-Id: <20230115195312.1477845-14-linus.walleij@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230115195312.1477845-1-linus.walleij@linaro.org> References: <20230115195312.1477845-1-linus.walleij@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Álvaro Fernández Rojas v2.1: tested on Netgear DGND3700v1 (BCM6368) v2.2: tested on Netgear DGND3700v2 (BCM6362) Signed-off-by: Álvaro Fernández Rojas Acked-by: Florian Fainelli Signed-off-by: Miquel Raynal Link: https://lore.kernel.org/linux-mtd/20200522121524.4161539-6-noltari@gmail.com [Ported to U-Boot from the Linux kernel] Signed-off-by: Linus Walleij --- drivers/mtd/nand/raw/brcmnand/brcmnand.c | 85 +++++++++++++++++++++--- 1 file changed, 76 insertions(+), 9 deletions(-) diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index 934981e2f3fe..2cca897ab3c9 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -217,6 +217,7 @@ struct brcmnand_controller { const unsigned int *block_sizes; unsigned int max_page_size; const unsigned int *page_sizes; + unsigned int page_size_shift; unsigned int max_oob; u32 features; @@ -293,6 +294,36 @@ enum brcmnand_reg { BRCMNAND_FC_BASE, }; +/* BRCMNAND v2.1-v2.2 */ +static const u16 brcmnand_regs_v21[] = { + [BRCMNAND_CMD_START] = 0x04, + [BRCMNAND_CMD_EXT_ADDRESS] = 0x08, + [BRCMNAND_CMD_ADDRESS] = 0x0c, + [BRCMNAND_INTFC_STATUS] = 0x5c, + [BRCMNAND_CS_SELECT] = 0x14, + [BRCMNAND_CS_XOR] = 0x18, + [BRCMNAND_LL_OP] = 0, + [BRCMNAND_CS0_BASE] = 0x40, + [BRCMNAND_CS1_BASE] = 0, + [BRCMNAND_CORR_THRESHOLD] = 0, + [BRCMNAND_CORR_THRESHOLD_EXT] = 0, + [BRCMNAND_UNCORR_COUNT] = 0, + [BRCMNAND_CORR_COUNT] = 0, + [BRCMNAND_CORR_EXT_ADDR] = 0x60, + [BRCMNAND_CORR_ADDR] = 0x64, + [BRCMNAND_UNCORR_EXT_ADDR] = 0x68, + [BRCMNAND_UNCORR_ADDR] = 0x6c, + [BRCMNAND_SEMAPHORE] = 0x50, + [BRCMNAND_ID] = 0x54, + [BRCMNAND_ID_EXT] = 0, + [BRCMNAND_LL_RDATA] = 0, + [BRCMNAND_OOB_READ_BASE] = 0x20, + [BRCMNAND_OOB_READ_10_BASE] = 0, + [BRCMNAND_OOB_WRITE_BASE] = 0x30, + [BRCMNAND_OOB_WRITE_10_BASE] = 0, + [BRCMNAND_FC_BASE] = 0x200, +}; + /* BRCMNAND v3.3-v4.0 */ static const u16 brcmnand_regs_v33[] = { [BRCMNAND_CMD_START] = 0x04, @@ -491,6 +522,9 @@ enum { CFG_BUS_WIDTH = BIT(CFG_BUS_WIDTH_SHIFT), CFG_DEVICE_SIZE_SHIFT = 24, + /* Only for v2.1 */ + CFG_PAGE_SIZE_SHIFT_v2_1 = 30, + /* Only for pre-v7.1 (with no CFG_EXT register) */ CFG_PAGE_SIZE_SHIFT = 20, CFG_BLK_SIZE_SHIFT = 28, @@ -526,12 +560,16 @@ static int brcmnand_revision_init(struct brcmnand_controller *ctrl) { static const unsigned int block_sizes_v6[] = { 8, 16, 128, 256, 512, 1024, 2048, 0 }; static const unsigned int block_sizes_v4[] = { 16, 128, 8, 512, 256, 1024, 2048, 0 }; + static const unsigned int block_sizes_v2_2[] = { 16, 128, 8, 512, 256, 0 }; + static const unsigned int block_sizes_v2_1[] = { 16, 128, 8, 512, 0 }; static const unsigned int page_sizes_v3_4[] = { 512, 2048, 4096, 8192, 0 }; + static const unsigned int page_sizes_v2_2[] = { 512, 2048, 4096, 0 }; + static const unsigned int page_sizes_v2_1[] = { 512, 2048, 0 }; ctrl->nand_version = nand_readreg(ctrl, 0) & 0xffff; - /* Only support v4.0+? */ - if (ctrl->nand_version < 0x0400) { + /* Only support v2.1+ */ + if (ctrl->nand_version < 0x0201) { dev_err(ctrl->dev, "version %#x not supported\n", ctrl->nand_version); return -ENODEV; @@ -548,6 +586,8 @@ static int brcmnand_revision_init(struct brcmnand_controller *ctrl) ctrl->reg_offsets = brcmnand_regs_v50; else if (ctrl->nand_version >= 0x0303) ctrl->reg_offsets = brcmnand_regs_v33; + else if (ctrl->nand_version >= 0x0201) + ctrl->reg_offsets = brcmnand_regs_v21; /* Chip-select stride */ if (ctrl->nand_version >= 0x0701) @@ -573,14 +613,32 @@ static int brcmnand_revision_init(struct brcmnand_controller *ctrl) ctrl->max_page_size = 16 * 1024; ctrl->max_block_size = 2 * 1024 * 1024; } else { - ctrl->page_sizes = page_sizes_v3_4; + if (ctrl->nand_version >= 0x0304) + ctrl->page_sizes = page_sizes_v3_4; + else if (ctrl->nand_version >= 0x0202) + ctrl->page_sizes = page_sizes_v2_2; + else + ctrl->page_sizes = page_sizes_v2_1; + + if (ctrl->nand_version >= 0x0202) + ctrl->page_size_shift = CFG_PAGE_SIZE_SHIFT; + else + ctrl->page_size_shift = CFG_PAGE_SIZE_SHIFT_v2_1; + if (ctrl->nand_version >= 0x0600) ctrl->block_sizes = block_sizes_v6; - else + else if (ctrl->nand_version >= 0x0400) ctrl->block_sizes = block_sizes_v4; + else if (ctrl->nand_version >= 0x0202) + ctrl->block_sizes = block_sizes_v2_2; + else + ctrl->block_sizes = block_sizes_v2_1; if (ctrl->nand_version < 0x0400) { - ctrl->max_page_size = 4096; + if (ctrl->nand_version < 0x0202) + ctrl->max_page_size = 2048; + else + ctrl->max_page_size = 4096; ctrl->max_block_size = 512 * 1024; } } @@ -756,6 +814,9 @@ static void brcmnand_wr_corr_thresh(struct brcmnand_host *host, u8 val) enum brcmnand_reg reg = BRCMNAND_CORR_THRESHOLD; int cs = host->cs; + if (!ctrl->reg_offsets[reg]) + return; + if (ctrl->nand_version == 0x0702) bits = 7; else if (ctrl->nand_version >= 0x0600) @@ -814,8 +875,10 @@ static inline u32 brcmnand_spare_area_mask(struct brcmnand_controller *ctrl) return GENMASK(7, 0); else if (ctrl->nand_version >= 0x0600) return GENMASK(6, 0); - else + else if (ctrl->nand_version >= 0x0303) return GENMASK(5, 0); + else + return GENMASK(4, 0); } #define NAND_ACC_CONTROL_ECC_SHIFT 16 @@ -2201,7 +2264,7 @@ static int brcmnand_set_cfg(struct brcmnand_host *host, (!!(cfg->device_width == 16) << CFG_BUS_WIDTH_SHIFT) | (device_size << CFG_DEVICE_SIZE_SHIFT); if (cfg_offs == cfg_ext_offs) { - tmp |= (page_size << CFG_PAGE_SIZE_SHIFT) | + tmp |= (page_size << ctrl->page_size_shift) | (block_size << CFG_BLK_SIZE_SHIFT); nand_writereg(ctrl, cfg_offs, tmp); } else { @@ -2213,9 +2276,11 @@ static int brcmnand_set_cfg(struct brcmnand_host *host, tmp = nand_readreg(ctrl, acc_control_offs); tmp &= ~brcmnand_ecc_level_mask(ctrl); - tmp |= cfg->ecc_level << NAND_ACC_CONTROL_ECC_SHIFT; tmp &= ~brcmnand_spare_area_mask(ctrl); - tmp |= cfg->spare_area_size; + if (ctrl->nand_version >= 0x0302) { + tmp |= cfg->ecc_level << NAND_ACC_CONTROL_ECC_SHIFT; + tmp |= cfg->spare_area_size; + } nand_writereg(ctrl, acc_control_offs, tmp); brcmnand_set_sector_size_1k(host, cfg->sector_size_1k); @@ -2595,6 +2660,8 @@ const struct dev_pm_ops brcmnand_pm_ops = { EXPORT_SYMBOL_GPL(brcmnand_pm_ops); static const struct of_device_id brcmnand_of_match[] = { + { .compatible = "brcm,brcmnand-v2.1" }, + { .compatible = "brcm,brcmnand-v2.2" }, { .compatible = "brcm,brcmnand-v4.0" }, { .compatible = "brcm,brcmnand-v5.0" }, { .compatible = "brcm,brcmnand-v6.0" }, From patchwork Sun Jan 15 19:53:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 642961 Delivered-To: patch@linaro.org Received: by 2002:a17:522:b9de:b0:4b9:b062:db3b with SMTP id fj30csp251391pvb; Sun, 15 Jan 2023 11:56:23 -0800 (PST) X-Google-Smtp-Source: AMrXdXuJEggQPOlCj6CzL1cDjQlD0kcPrNe+A5KQF4mcdWt8MSGGt98c3b314xmX+wajn96NBNdx X-Received: by 2002:a05:6870:5b83:b0:150:f2df:cf2 with SMTP id em3-20020a0568705b8300b00150f2df0cf2mr22895915oab.49.1673812583368; Sun, 15 Jan 2023 11:56:23 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; 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[92.34.216.5]) by smtp.gmail.com with ESMTPSA id r12-20020ac252ac000000b004aab0ca795csm4780439lfm.211.2023.01.15.11.53.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 Jan 2023 11:53:52 -0800 (PST) From: Linus Walleij To: u-boot@lists.denx.de, Tom Rini Cc: Anand Gore , William Zhang , Kursad Oney , Joel Peshkin , Philippe Reynes , =?utf-8?q?=C3=81lvaro_Fer?= =?utf-8?q?n=C3=A1ndez_Rojas?= , Brian Norris , Miquel Raynal , Linus Walleij Subject: [PATCH 14/14] mtd: rawnand: brcmnand: fix OOB R/W with Hamming ECC Date: Sun, 15 Jan 2023 20:53:12 +0100 Message-Id: <20230115195312.1477845-15-linus.walleij@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230115195312.1477845-1-linus.walleij@linaro.org> References: <20230115195312.1477845-1-linus.walleij@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Álvaro Fernández Rojas Hamming ECC doesn't cover the OOB data, so reading or writing OOB shall always be done without ECC enabled. This is a problem when adding JFFS2 cleanmarkers to erased blocks. If JFFS2 clenmarkers are added to the OOB with ECC enabled, OOB bytes will be changed from ff ff ff to 00 00 00, reporting incorrect ECC errors. Fixes: 27c5b17cd1b1 ("mtd: nand: add NAND driver "library" for Broadcom STB NAND controller") Signed-off-by: Álvaro Fernández Rojas Acked-by: Brian Norris Signed-off-by: Miquel Raynal Link: https://lore.kernel.org/linux-mtd/20210224080210.23686-1-noltari@gmail.com [Ported to U-Boot from the Linux kernel] Signed-off-by: Linus Walleij --- drivers/mtd/nand/raw/brcmnand/brcmnand.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index 2cca897ab3c9..ee3ff372b863 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -2567,6 +2567,12 @@ static int brcmnand_init_cs(struct brcmnand_host *host, ofnode dn) ret = nand_register(0, mtd); #endif /* __UBOOT__ */ + /* If OOB is written with ECC enabled it will cause ECC errors */ + if (is_hamming_ecc(host->ctrl, &host->hwcfg)) { + chip->ecc.write_oob = brcmnand_write_oob_raw; + chip->ecc.read_oob = brcmnand_read_oob_raw; + } + return ret; }