From patchwork Thu Apr 4 15:59:59 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 161800 Delivered-To: patch@linaro.org Received: by 2002:a02:c6d8:0:0:0:0:0 with SMTP id r24csp1773346jan; Thu, 4 Apr 2019 09:00:29 -0700 (PDT) X-Google-Smtp-Source: APXvYqzhw3dsv3hh9+WZ1axqr0XBS12UgAL9plLSdYNsjZvrNwd+6atLpDeNyE3QUeM4Qb+wrlTC X-Received: by 2002:a17:902:b286:: with SMTP id u6mr7296743plr.310.1554393629295; Thu, 04 Apr 2019 09:00:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1554393629; cv=none; d=google.com; s=arc-20160816; b=fr/vmt9imF/frS4J+D6oRagVxWp74CORVDu3/xYL4YnhyfjK5/EXxadSZBrFrMoaDA ysQGz+LQpHAtIe+qQonogYOcqpzAF1TpCfUXLt3dqO37AToe5m6J8lyJytMj0donEDPN ZBUowX5MX7eRhkJgJqN6jANqGb1NkbSv0ZUltRU9B7Vf6BnE7TcQn/5zIqOjapHP8F0c EZus5SbhSTSiUExMnOT0f1JutsYba9E7PAalkb8lUAjrarZ32FtApEg3GAGIkW4AQd34 2bOGnf6V83bTNolS1kri6Gfai+uKZb4gBKXMgFZe5NEQTX4zvJEdl+gpFfZeLymH+yxf CuxA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=E3H20Fm8ZP3O30GWCHZvgqiel5ODUhwiUSEGuC11FKw=; b=rqxJMh5YOP6f+gXEk/u93GcfyHtJh7BczLtEMlvd4KN1zEPkRQ7a2A6YCd/YarvxPa 12JT0pEPysNULKo+iojW3Gt2hTt86q8sgXplBkSwdjY+WRte5awNp6Y9slZ6LUSJl2CG Vy6uj+5Ict7/Fxq9jO9TP3vj7UHkqZ4/C16BmFhm4PK2BNKCSVNbtq4mOTww0S3JovMx oa+Z0Z2UEaogjIOSEfld8uXatQrAlFE5hi8uL/oqWUfwqLz82/ciL/LtNl8vH3VJSWjW Y44pikIVM0z0vuzXZ0Pfg83doi92VME/ryxf9D/OMtltXV5FpJW1Wt4R+lrz5JAgE1nR duUw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id q7si16633283pls.259.2019.04.04.09.00.29; Thu, 04 Apr 2019 09:00:29 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728987AbfDDQA2 (ORCPT + 31 others); Thu, 4 Apr 2019 12:00:28 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:42708 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726888AbfDDQA1 (ORCPT ); Thu, 4 Apr 2019 12:00:27 -0400 Received: from DGGEMS414-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id CB6438943CF24F2DBB85; Fri, 5 Apr 2019 00:00:23 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by DGGEMS414-HUB.china.huawei.com (10.3.19.214) with Microsoft SMTP Server id 14.3.408.0; Fri, 5 Apr 2019 00:00:17 +0800 From: John Garry To: , , , CC: , , , , , , , , , , John Garry Subject: [RFC PATCH v3 1/4] resource: Request IO port regions from children of ioport_resource Date: Thu, 4 Apr 2019 23:59:59 +0800 Message-ID: <1554393602-152448-2-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1554393602-152448-1-git-send-email-john.garry@huawei.com> References: <1554393602-152448-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Currently request_region() requests an IO port region directly from the top resource, ioport_resource. There is an issue here, in that drivers may successfully request an IO port region even if the IO port region has not even been mapped in (in pci_remap_iospace()). This may lead to crashes when the system has no PCI host, or, has a host but it has failed enumeration, while drivers still attempt to access PCI IO ports, as below: root@(none)$root@(none)$ insmod f71882fg.ko Unable to handle kernel paging request at virtual address ffff7dfffee0002e Mem abort info: ESR = 0x96000046 Exception class = DABT (current EL), IL = 32 bits SET = 0, FnV = 0 EA = 0, S1PTW = 0 Data abort info: ISV = 0, ISS = 0x00000046 CM = 0, WnR = 1 swapper pgtable: 4k pages, 48-bit VAs, pgdp = (____ptrval____) [ffff7dfffee0002e] pgd=000000000141c003, pud=000000000141d003, pmd=0000000000000000 Internal error: Oops: 96000046 [#1] PREEMPT SMP Modules linked in: f71882fg(+) CPU: 8 PID: 2732 Comm: insmod Not tainted 5.1.0-rc1-00002-gab1a0e9200b8-dirty #102 Hardware name: Huawei Taishan 2280 /D05, BIOS Hisilicon D05 IT21 Nemo 2.0 RC0 04/18/2018 pstate: 80000005 (Nzcv daif -PAN -UAO) pc : logic_outb+0x54/0xb8 lr : f71882fg_find+0x64/0x390 [f71882fg] sp : ffff000013393aa0 x29: ffff000013393aa0 x28: ffff000008b98b10 x27: ffff000013393df0 x26: 0000000000000100 x25: ffff801f8c872d30 x24: ffff000011420000 x23: ffff801fb49d2940 x22: ffff000011291000 x21: 000000000000002e x20: 0000000000000087 x19: ffff000013393b44 x18: ffffffffffffffff x17: 0000000000000000 x16: 0000000000000000 x15: ffff00001127d6c8 x14: ffff801f8cfd691c x13: 0000000000000000 x12: 0000000000000000 x11: 0000000000000003 x10: 0000801feace2000 x9 : 0000000000000000 x8 : ffff841fa654f280 x7 : 0000000000000000 x6 : 0000000000ffc0e3 x5 : ffff000011291360 x4 : ffff801fb4949f00 x3 : 0000000000ffbffe x2 : 76e767a63713d500 x1 : ffff7dfffee0002e x0 : ffff7dfffee00000 Process insmod (pid: 2732, stack limit = 0x(____ptrval____)) Call trace: logic_outb+0x54/0xb8 f71882fg_find+0x64/0x390 [f71882fg] f71882fg_init+0x38/0xc70 [f71882fg] do_one_initcall+0x5c/0x198 do_init_module+0x54/0x1b0 load_module+0x1dc4/0x2158 __se_sys_init_module+0x14c/0x1e8 __arm64_sys_init_module+0x18/0x20 el0_svc_common+0x5c/0x100 el0_svc_handler+0x2c/0x80 el0_svc+0x8/0xc Code: d2bfdc00 f2cfbfe0 f2ffffe0 8b000021 (39000034) ---[ end trace fd4f35b610829a48 ]--- Segmentation fault root@(none)$ Note that the f71882fg driver correctly calls request_muxed_region(). This issue was originally reported in [1]. This patch changes the functionality of request{muxed_}_region() to request a region from a direct child descendent of the top ioport_resource. In this, if the IO port region has not been mapped for a particular IO region, the PCI IO resource would also not have been inserted, and so a suitable child region will not exist. As such, request_{muxed_}region() calls will fail. A side note: there are many drivers in the kernel which fail to even call request_{muxed_}region() prior to IO port accesses, and they also need to be fixed (to call request_{muxed_}region(), as appropriate) separately. [1] https://lore.kernel.org/linux-pci/56F209A9.4040304@huawei.com Signed-off-by: John Garry --- include/linux/ioport.h | 11 ++++++++--- kernel/resource.c | 28 ++++++++++++++++++++++++++++ 2 files changed, 36 insertions(+), 3 deletions(-) -- 2.17.1 diff --git a/include/linux/ioport.h b/include/linux/ioport.h index da0ebaec25f0..76288b8783ff 100644 --- a/include/linux/ioport.h +++ b/include/linux/ioport.h @@ -217,15 +217,20 @@ static inline bool resource_contains(struct resource *r1, struct resource *r2) /* Convenience shorthand with allocation */ -#define request_region(start,n,name) __request_region(&ioport_resource, (start), (n), (name), 0) -#define request_muxed_region(start,n,name) __request_region(&ioport_resource, (start), (n), (name), IORESOURCE_MUXED) +#define request_region(start, n, name) __request_region_from_children(&ioport_resource, (start), (n), (name), 0) +#define request_muxed_region(start, n, name) __request_region_from_children(&ioport_resource, (start), (n), (name), IORESOURCE_MUXED) #define __request_mem_region(start,n,name, excl) __request_region(&iomem_resource, (start), (n), (name), excl) #define request_mem_region(start,n,name) __request_region(&iomem_resource, (start), (n), (name), 0) #define request_mem_region_exclusive(start,n,name) \ __request_region(&iomem_resource, (start), (n), (name), IORESOURCE_EXCLUSIVE) #define rename_region(region, newname) do { (region)->name = (newname); } while (0) -extern struct resource * __request_region(struct resource *, +extern struct resource *__request_region(struct resource *, + resource_size_t start, + resource_size_t n, + const char *name, int flags); + +extern struct resource *__request_region_from_children(struct resource *, resource_size_t start, resource_size_t n, const char *name, int flags); diff --git a/kernel/resource.c b/kernel/resource.c index 92190f62ebc5..87ed200eda8b 100644 --- a/kernel/resource.c +++ b/kernel/resource.c @@ -1097,6 +1097,34 @@ resource_size_t resource_alignment(struct resource *res) static DECLARE_WAIT_QUEUE_HEAD(muxed_resource_wait); +/** + * __request_region_from_children - create a new busy region from a child + * @parent: parent resource descriptor + * @start: resource start address + * @n: resource region size + * @name: reserving caller's ID string + * @flags: IO resource flags + */ +struct resource *__request_region_from_children(struct resource *parent, + resource_size_t start, + resource_size_t n, + const char *name, int flags) +{ + struct resource *res = __request_region(parent, start, n, name, flags); + + if (res && res->parent == parent) { + /* + * This is a direct descendent of the parent, which is + * what we didn't want. + */ + __release_region(parent, start, n); + res = NULL; + } + + return res; +} +EXPORT_SYMBOL(__request_region_from_children); + /** * __request_region - create a new busy resource region * @parent: parent resource descriptor From patchwork Thu Apr 4 16:00:00 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 161804 Delivered-To: patch@linaro.org Received: by 2002:a02:c6d8:0:0:0:0:0 with SMTP id r24csp1773638jan; Thu, 4 Apr 2019 09:00:43 -0700 (PDT) X-Google-Smtp-Source: APXvYqyrVjJmgmIzt8tzTxu5XIYSgWdXDyjQ5vXYMZE785YNFLKKIyLzLer5EGc/685Cr50/hSRC X-Received: by 2002:aa7:8719:: with SMTP id b25mr6756688pfo.90.1554393643469; Thu, 04 Apr 2019 09:00:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1554393643; cv=none; d=google.com; s=arc-20160816; b=fYgph1tnvHaMvDAy4VbwE/TrOmpBtyzMXKTouVQcw/R4yGFJnsQxtu+XzYkayXjXAp 2TyQW7oGyp3neFd8UZWmbnGeclaNf3n3XOFV3O14dKZN/+p3oevOs8DViTpHIehyPzLr M9CqblqlZtIjgDz6Cyn5Z62J4OWrvIejRqRRo3NnO/WdBsbi6OVJaiVB6B4D2uTXYaVU gjQBJkLMuEoYCK1yl9gKde4HEW8XmPDaXY9L8TTUpKHZOAICmoYomxKuuz5rw3Bt4gB3 2q29WxVg95sNhgZttgG9InkmF6Yuejt3X1NRZWisVEvhcNDc16jmWjyT1mJgFmc5/15i MwkA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=Oc1tYWTfpJceUSUXBQe61YjC6S/mmnw67l7uNMbH2Pc=; b=Q20ZKQ7A188SgMsQ6DahTkoQcx2M9DXy7xMSylIbhvzUVJrMOjAkLPmk+s1WNZiOHj kfXOXnxqoeX+FAQ4bJY3cyDAvuA8jXgiWyQUEdXkmIJlVn/WphRN9Hejb2/VylDmgf6P gbkZZXC+s4KTdmmDWPqAlJ/WSZlYkiYwKHRye84ALZ6NA+nL+BcOZ8DX9L50CwoxDOy/ nWdoeZsoY1BGSO3JKNmAbusGiDKnt1Jo2eJROkOA1P3Js/qkgKqzAhgngDQo+LLC4XJM QfruC6/YuwKwhw58fs/ahwO/FONK9bqs09F2e92+RaIU0jKOdiJpjoPR5+37JwO3DQZ+ ENDw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 92si6644782plw.138.2019.04.04.09.00.43; Thu, 04 Apr 2019 09:00:43 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729184AbfDDQAd (ORCPT + 31 others); Thu, 4 Apr 2019 12:00:33 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:38222 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1728654AbfDDQAc (ORCPT ); Thu, 4 Apr 2019 12:00:32 -0400 Received: from DGGEMS414-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 3EEFDB694C499E26B0A8; Fri, 5 Apr 2019 00:00:29 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by DGGEMS414-HUB.china.huawei.com (10.3.19.214) with Microsoft SMTP Server id 14.3.408.0; Fri, 5 Apr 2019 00:00:18 +0800 From: John Garry To: , , , CC: , , , , , , , , , , John Garry Subject: [PATCH v3 2/4] lib: logic_pio: Use logical PIO low-level accessors for !CONFIG_INDIRECT_PIO Date: Fri, 5 Apr 2019 00:00:00 +0800 Message-ID: <1554393602-152448-3-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1554393602-152448-1-git-send-email-john.garry@huawei.com> References: <1554393602-152448-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Currently we only use logical PIO low-level accessors for when CONFIG_INDIRECT_PIO is enabled. Otherwise we just use inb/out et all directly. It is useful to now use logical PIO accessors for all cases, so we can add legality checks to accesses. Such a check would be for ensuring that the PCI IO port has been IO remapped prior to the access. Using the logical PIO accesses will add a little processing overhead, but that's ok as IO port accesses are relatively slow anyway. Some changes are also made to stop spilling so many lines under CONFIG_INDIRECT_PIO. Signed-off-by: John Garry --- include/linux/logic_pio.h | 7 +++-- lib/logic_pio.c | 61 ++++++++++++++++++++++++++++++--------- 2 files changed, 52 insertions(+), 16 deletions(-) -- 2.17.1 diff --git a/include/linux/logic_pio.h b/include/linux/logic_pio.h index cbd9d8495690..06d22b2ec99f 100644 --- a/include/linux/logic_pio.h +++ b/include/linux/logic_pio.h @@ -37,7 +37,7 @@ struct logic_pio_host_ops { size_t dwidth, unsigned int count); }; -#ifdef CONFIG_INDIRECT_PIO +#if defined(PCI_IOBASE) u8 logic_inb(unsigned long addr); void logic_outb(u8 value, unsigned long addr); void logic_outw(u16 value, unsigned long addr); @@ -102,6 +102,7 @@ void logic_outsl(unsigned long addr, const void *buffer, unsigned int count); #define outsl logic_outsl #endif +#if defined(CONFIG_INDIRECT_PIO) /* * We reserve 0x4000 bytes for Indirect IO as so far this library is only * used by the HiSilicon LPC Host. If needed, we can reserve a wider IO @@ -109,10 +110,10 @@ void logic_outsl(unsigned long addr, const void *buffer, unsigned int count); */ #define PIO_INDIRECT_SIZE 0x4000 #define MMIO_UPPER_LIMIT (IO_SPACE_LIMIT - PIO_INDIRECT_SIZE) -#else +#else /* CONFIG_INDIRECT_PIO */ #define MMIO_UPPER_LIMIT IO_SPACE_LIMIT #endif /* CONFIG_INDIRECT_PIO */ - +#endif /* PCI_IOBASE */ struct logic_pio_hwaddr *find_io_range_by_fwnode(struct fwnode_handle *fwnode); unsigned long logic_pio_trans_hwaddr(struct fwnode_handle *fwnode, resource_size_t hw_addr, resource_size_t size); diff --git a/lib/logic_pio.c b/lib/logic_pio.c index feea48fd1a0d..431cd8d99236 100644 --- a/lib/logic_pio.c +++ b/lib/logic_pio.c @@ -191,7 +191,8 @@ unsigned long logic_pio_trans_cpuaddr(resource_size_t addr) return ~0UL; } -#if defined(CONFIG_INDIRECT_PIO) && defined(PCI_IOBASE) +#if defined(PCI_IOBASE) +#if defined(CONFIG_INDIRECT_PIO) #define BUILD_LOGIC_IO(bw, type) \ type logic_in##bw(unsigned long addr) \ { \ @@ -201,10 +202,10 @@ type logic_in##bw(unsigned long addr) \ ret = read##bw(PCI_IOBASE + addr); \ } else if (addr >= MMIO_UPPER_LIMIT && addr < IO_SPACE_LIMIT) { \ struct logic_pio_hwaddr *entry = find_io_range(addr); \ + size_t sz = sizeof(type); \ \ if (entry && entry->ops) \ - ret = entry->ops->in(entry->hostdata, \ - addr, sizeof(type)); \ + ret = entry->ops->in(entry->hostdata, addr, sz);\ else \ WARN_ON_ONCE(1); \ } \ @@ -217,48 +218,82 @@ void logic_out##bw(type value, unsigned long addr) \ write##bw(value, PCI_IOBASE + addr); \ } else if (addr >= MMIO_UPPER_LIMIT && addr < IO_SPACE_LIMIT) { \ struct logic_pio_hwaddr *entry = find_io_range(addr); \ + size_t sz = sizeof(type); \ \ if (entry && entry->ops) \ entry->ops->out(entry->hostdata, \ - addr, value, sizeof(type)); \ + addr, value, sz); \ else \ WARN_ON_ONCE(1); \ } \ } \ \ -void logic_ins##bw(unsigned long addr, void *buffer, \ - unsigned int count) \ +void logic_ins##bw(unsigned long addr, void *buf, unsigned int cnt) \ { \ if (addr < MMIO_UPPER_LIMIT) { \ - reads##bw(PCI_IOBASE + addr, buffer, count); \ + reads##bw(PCI_IOBASE + addr, buf, cnt); \ } else if (addr >= MMIO_UPPER_LIMIT && addr < IO_SPACE_LIMIT) { \ struct logic_pio_hwaddr *entry = find_io_range(addr); \ + size_t sz = sizeof(type); \ \ if (entry && entry->ops) \ entry->ops->ins(entry->hostdata, \ - addr, buffer, sizeof(type), count); \ + addr, buf, sz, cnt); \ else \ WARN_ON_ONCE(1); \ } \ \ } \ \ -void logic_outs##bw(unsigned long addr, const void *buffer, \ - unsigned int count) \ +void logic_outs##bw(unsigned long addr, const void *buf, \ + unsigned int cnt) \ { \ if (addr < MMIO_UPPER_LIMIT) { \ - writes##bw(PCI_IOBASE + addr, buffer, count); \ + writes##bw(PCI_IOBASE + addr, buf, cnt); \ } else if (addr >= MMIO_UPPER_LIMIT && addr < IO_SPACE_LIMIT) { \ struct logic_pio_hwaddr *entry = find_io_range(addr); \ + size_t sz = sizeof(type); \ \ if (entry && entry->ops) \ entry->ops->outs(entry->hostdata, \ - addr, buffer, sizeof(type), count); \ + addr, buf, sz, cnt); \ else \ WARN_ON_ONCE(1); \ } \ } +#else /* CONFIG_INDIRECT_PIO */ + +#define BUILD_LOGIC_IO(bw, type) \ +type logic_in##bw(unsigned long addr) \ +{ \ + type ret = (type)~0; \ + \ + if (addr < MMIO_UPPER_LIMIT) \ + ret = read##bw(PCI_IOBASE + addr); \ + return ret; \ +} \ + \ +void logic_out##bw(type value, unsigned long addr) \ +{ \ + if (addr < MMIO_UPPER_LIMIT) \ + write##bw(value, PCI_IOBASE + addr); \ +} \ + \ +void logic_ins##bw(unsigned long addr, void *buf, unsigned int cnt) \ +{ \ + if (addr < MMIO_UPPER_LIMIT) \ + reads##bw(PCI_IOBASE + addr, buf, cnt); \ +} \ + \ +void logic_outs##bw(unsigned long addr, const void *buf, \ + unsigned int cnt) \ +{ \ + if (addr < MMIO_UPPER_LIMIT) \ + writes##bw(PCI_IOBASE + addr, buf, cnt); \ +} +#endif /* CONFIG_INDIRECT_PIO */ + BUILD_LOGIC_IO(b, u8) EXPORT_SYMBOL(logic_inb); EXPORT_SYMBOL(logic_insb); @@ -277,4 +312,4 @@ EXPORT_SYMBOL(logic_insl); EXPORT_SYMBOL(logic_outl); EXPORT_SYMBOL(logic_outsl); -#endif /* CONFIG_INDIRECT_PIO && PCI_IOBASE */ +#endif /* PCI_IOBASE */ From patchwork Thu Apr 4 16:00:01 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 161803 Delivered-To: patch@linaro.org Received: by 2002:a02:c6d8:0:0:0:0:0 with SMTP id r24csp1773558jan; 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[209.132.180.67]) by mx.google.com with ESMTP id f63si17507566pfa.154.2019.04.04.09.00.38; Thu, 04 Apr 2019 09:00:38 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729286AbfDDQAh (ORCPT + 31 others); Thu, 4 Apr 2019 12:00:37 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:38214 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1728654AbfDDQAe (ORCPT ); Thu, 4 Apr 2019 12:00:34 -0400 Received: from DGGEMS414-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 35B5EABF3FD584E93142; Fri, 5 Apr 2019 00:00:29 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by DGGEMS414-HUB.china.huawei.com (10.3.19.214) with Microsoft SMTP Server id 14.3.408.0; Fri, 5 Apr 2019 00:00:18 +0800 From: John Garry To: , , , CC: , , , , , , , , , , John Garry Subject: [PATCH v3 3/4] lib: logic_pio: Reject accesses to unregistered CPU MMIO regions Date: Fri, 5 Apr 2019 00:00:01 +0800 Message-ID: <1554393602-152448-4-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1554393602-152448-1-git-send-email-john.garry@huawei.com> References: <1554393602-152448-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Currently when accessing logical indirect PIO addresses in logic_{in, out}{,s}, we first ensure that the region is registered. However, no such check exists for CPU MMIO regions. The CPU MMIO regions would be registered by the PCI host - when PCI_IOBASE is defined - in pci_register_io_range(). We have seen scenarios when systems which don't have a PCI host or, they do, and the PCI host probe fails, that certain devices attempts to still attempt to access PCI IO ports; examples are in [1] and [2]. And even though we should protect against this by ensuring the driver calls request_{muxed_}region(), some don't do this: root@(none)$ insmod hwmon/f71805f.ko Unable to handle kernel paging request at virtual address ffff7dfffee0002e Mem abort info: ESR = 0x96000046 Exception class = DABT (current EL), IL = 32 bits SET = 0, FnV = 0 EA = 0, S1PTW = 0 Data abort info: ISV = 0, ISS = 0x00000046 CM = 0, WnR = 1 swapper pgtable: 4k pages, 48-bit VAs, pgdp = (____ptrval____) [ffff7dfffee0002e] pgd=000000000141c003, pud=000000000141d003, pmd=0000000000000000 Internal error: Oops: 96000046 [#1] PREEMPT SMP Modules linked in: f71805f(+) CPU: 20 PID: 2736 Comm: insmod Not tainted 5.1.0-rc1-00003-g6f1bfec2a620-dirty #99 Hardware name: Huawei Taishan 2280 /D05, BIOS Hisilicon D05 IT21 Nemo 2.0 RC0 04/18/2018 pstate: 80000005 (Nzcv daif -PAN -UAO) pc : logic_outb+0x54/0xb8 lr : f71805f_find+0x2c/0x1b8 [f71805f] sp : ffff000025fbba90 x29: ffff000025fbba90 x28: ffff000008b944d0 x27: ffff000025fbbdf0 x26: 0000000000000100 x25: ffff801f8c270580 x24: ffff000011420000 x23: ffff000025fbbb3e x22: ffff000025fbbb40 x21: ffff000008b991b8 x20: 0000000000000087 x19: 000000000000002e x18: ffffffffffffffff x17: 0000000000000000 x16: 0000000000000000 x15: ffff00001127d6c8 x14: 0000000000000000 x13: 0000000000000000 x12: 0000000000000000 x11: 0000000000010820 x10: 0000841fdac40000 x9 : 0000000000000001 x8 : 0000000040000000 x7 : 0000000000210d00 x6 : 0000000000000000 x5 : ffff801fb6a46040 x4 : ffff841febeaeda0 x3 : 0000000000ffbffe x2 : ffff000025fbbb40 x1 : ffff7dfffee0002e x0 : ffff7dfffee00000 Process insmod (pid: 2736, stack limit = 0x(____ptrval____)) Call trace: logic_outb+0x54/0xb8 f71805f_find+0x2c/0x1b8 [f71805f] f71805f_init+0x38/0xe48 [f71805f] do_one_initcall+0x5c/0x198 do_init_module+0x54/0x1b0 load_module+0x1dc4/0x2158 __se_sys_init_module+0x14c/0x1e8 __arm64_sys_init_module+0x18/0x20 el0_svc_common+0x5c/0x100 el0_svc_handler+0x2c/0x80 el0_svc+0x8/0xc Code: d2bfdc00 f2cfbfe0 f2ffffe0 8b000021 (39000034) ---[ end trace 10ea80bde051bbfc ]--- root@(none)$ Note that the f71805f driver does not call request_{muxed_}region(), as it should. This patch adds a check to ensure that the CPU MMIO region is registered prior to accessing the PCI IO ports. [1] https://lore.kernel.org/linux-pci/56F209A9.4040304@huawei.com [2] https://lore.kernel.org/linux-arm-kernel/e6995b4a-184a-d8d4-f4d4-9ce75d8f47c0@huawei.com/ This patch includes some other tidy-up. Signed-off-by: John Garry --- lib/logic_pio.c | 103 +++++++++++++++++++++++++++++++++++------------- 1 file changed, 75 insertions(+), 28 deletions(-) -- 2.17.1 diff --git a/lib/logic_pio.c b/lib/logic_pio.c index 431cd8d99236..3d8d986e9dcb 100644 --- a/lib/logic_pio.c +++ b/lib/logic_pio.c @@ -193,95 +193,135 @@ unsigned long logic_pio_trans_cpuaddr(resource_size_t addr) #if defined(PCI_IOBASE) #if defined(CONFIG_INDIRECT_PIO) +#define INVALID_RANGE(range) \ + (!(range) || ((range)->flags == LOGIC_PIO_INDIRECT && !(range)->ops)) + #define BUILD_LOGIC_IO(bw, type) \ type logic_in##bw(unsigned long addr) \ { \ type ret = (type)~0; \ + struct logic_pio_hwaddr *range = find_io_range(addr); \ + \ + if (INVALID_RANGE(range)) { \ + WARN_ON_ONCE(1); \ + return ret; \ + } \ \ if (addr < MMIO_UPPER_LIMIT) { \ ret = read##bw(PCI_IOBASE + addr); \ } else if (addr >= MMIO_UPPER_LIMIT && addr < IO_SPACE_LIMIT) { \ - struct logic_pio_hwaddr *entry = find_io_range(addr); \ size_t sz = sizeof(type); \ + void *hostdata = range->hostdata; \ \ - if (entry && entry->ops) \ - ret = entry->ops->in(entry->hostdata, addr, sz);\ - else \ - WARN_ON_ONCE(1); \ + if (range->ops->in) \ + ret = range->ops->in(hostdata, addr, sz); \ } \ return ret; \ } \ \ -void logic_out##bw(type value, unsigned long addr) \ +void logic_out##bw(type val, unsigned long addr) \ { \ + struct logic_pio_hwaddr *range = find_io_range(addr); \ + \ + if (INVALID_RANGE(range)) { \ + WARN_ON_ONCE(1); \ + return; \ + } \ + \ if (addr < MMIO_UPPER_LIMIT) { \ - write##bw(value, PCI_IOBASE + addr); \ + write##bw(val, PCI_IOBASE + addr); \ } else if (addr >= MMIO_UPPER_LIMIT && addr < IO_SPACE_LIMIT) { \ - struct logic_pio_hwaddr *entry = find_io_range(addr); \ size_t sz = sizeof(type); \ + void *hostdata = range->hostdata; \ \ - if (entry && entry->ops) \ - entry->ops->out(entry->hostdata, \ - addr, value, sz); \ - else \ - WARN_ON_ONCE(1); \ + if (range->ops->out) \ + range->ops->out(hostdata, addr, val, sz); \ } \ } \ \ void logic_ins##bw(unsigned long addr, void *buf, unsigned int cnt) \ { \ + struct logic_pio_hwaddr *range = find_io_range(addr); \ + \ + if (INVALID_RANGE(range)) { \ + WARN_ON_ONCE(1); \ + return; \ + } \ + \ if (addr < MMIO_UPPER_LIMIT) { \ reads##bw(PCI_IOBASE + addr, buf, cnt); \ } else if (addr >= MMIO_UPPER_LIMIT && addr < IO_SPACE_LIMIT) { \ - struct logic_pio_hwaddr *entry = find_io_range(addr); \ size_t sz = sizeof(type); \ + void *hostdata = range->hostdata; \ \ - if (entry && entry->ops) \ - entry->ops->ins(entry->hostdata, \ - addr, buf, sz, cnt); \ - else \ - WARN_ON_ONCE(1); \ + if (range->ops->ins) \ + range->ops->ins(hostdata, addr, buf, sz, cnt); \ } \ - \ } \ \ void logic_outs##bw(unsigned long addr, const void *buf, \ unsigned int cnt) \ { \ + struct logic_pio_hwaddr *range = find_io_range(addr); \ + \ + if (INVALID_RANGE(range)) { \ + WARN_ON_ONCE(1); \ + return; \ + } \ + \ if (addr < MMIO_UPPER_LIMIT) { \ writes##bw(PCI_IOBASE + addr, buf, cnt); \ } else if (addr >= MMIO_UPPER_LIMIT && addr < IO_SPACE_LIMIT) { \ - struct logic_pio_hwaddr *entry = find_io_range(addr); \ size_t sz = sizeof(type); \ + void *hostdata = range->hostdata; \ \ - if (entry && entry->ops) \ - entry->ops->outs(entry->hostdata, \ - addr, buf, sz, cnt); \ - else \ - WARN_ON_ONCE(1); \ + if (range->ops->outs) \ + range->ops->outs(hostdata, addr, buf, sz, cnt); \ } \ } #else /* CONFIG_INDIRECT_PIO */ +#define INVALID_RANGE(range) (!(range)) + #define BUILD_LOGIC_IO(bw, type) \ type logic_in##bw(unsigned long addr) \ { \ type ret = (type)~0; \ + struct logic_pio_hwaddr *range = find_io_range(addr); \ + \ + if (INVALID_RANGE(range)) { \ + WARN_ON_ONCE(1); \ + return ret; \ + } \ \ if (addr < MMIO_UPPER_LIMIT) \ ret = read##bw(PCI_IOBASE + addr); \ return ret; \ } \ \ -void logic_out##bw(type value, unsigned long addr) \ +void logic_out##bw(type val, unsigned long addr) \ { \ + struct logic_pio_hwaddr *range = find_io_range(addr); \ + \ + if (INVALID_RANGE(range)) { \ + WARN_ON_ONCE(1); \ + return; \ + } \ + \ if (addr < MMIO_UPPER_LIMIT) \ - write##bw(value, PCI_IOBASE + addr); \ + write##bw(val, PCI_IOBASE + addr); \ } \ \ void logic_ins##bw(unsigned long addr, void *buf, unsigned int cnt) \ { \ + struct logic_pio_hwaddr *range = find_io_range(addr); \ + \ + if (INVALID_RANGE(range)) { \ + WARN_ON_ONCE(1); \ + return; \ + } \ + \ if (addr < MMIO_UPPER_LIMIT) \ reads##bw(PCI_IOBASE + addr, buf, cnt); \ } \ @@ -289,6 +329,13 @@ void logic_ins##bw(unsigned long addr, void *buf, unsigned int cnt) \ void logic_outs##bw(unsigned long addr, const void *buf, \ unsigned int cnt) \ { \ + struct logic_pio_hwaddr *range = find_io_range(addr); \ + \ + if (INVALID_RANGE(range)) { \ + WARN_ON_ONCE(1); \ + return; \ + } \ + \ if (addr < MMIO_UPPER_LIMIT) \ writes##bw(PCI_IOBASE + addr, buf, cnt); \ } From patchwork Thu Apr 4 16:00:02 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 161802 Delivered-To: patch@linaro.org Received: by 2002:a02:c6d8:0:0:0:0:0 with SMTP id r24csp1773481jan; Thu, 4 Apr 2019 09:00:34 -0700 (PDT) X-Google-Smtp-Source: APXvYqwDL9EFwE4drVOvjpUc0NX7iupnxt/CQXz98MJI9Yz2Zy0u10jHIFPdgewe8grpEpcAO34x X-Received: by 2002:a17:902:f81:: with SMTP id 1mr7327658plz.216.1554393634805; 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[209.132.180.67]) by mx.google.com with ESMTP id i18si16348959pfa.205.2019.04.04.09.00.34; Thu, 04 Apr 2019 09:00:34 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729240AbfDDQAd (ORCPT + 31 others); Thu, 4 Apr 2019 12:00:33 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:5668 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1728159AbfDDQAb (ORCPT ); Thu, 4 Apr 2019 12:00:31 -0400 Received: from DGGEMS414-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id DBA45B9441FD9080D1A1; Fri, 5 Apr 2019 00:00:28 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by DGGEMS414-HUB.china.huawei.com (10.3.19.214) with Microsoft SMTP Server id 14.3.408.0; Fri, 5 Apr 2019 00:00:18 +0800 From: John Garry To: , , , CC: , , , , , , , , , , John Garry Subject: [PATCH v3 4/4] lib: logic_pio: Fix up some prints Date: Fri, 5 Apr 2019 00:00:02 +0800 Message-ID: <1554393602-152448-5-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1554393602-152448-1-git-send-email-john.garry@huawei.com> References: <1554393602-152448-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org A print in find_io_range() is for a hex number, but doesn't prefix "0x". Add the prefix, as is the norm. In the case of the print in logic_pio_trans_cpuaddr(), don't cast the value to unsigned long long, and just print the resource_size_t type directly. Signed-off-by: John Garry --- lib/logic_pio.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) -- 2.17.1 diff --git a/lib/logic_pio.c b/lib/logic_pio.c index 3d8d986e9dcb..475d469c1a16 100644 --- a/lib/logic_pio.c +++ b/lib/logic_pio.c @@ -126,7 +126,7 @@ static struct logic_pio_hwaddr *find_io_range(unsigned long pio) if (in_range(pio, range->io_start, range->size)) return range; } - pr_err("PIO entry token %lx invalid\n", pio); + pr_err("PIO entry token 0x%lx invalid\n", pio); return NULL; } @@ -186,8 +186,7 @@ unsigned long logic_pio_trans_cpuaddr(resource_size_t addr) if (in_range(addr, range->hw_start, range->size)) return addr - range->hw_start + range->io_start; } - pr_err("addr %llx not registered in io_range_list\n", - (unsigned long long) addr); + pr_err("addr %pa not registered in io_range_list\n", &addr); return ~0UL; }