From patchwork Sat Dec 31 12:58:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 638233 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7D686C4708E for ; Sat, 31 Dec 2022 12:59:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235440AbiLaM7Z (ORCPT ); Sat, 31 Dec 2022 07:59:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37938 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235620AbiLaM7T (ORCPT ); Sat, 31 Dec 2022 07:59:19 -0500 Received: from mail-lf1-x129.google.com (mail-lf1-x129.google.com [IPv6:2a00:1450:4864:20::129]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7D50C9FC2 for ; Sat, 31 Dec 2022 04:59:18 -0800 (PST) Received: by mail-lf1-x129.google.com with SMTP id cf42so35169063lfb.1 for ; Sat, 31 Dec 2022 04:59:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=xNv+AayRgEP2hIxnzst42s6qKfcZMM4RXSAyHy1K9G4=; b=iiOrpMY3w/TTbypkaSZHyRFyhzS5ObSH/eR4zV4HAkNCnI9zY+xVtU/3LS6fknbrH3 piIXpyKIXMTWjG2G0HnDdHFozuY5+ftZ0MXoesnv0Q7oEhVn9mUOql2sjj/nQd1SABgE +DnTu54G5rxwyfGD8/qKs17b4ufqhApFyT7Un/PTw3v23DDi4fBpvLRz6UsrHGeoBvk+ XlOgnJHlTQM/ui//CCF7vc9lAvAt2T5ZTWOShtwXKy8R/LoX7gZhdFoil7H+UmL9tUeM gEio07V6A9BY63LuGs5sEI2eVwPEzE4BOYyoQolmnLC1bSyIpXfgL8fpVIloM2Bsl5St hQ7w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=xNv+AayRgEP2hIxnzst42s6qKfcZMM4RXSAyHy1K9G4=; b=HI7rM4CPyqf7NjHsoLQOYePf3EC84WpEz1R5PITPhIaejaTz8yEq4lUgoS7/UnPH4k NPU3pSejK1IcUx1waxvgUC7J6g1E26LJJVcEnNZrr5zvO8L5RQOBfMGlDmqzS/0HuUFj nVwOx40izDcMNFdgt6lWbhHrlBlZ7O0kKuGRfeRjXTN6jEWMwcKpAK0N38qftKHOTxD0 k4bqagQgIfI2rcNlgOHUR+lP4vGWJ8FsHK6W1zg9ii7Bz2qEk7dPiUn3ll2+jBN8ytLX YGPPtJhMekDFZ1t0aIjbGlkZGskas8k3om/AAeWbIKfHRm4jQExeY7GW2MLOoDCZBJiM HLEQ== X-Gm-Message-State: AFqh2kqHM8N5rsglbjCQ41q3NdGK5apPFdPBneQJHcfP0pXX9Xb0tSBE S3us0HfzqPr+YFSwSCkqtPkp6w== X-Google-Smtp-Source: AMrXdXvBXBFn0BdIQmVWY9ZjxUjycuef0AXYuWEwfXq/BVNQwH7N1rqZ8Lf4kRvdHoR76cuuimycnw== X-Received: by 2002:a05:6512:695:b0:4b5:8502:efb4 with SMTP id t21-20020a056512069500b004b58502efb4mr12175038lfe.69.1672491556888; Sat, 31 Dec 2022 04:59:16 -0800 (PST) Received: from localhost.localdomain (abxi45.neoplus.adsl.tpnet.pl. [83.9.2.45]) by smtp.gmail.com with ESMTPSA id d10-20020a0565123d0a00b004cb344a8c77sm22266lfv.54.2022.12.31.04.59.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 31 Dec 2022 04:59:16 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: marijn.suijten@somainline.org, Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 01/18] arm64: dts: qcom: ipq6018: Pad addresses to 8 hex digits Date: Sat, 31 Dec 2022 13:58:54 +0100 Message-Id: <20221231125911.437599-2-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221231125911.437599-1-konrad.dybcio@linaro.org> References: <20221231125911.437599-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Some addresses were 7-hex-digits long, or less. Fix that. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/ipq6018.dtsi | 67 ++++++++++++++++++++++----- 1 file changed, 55 insertions(+), 12 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi index 2ceae73a6069..17e15a06254f 100644 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi @@ -146,7 +146,7 @@ reserved-memory { ranges; rpm_msg_ram: memory@60000 { - reg = <0x0 0x60000 0x0 0x6000>; + reg = <0x0 0x00060000 0x0 0x6000>; no-map; }; @@ -181,7 +181,7 @@ soc: soc { prng: qrng@e1000 { compatible = "qcom,prng-ee"; - reg = <0x0 0xe3000 0x0 0x1000>; + reg = <0x0 0x000e3000 0x0 0x1000>; clocks = <&gcc GCC_PRNG_AHB_CLK>; clock-names = "core"; }; @@ -366,6 +366,49 @@ qpic_nand: nand-controller@79b0000 { status = "disabled"; }; + usb3: usb@8af8800 { + compatible = "qcom,ipq6018-dwc3", "qcom,dwc3"; + reg = <0x0 0x08af8800 0x0 0x400>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>, + <&gcc GCC_USB0_MASTER_CLK>, + <&gcc GCC_USB0_SLEEP_CLK>, + <&gcc GCC_USB0_MOCK_UTMI_CLK>; + clock-names = "cfg_noc", + "core", + "sleep", + "mock_utmi"; + + assigned-clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>, + <&gcc GCC_USB0_MASTER_CLK>, + <&gcc GCC_USB0_MOCK_UTMI_CLK>; + assigned-clock-rates = <133330000>, + <133330000>, + <20000000>; + + resets = <&gcc GCC_USB0_BCR>; + status = "disabled"; + + dwc_0: usb@8a00000 { + compatible = "snps,dwc3"; + reg = <0x0 0x08a00000 0x0 0xcd00>; + interrupts = ; + phys = <&qusb_phy_0>, <&usb0_ssphy>; + phy-names = "usb2-phy", "usb3-phy"; + clocks = <&xo>; + clock-names = "ref"; + tx-fifo-resize; + snps,is-utmi-l1-suspend; + snps,hird-threshold = /bits/ 8 <0x0>; + snps,dis_u2_susphy_quirk; + snps,dis_u3_susphy_quirk; + dr_mode = "host"; + }; + }; + intc: interrupt-controller@b000000 { compatible = "qcom,msm-qgic2"; #address-cells = <2>; @@ -388,7 +431,7 @@ v2m@0 { pcie_phy: phy@84000 { compatible = "qcom,ipq6018-qmp-pcie-phy"; - reg = <0x0 0x84000 0x0 0x1bc>; /* Serdes PLL */ + reg = <0x0 0x00084000 0x0 0x1bc>; /* Serdes PLL */ status = "disabled"; #address-cells = <2>; #size-cells = <2>; @@ -404,10 +447,10 @@ pcie_phy: phy@84000 { "common"; pcie_phy0: phy@84200 { - reg = <0x0 0x84200 0x0 0x16c>, /* Serdes Tx */ - <0x0 0x84400 0x0 0x200>, /* Serdes Rx */ - <0x0 0x84800 0x0 0x1f0>, /* PCS: Lane0, COM, PCIE */ - <0x0 0x84c00 0x0 0xf4>; /* pcs_misc */ + reg = <0x0 0x00084200 0x0 0x16c>, /* Serdes Tx */ + <0x0 0x00084400 0x0 0x200>, /* Serdes Rx */ + <0x0 0x00084800 0x0 0x1f0>, /* PCS: Lane0, COM, PCIE */ + <0x0 0x00084c00 0x0 0xf4>; /* pcs_misc */ #phy-cells = <0>; clocks = <&gcc GCC_PCIE0_PIPE_CLK>; @@ -623,7 +666,7 @@ mdio: mdio@90000 { #address-cells = <1>; #size-cells = <0>; compatible = "qcom,ipq6018-mdio", "qcom,ipq4019-mdio"; - reg = <0x0 0x90000 0x0 0x64>; + reg = <0x0 0x00090000 0x0 0x64>; clocks = <&gcc GCC_MDIO_AHB_CLK>; clock-names = "gcc_mdio_ahb_clk"; status = "disabled"; @@ -631,7 +674,7 @@ mdio: mdio@90000 { qusb_phy_1: qusb@59000 { compatible = "qcom,ipq6018-qusb2-phy"; - reg = <0x0 0x059000 0x0 0x180>; + reg = <0x0 0x00059000 0x0 0x180>; #phy-cells = <0>; clocks = <&gcc GCC_USB1_PHY_CFG_AHB_CLK>, @@ -664,7 +707,7 @@ usb2: usb@70f8800 { dwc_1: usb@7000000 { compatible = "snps,dwc3"; - reg = <0x0 0x7000000 0x0 0xcd00>; + reg = <0x0 0x07000000 0x0 0xcd00>; interrupts = ; phys = <&qusb_phy_1>; phy-names = "usb2-phy"; @@ -679,7 +722,7 @@ dwc_1: usb@7000000 { ssphy_0: ssphy@78000 { compatible = "qcom,ipq6018-qmp-usb3-phy"; - reg = <0x0 0x78000 0x0 0x1c4>; + reg = <0x0 0x00078000 0x0 0x1c4>; #address-cells = <2>; #size-cells = <2>; ranges; @@ -708,7 +751,7 @@ usb0_ssphy: phy@78200 { qusb_phy_0: qusb@79000 { compatible = "qcom,ipq6018-qusb2-phy"; - reg = <0x0 0x079000 0x0 0x180>; + reg = <0x0 0x00079000 0x0 0x180>; #phy-cells = <0>; clocks = <&gcc GCC_USB0_PHY_CFG_AHB_CLK>, From patchwork Sat Dec 31 12:58:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 638232 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0FA2CC54EBC for ; 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[83.9.2.45]) by smtp.gmail.com with ESMTPSA id d10-20020a0565123d0a00b004cb344a8c77sm22266lfv.54.2022.12.31.04.59.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 31 Dec 2022 04:59:21 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: marijn.suijten@somainline.org, Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 04/18] arm64: dts: qcom: ipq6018: Fix up some indentation Date: Sat, 31 Dec 2022 13:58:57 +0100 Message-Id: <20221231125911.437599-5-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221231125911.437599-1-konrad.dybcio@linaro.org> References: <20221231125911.437599-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Some properties were not indented consistently. Fix that. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/ipq6018.dtsi | 40 +++++++++++++-------------- 1 file changed, 20 insertions(+), 20 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi index 2026000f3dc7..5452bb85f8e1 100644 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi @@ -249,7 +249,7 @@ qusb_phy_0: qusb@79000 { #phy-cells = <0>; clocks = <&gcc GCC_USB0_PHY_CFG_AHB_CLK>, - <&xo>; + <&xo>; clock-names = "cfg_ahb", "ref"; resets = <&gcc GCC_QUSB2_0_PHY_BCR>; @@ -265,11 +265,11 @@ pcie_phy: phy@84000 { ranges; clocks = <&gcc GCC_PCIE0_AUX_CLK>, - <&gcc GCC_PCIE0_AHB_CLK>; + <&gcc GCC_PCIE0_AHB_CLK>; clock-names = "aux", "cfg_ahb"; resets = <&gcc GCC_PCIE0_PHY_BCR>, - <&gcc GCC_PCIE0PHY_PHY_BCR>; + <&gcc GCC_PCIE0PHY_PHY_BCR>; reset-names = "phy", "common"; @@ -319,8 +319,8 @@ crypto: crypto@73a000 { compatible = "qcom,crypto-v5.1"; reg = <0x0 0x0073a000 0x0 0x6000>; clocks = <&gcc GCC_CRYPTO_AHB_CLK>, - <&gcc GCC_CRYPTO_AXI_CLK>, - <&gcc GCC_CRYPTO_CLK>; + <&gcc GCC_CRYPTO_AXI_CLK>, + <&gcc GCC_CRYPTO_CLK>; clock-names = "iface", "bus", "core"; dmas = <&cryptobam 2>, <&cryptobam 3>; dma-names = "rx", "tx"; @@ -425,7 +425,7 @@ blsp1_uart3: serial@78b1000 { reg = <0x0 0x078b1000 0x0 0x200>; interrupts = ; clocks = <&gcc GCC_BLSP1_UART3_APPS_CLK>, - <&gcc GCC_BLSP1_AHB_CLK>; + <&gcc GCC_BLSP1_AHB_CLK>; clock-names = "core", "iface"; status = "disabled"; }; @@ -438,7 +438,7 @@ blsp1_spi1: spi@78b5000 { interrupts = ; spi-max-frequency = <50000000>; clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>, - <&gcc GCC_BLSP1_AHB_CLK>; + <&gcc GCC_BLSP1_AHB_CLK>; clock-names = "core", "iface"; dmas = <&blsp_dma 12>, <&blsp_dma 13>; dma-names = "tx", "rx"; @@ -453,7 +453,7 @@ blsp1_spi2: spi@78b6000 { interrupts = ; spi-max-frequency = <50000000>; clocks = <&gcc GCC_BLSP1_QUP2_SPI_APPS_CLK>, - <&gcc GCC_BLSP1_AHB_CLK>; + <&gcc GCC_BLSP1_AHB_CLK>; clock-names = "core", "iface"; dmas = <&blsp_dma 14>, <&blsp_dma 15>; dma-names = "tx", "rx"; @@ -511,8 +511,8 @@ qpic_nand: nand-controller@79b0000 { clock-names = "core", "aon"; dmas = <&qpic_bam 0>, - <&qpic_bam 1>, - <&qpic_bam 2>; + <&qpic_bam 1>, + <&qpic_bam 2>; dma-names = "tx", "rx", "cmd"; pinctrl-0 = <&qpic_pins>; pinctrl-names = "default"; @@ -527,13 +527,13 @@ usb3: usb@8af8800 { ranges; clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>, - <&gcc GCC_USB0_MASTER_CLK>, - <&gcc GCC_USB0_SLEEP_CLK>, - <&gcc GCC_USB0_MOCK_UTMI_CLK>; + <&gcc GCC_USB0_MASTER_CLK>, + <&gcc GCC_USB0_SLEEP_CLK>, + <&gcc GCC_USB0_MOCK_UTMI_CLK>; clock-names = "cfg_noc", - "core", - "sleep", - "mock_utmi"; + "core", + "sleep", + "mock_utmi"; assigned-clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>, <&gcc GCC_USB0_MASTER_CLK>, @@ -568,10 +568,10 @@ intc: interrupt-controller@b000000 { #size-cells = <2>; interrupt-controller; #interrupt-cells = <0x3>; - reg = <0x0 0x0b000000 0x0 0x1000>, /*GICD*/ - <0x0 0x0b002000 0x0 0x1000>, /*GICC*/ - <0x0 0x0b001000 0x0 0x1000>, /*GICH*/ - <0x0 0x0b004000 0x0 0x1000>; /*GICV*/ + reg = <0x0 0x0b000000 0x0 0x1000>, /*GICD*/ + <0x0 0x0b002000 0x0 0x1000>, /*GICC*/ + <0x0 0x0b001000 0x0 0x1000>, /*GICH*/ + <0x0 0x0b004000 0x0 0x1000>; /*GICV*/ interrupts = ; ranges = <0 0 0 0xb00a000 0 0xffd>; From patchwork Sat Dec 31 12:58:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 638231 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D5AB6C54EBD for ; Sat, 31 Dec 2022 12:59:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235666AbiLaM72 (ORCPT ); Sat, 31 Dec 2022 07:59:28 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38028 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235673AbiLaM7Z (ORCPT ); Sat, 31 Dec 2022 07:59:25 -0500 Received: from mail-lf1-x12b.google.com (mail-lf1-x12b.google.com [IPv6:2a00:1450:4864:20::12b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E3F9195B5 for ; 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[83.9.2.45]) by smtp.gmail.com with ESMTPSA id d10-20020a0565123d0a00b004cb344a8c77sm22266lfv.54.2022.12.31.04.59.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 31 Dec 2022 04:59:22 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: marijn.suijten@somainline.org, Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 05/18] arm64: dts: qcom: ipq6018: Add/remove some newlines Date: Sat, 31 Dec 2022 13:58:58 +0100 Message-Id: <20221231125911.437599-6-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221231125911.437599-1-konrad.dybcio@linaro.org> References: <20221231125911.437599-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Some lines were broken very aggresively, presumably to fit under 80 chars and some places could have used a newline, particularly between subsequent nodes. Address all that and remove redundant comments near PCIe ranges while at it so as not to exceed 100 chars needlessly. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/ipq6018.dtsi | 26 ++++++++++++-------------- 1 file changed, 12 insertions(+), 14 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi index 5452bb85f8e1..6b4f653239ab 100644 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi @@ -102,26 +102,31 @@ opp-864000000 { opp-microvolt = <725000>; clock-latency-ns = <200000>; }; + opp-1056000000 { opp-hz = /bits/ 64 <1056000000>; opp-microvolt = <787500>; clock-latency-ns = <200000>; }; + opp-1320000000 { opp-hz = /bits/ 64 <1320000000>; opp-microvolt = <862500>; clock-latency-ns = <200000>; }; + opp-1440000000 { opp-hz = /bits/ 64 <1440000000>; opp-microvolt = <925000>; clock-latency-ns = <200000>; }; + opp-1608000000 { opp-hz = /bits/ 64 <1608000000>; opp-microvolt = <987500>; clock-latency-ns = <200000>; }; + opp-1800000000 { opp-hz = /bits/ 64 <1800000000>; opp-microvolt = <1062500>; @@ -131,8 +136,7 @@ opp-1800000000 { pmuv8: pmu { compatible = "arm,cortex-a53-pmu"; - interrupts = ; + interrupts = ; }; psci: psci { @@ -734,24 +738,18 @@ pcie0: pci@20000000 { phys = <&pcie_phy0>; phy-names = "pciephy"; - ranges = <0x81000000 0 0x20200000 0 0x20200000 - 0 0x10000>, /* downstream I/O */ - <0x82000000 0 0x20220000 0 0x20220000 - 0 0xfde0000>; /* non-prefetchable memory */ + ranges = <0x81000000 0 0x20200000 0 0x20200000 0 0x10000>, + <0x82000000 0 0x20220000 0 0x20220000 0 0xfde0000>; interrupts = ; interrupt-names = "msi"; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0x7>; - interrupt-map = <0 0 0 1 &intc 0 75 - IRQ_TYPE_LEVEL_HIGH>, /* int_a */ - <0 0 0 2 &intc 0 78 - IRQ_TYPE_LEVEL_HIGH>, /* int_b */ - <0 0 0 3 &intc 0 79 - IRQ_TYPE_LEVEL_HIGH>, /* int_c */ - <0 0 0 4 &intc 0 83 - IRQ_TYPE_LEVEL_HIGH>; /* int_d */ + interrupt-map = <0 0 0 1 &intc 0 75 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ + <0 0 0 2 &intc 0 78 IRQ_TYPE_LEVEL_HIGH>, /* int_b */ + <0 0 0 3 &intc 0 79 IRQ_TYPE_LEVEL_HIGH>, /* int_c */ + <0 0 0 4 &intc 0 83 IRQ_TYPE_LEVEL_HIGH>; /* int_d */ clocks = <&gcc GCC_SYS_NOC_PCIE0_AXI_CLK>, <&gcc GCC_PCIE0_AXI_M_CLK>, From patchwork Sat Dec 31 12:59:00 2022 Content-Type: text/plain; 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Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index 109c9d2b684d..a359ced4b6b4 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -1765,7 +1765,7 @@ usb_1_ssphy: usb3-phy@8903400 { pmu@9091000 { compatible = "qcom,sc8280xp-llcc-bwmon", "qcom,sc7280-llcc-bwmon"; - reg = <0 0x9091000 0 0x1000>; + reg = <0 0x09091000 0 0x1000>; interrupts = ; From patchwork Sat Dec 31 12:59:02 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 638229 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9CFECC4708E for ; Sat, 31 Dec 2022 12:59:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235713AbiLaM7h (ORCPT ); Sat, 31 Dec 2022 07:59:37 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38040 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235712AbiLaM7d (ORCPT ); Sat, 31 Dec 2022 07:59:33 -0500 Received: from mail-lf1-x133.google.com (mail-lf1-x133.google.com [IPv6:2a00:1450:4864:20::133]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A18C0EE39 for ; Sat, 31 Dec 2022 04:59:29 -0800 (PST) Received: by mail-lf1-x133.google.com with SMTP id 1so35161067lfz.4 for ; Sat, 31 Dec 2022 04:59:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=3KWb6JfwG6Ts20LHUhQAxhPE9XSRDnMV5XfHaceL3Pg=; b=McpTyAx3xvsVRFBGvBoC2t35E4wHtaZEinIEaeNOhxp+1Lbh4sWfqdluB5z/5tUWs6 3xMAHWtM7e4ISbpQfsYfut5VuME3oXCjCLK8ao9DCXR/phaU39rZhTR7cqgQRvVn7LiC Wd5XGzji1x8Kw/PmuaUynj/+7WJjJX7VdEet3B5ieFJzlMeCk0WExz6Ma99dgEoAyoQ3 pzv8WsSGYC9xQmnV4dYXota5JpBZt0bqhg+ooRG2XH8th6iNr88Bv398fEoTls6dEXWI a1+UWJdDdRYx1DpsL6LEwBSWVHMGOyIp24ilCgRn2zDfQdzBWBkDP0mMT20XX+7qHxPZ CiUw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=3KWb6JfwG6Ts20LHUhQAxhPE9XSRDnMV5XfHaceL3Pg=; b=lxgmGyxIxyNcrQs81eOs0LtONFv58JQggjFgy5AvjXQ3yl5UeOnGgluByXh0+FHn55 +cFn6xYunuJhE7ByIaePWyu7llVbsfSz0nkKWVeGEDI0WJNveTeQPEUbcYtFIUsd+n2z yWGnphRNLrPqk7ojcwzKyJDfri2PlHcHmCa8NbYjQ14LwfhNFNfuXJzO4WKq/uf8nkbM RE3wirnHSFIRkQxmSXtqWKKTARnW6C1ValdXtzVxjbKLSkREo/OffO0A6pGv7wfxut6V FeSoRwPeqyszg1U0nXgL4wELZL7JJ1Of4b/NLC2BvhjmlXPcu1H8drt3w4k5Z1bsV4hJ oKfQ== X-Gm-Message-State: AFqh2koOrKBV+P8kBZ5uO4I9C9G9vkvDxMe013Z8ZKaorPJAkUiJxV8Z XrjZ5tZQFVcSQL+smbtZVBFuwQ== X-Google-Smtp-Source: AMrXdXuVh/3jxJmadNotiwLvCfoWzTrI1+mycskWB9udTjZ20rP10JJaPkNTbOqSGn1Iu/2XApoSog== X-Received: by 2002:a05:6512:281b:b0:4cb:2c79:eeb3 with SMTP id cf27-20020a056512281b00b004cb2c79eeb3mr1174984lfb.40.1672491568960; Sat, 31 Dec 2022 04:59:28 -0800 (PST) Received: from localhost.localdomain (abxi45.neoplus.adsl.tpnet.pl. [83.9.2.45]) by smtp.gmail.com with ESMTPSA id d10-20020a0565123d0a00b004cb344a8c77sm22266lfv.54.2022.12.31.04.59.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 31 Dec 2022 04:59:28 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: marijn.suijten@somainline.org, Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 09/18] arm64: dts: qcom: sm6350: Pad addresses to 8 hex digits Date: Sat, 31 Dec 2022 13:59:02 +0100 Message-Id: <20221231125911.437599-10-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221231125911.437599-1-konrad.dybcio@linaro.org> References: <20221231125911.437599-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Some addresses were 7-hex-digits long, or less. Fix that. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm6350.dtsi | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi index 8944dcbbe3a2..e71ffc31d41e 100644 --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi @@ -557,7 +557,7 @@ gpi_dma0: dma-controller@800000 { qupv3_id_0: geniqup@8c0000 { compatible = "qcom,geni-se-qup"; - reg = <0x0 0x8c0000 0x0 0x2000>; + reg = <0x0 0x008c0000 0x0 0x2000>; clock-names = "m-ahb", "s-ahb"; clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>, <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>; @@ -630,7 +630,7 @@ gpi_dma1: dma-controller@900000 { qupv3_id_1: geniqup@9c0000 { compatible = "qcom,geni-se-qup"; - reg = <0x0 0x9c0000 0x0 0x2000>; + reg = <0x0 0x009c0000 0x0 0x2000>; clock-names = "m-ahb", "s-ahb"; clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>, <&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>; @@ -702,7 +702,7 @@ i2c8: i2c@988000 { uart9: serial@98c000 { compatible = "qcom,geni-debug-uart"; - reg = <0 0x98c000 0 0x4000>; + reg = <0 0x0098c000 0 0x4000>; clock-names = "se"; clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>; pinctrl-names = "default"; @@ -1654,11 +1654,11 @@ aoss_qmp: power-controller@c300000 { spmi_bus: spmi@c440000 { compatible = "qcom,spmi-pmic-arb"; - reg = <0 0xc440000 0 0x1100>, - <0 0xc600000 0 0x2000000>, - <0 0xe600000 0 0x100000>, - <0 0xe700000 0 0xa0000>, - <0 0xc40a000 0 0x26000>; + reg = <0 0x0c440000 0 0x1100>, + <0 0x0c600000 0 0x2000000>, + <0 0x0e600000 0 0x100000>, + <0 0x0e700000 0 0xa0000>, + <0 0x0c40a000 0 0x26000>; reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; interrupt-names = "periph_irq"; interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>; From patchwork Sat Dec 31 12:59:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 638228 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D0DCEC4708E for ; Sat, 31 Dec 2022 12:59:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231862AbiLaM76 (ORCPT ); Sat, 31 Dec 2022 07:59:58 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38246 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235735AbiLaM7e (ORCPT ); Sat, 31 Dec 2022 07:59:34 -0500 Received: from mail-lf1-x12c.google.com (mail-lf1-x12c.google.com [IPv6:2a00:1450:4864:20::12c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A4189E08E for ; Sat, 31 Dec 2022 04:59:33 -0800 (PST) Received: by mail-lf1-x12c.google.com with SMTP id z26so35165057lfu.8 for ; Sat, 31 Dec 2022 04:59:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=lJ65VvJ3kX6hIqWv3QscxYLubIMP/hUfG0etyqa3ojA=; b=mLFszxd4SPFPh374U3JH7uBBtWxMGVgC6RCcebQF1fDqGQO4Koy6w2oIDwdpSKb5TD hXvzpKnX8pOd8vwMZrNNypAKV2Ury4MfRcZSgSoyAlRDfLdKh7nHzMQj5qgKtGB7Ui7d Xa55xMixcUjU8DyJdfkKSiLg7sbX6+lIX+/KY6jNs+zJuIZd7PYe0MpBZ3U3AtshadRg /HSzRK1hnSMEKDVpJiH8BW3lF8dbtDG9t5wC5PThO9TOd55sfd+9Q5l64tAwtGq0qU5V AZROCZa+2t1KzDwy38pGF3nLkofBpnk+sXUO8vAiej04H3hQapX45yE3+kUOXyK3yOFE zN0A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=lJ65VvJ3kX6hIqWv3QscxYLubIMP/hUfG0etyqa3ojA=; b=u7FZrJrk/MNJyJMogBPf3PCRTSIZxH8LPAQvgGjH1uwvq2ETv1G1leY+1EOFWRJSuj AuqUMJkP8R/nvryO91IZWmgQm7x40iSdXoCb9/Z6Mz8DqeCMCECYYjC0KeMI99I9Jfie XeuWHQ4C4ob1OeWqqH/1fd8VUqQqT8bfYjZdWgvv9shnbLiI1hdKpa59Zd0FjKQm3aGG D9TsIM4nYJkwvpfo+dZq25g9TS36lGJFTxMScNZOQiNxHEZ0hQ5xSpMGNPS3wEst2dQw IJVYU2rnl/Zwh+0Dk1OJj9oAduax/tWKrlGzFm2ffmOSsfYtOH7rjsn8XXeom4xnSyoT INvA== X-Gm-Message-State: AFqh2koS3Pnf2Q0YraA5+Q9f05ZeMko37AdqdpUc2njH6dCawGZoU4BK aRXWU3vyDZrOly+yKULm+vAcKg== X-Google-Smtp-Source: AMrXdXtJ0klYzHg3MKA8fKVpqNLbFhOl8cqg7IPnVLjRcgUJvXuSG/kLhnPqE7AenUNFrIIst0I8Tw== X-Received: by 2002:ac2:59c9:0:b0:4a4:68b7:d621 with SMTP id x9-20020ac259c9000000b004a468b7d621mr9742325lfn.8.1672491572006; Sat, 31 Dec 2022 04:59:32 -0800 (PST) Received: from localhost.localdomain (abxi45.neoplus.adsl.tpnet.pl. [83.9.2.45]) by smtp.gmail.com with ESMTPSA id d10-20020a0565123d0a00b004cb344a8c77sm22266lfv.54.2022.12.31.04.59.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 31 Dec 2022 04:59:31 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: marijn.suijten@somainline.org, Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 11/18] arm64: dts: qcom: sm8250: Pad addresses to 8 hex digits Date: Sat, 31 Dec 2022 13:59:04 +0100 Message-Id: <20221231125911.437599-12-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221231125911.437599-1-konrad.dybcio@linaro.org> References: <20221231125911.437599-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Some addresses were 7-hex-digits long, or less. Fix that. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 54 ++++++++++++++-------------- 1 file changed, 27 insertions(+), 27 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index 0b6a6a809503..a642ff1af094 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -1899,10 +1899,10 @@ pcie0_phy: phy@1c06000 { status = "disabled"; pcie0_lane: phy@1c06200 { - reg = <0 0x1c06200 0 0x170>, /* tx */ - <0 0x1c06400 0 0x200>, /* rx */ - <0 0x1c06800 0 0x1f0>, /* pcs */ - <0 0x1c06c00 0 0xf4>; /* "pcs_lane" same as pcs_misc? */ + reg = <0 0x01c06200 0 0x170>, /* tx */ + <0 0x01c06400 0 0x200>, /* rx */ + <0 0x01c06800 0 0x1f0>, /* pcs */ + <0 0x01c06c00 0 0xf4>; /* "pcs_lane" same as pcs_misc? */ clocks = <&gcc GCC_PCIE_0_PIPE_CLK>; clock-names = "pipe0"; @@ -2005,12 +2005,12 @@ pcie1_phy: phy@1c0e000 { status = "disabled"; pcie1_lane: phy@1c0e200 { - reg = <0 0x1c0e200 0 0x170>, /* tx0 */ - <0 0x1c0e400 0 0x200>, /* rx0 */ - <0 0x1c0ea00 0 0x1f0>, /* pcs */ - <0 0x1c0e600 0 0x170>, /* tx1 */ - <0 0x1c0e800 0 0x200>, /* rx1 */ - <0 0x1c0ee00 0 0xf4>; /* "pcs_com" same as pcs_misc? */ + reg = <0 0x01c0e200 0 0x170>, /* tx0 */ + <0 0x01c0e400 0 0x200>, /* rx0 */ + <0 0x01c0ea00 0 0x1f0>, /* pcs */ + <0 0x01c0e600 0 0x170>, /* tx1 */ + <0 0x01c0e800 0 0x200>, /* rx1 */ + <0 0x01c0ee00 0 0xf4>; /* "pcs_com" same as pcs_misc? */ clocks = <&gcc GCC_PCIE_1_PIPE_CLK>; clock-names = "pipe0"; @@ -2094,7 +2094,7 @@ pcie2: pci@1c10000 { pcie2_phy: phy@1c16000 { compatible = "qcom,sm8250-qmp-modem-pcie-phy"; - reg = <0 0x1c16000 0 0x1c0>; + reg = <0 0x01c16000 0 0x1c0>; #address-cells = <2>; #size-cells = <2>; ranges; @@ -2113,12 +2113,12 @@ pcie2_phy: phy@1c16000 { status = "disabled"; pcie2_lane: phy@1c16200 { - reg = <0 0x1c16200 0 0x170>, /* tx0 */ - <0 0x1c16400 0 0x200>, /* rx0 */ - <0 0x1c16a00 0 0x1f0>, /* pcs */ - <0 0x1c16600 0 0x170>, /* tx1 */ - <0 0x1c16800 0 0x200>, /* rx1 */ - <0 0x1c16e00 0 0xf4>; /* "pcs_com" same as pcs_misc? */ + reg = <0 0x01c16200 0 0x170>, /* tx0 */ + <0 0x01c16400 0 0x200>, /* rx0 */ + <0 0x01c16a00 0 0x1f0>, /* pcs */ + <0 0x01c16600 0 0x170>, /* tx1 */ + <0 0x01c16800 0 0x200>, /* rx1 */ + <0 0x01c16e00 0 0xf4>; /* "pcs_com" same as pcs_misc? */ clocks = <&gcc GCC_PCIE_2_PIPE_CLK>; clock-names = "pipe0"; @@ -3792,16 +3792,16 @@ camss: camss@ac6a000 { compatible = "qcom,sm8250-camss"; status = "disabled"; - reg = <0 0xac6a000 0 0x2000>, - <0 0xac6c000 0 0x2000>, - <0 0xac6e000 0 0x1000>, - <0 0xac70000 0 0x1000>, - <0 0xac72000 0 0x1000>, - <0 0xac74000 0 0x1000>, - <0 0xacb4000 0 0xd000>, - <0 0xacc3000 0 0xd000>, - <0 0xacd9000 0 0x2200>, - <0 0xacdb200 0 0x2200>; + reg = <0 0x0ac6a000 0 0x2000>, + <0 0x0ac6c000 0 0x2000>, + <0 0x0ac6e000 0 0x1000>, + <0 0x0ac70000 0 0x1000>, + <0 0x0ac72000 0 0x1000>, + <0 0x0ac74000 0 0x1000>, + <0 0x0acb4000 0 0xd000>, + <0 0x0acc3000 0 0xd000>, + <0 0x0acd9000 0 0x2200>, + <0 0x0acdb200 0 0x2200>; reg-names = "csiphy0", "csiphy1", "csiphy2", From patchwork Sat Dec 31 12:59:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 638227 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B7895C54E76 for ; Sat, 31 Dec 2022 13:00:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235796AbiLaNAA (ORCPT ); Sat, 31 Dec 2022 08:00:00 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38258 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235706AbiLaM7h (ORCPT ); Sat, 31 Dec 2022 07:59:37 -0500 Received: from mail-lf1-x12e.google.com (mail-lf1-x12e.google.com [IPv6:2a00:1450:4864:20::12e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 44E41DF4B for ; Sat, 31 Dec 2022 04:59:36 -0800 (PST) Received: by mail-lf1-x12e.google.com with SMTP id g13so35149381lfv.7 for ; Sat, 31 Dec 2022 04:59:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=AvCj7sLe5EEXOiZsxA6DWV2OM1HHkgdGS5svQOsp/pk=; b=KUF5ypykotlLGND+PTwg7I55UoeeawnlT0V9ZA0tHRsnPQWJA6zdh/mLr/DS70t5XM +nRCRbZruSiRRydBuoDT/lyOhqws7o7CmtCVrOZmPx8YCBi8cxL1V/fq0JHoCG9iaEp7 tygRn6JcoFhwgtIZub3XZNcQpHuFxsdpaRPNm1rFHQX34upyitsHtkagxN0ugHR5BeWY ZqItygv4SvbSZncvwjI626wrdzMwI/OqxtQqA0tM9s0nhwAqPwoqSjSeXxdQWC+C1dWw 3vCXhkQCPPRoOKMNF62llk5GR79ZR9cimiF0oZzWO3oP3zyyAwnttfeml+jErojrb3jf jL4A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=AvCj7sLe5EEXOiZsxA6DWV2OM1HHkgdGS5svQOsp/pk=; b=69JjBlB0J42JKRp4uHQPCuSMzTSlwDtAe9lqf7mm89Y+BeREYbamZIP6Id7cWVe4sX iEqWhj2F5fGyBUXg8xhS3w+aXq3499W1dkGGo6lICEhhzEB099DPp8AdItZ0jQ5C0WZO Wh+fHCrXWkLhyuJTJNsdIo8Nd2MgZJ4oHNCWS4M6wUNBjH+TG8cFHw8SuhihM5nyzroS mBNUQ4GY6M11xoh6X8XSxe9dH/o2yu8Z2l1WfFVUhzEdCPqTtHH2iVN5YWYLoMXhiqtp FS0p+i8VN42DOYN+jia1hZnTgKEGh8YKmFNd4Io+SJs7LFXq3IwWCjfYcg988qQNpdzh Fxdg== X-Gm-Message-State: AFqh2kqjil7NodIzG5m7naIDysf7/ZJdVk+lZu/aSKA0A0dQwEwv1gii wUaGx4OT5XswysGfIq1k+NEZPA== X-Google-Smtp-Source: AMrXdXv0ycHwyn6NLb9oBYtU/qIwc+gR0tf3+GgAmqSuyYTmR5fquuY5DJATi9FcxBHJDlc6ZfhBtA== X-Received: by 2002:a05:6512:2286:b0:4b5:9891:d6ff with SMTP id f6-20020a056512228600b004b59891d6ffmr11937811lfu.46.1672491575853; Sat, 31 Dec 2022 04:59:35 -0800 (PST) Received: from localhost.localdomain (abxi45.neoplus.adsl.tpnet.pl. [83.9.2.45]) by smtp.gmail.com with ESMTPSA id d10-20020a0565123d0a00b004cb344a8c77sm22266lfv.54.2022.12.31.04.59.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 31 Dec 2022 04:59:35 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: marijn.suijten@somainline.org, Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 13/18] arm64: dts: qcom: sc7180: Pad addresses to 8 hex digits Date: Sat, 31 Dec 2022 13:59:06 +0100 Message-Id: <20221231125911.437599-14-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221231125911.437599-1-konrad.dybcio@linaro.org> References: <20221231125911.437599-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Some addresses were 7-hex-digits long, or less. Fix that. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index f71cf21a8dd8..67b9ae3eff83 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -690,8 +690,8 @@ gpu_speed_bin: gpu_speed_bin@1d2 { sdhc_1: mmc@7c4000 { compatible = "qcom,sc7180-sdhci", "qcom,sdhci-msm-v5"; - reg = <0 0x7c4000 0 0x1000>, - <0 0x07c5000 0 0x1000>; + reg = <0 0x007c4000 0 0x1000>, + <0 0x007c5000 0 0x1000>; reg-names = "hc", "cqhci"; iommus = <&apps_smmu 0x60 0x0>; @@ -1421,9 +1421,9 @@ ipa: ipa@1e40000 { iommus = <&apps_smmu 0x440 0x0>, <&apps_smmu 0x442 0x0>; - reg = <0 0x1e40000 0 0x7000>, - <0 0x1e47000 0 0x2000>, - <0 0x1e04000 0 0x2c000>; + reg = <0 0x01e40000 0 0x7000>, + <0 0x01e47000 0 0x2000>, + <0 0x01e04000 0 0x2c000>; reg-names = "ipa-reg", "ipa-shared", "gsi"; @@ -3116,11 +3116,11 @@ mdss_dp: displayport-controller@ae90000 { compatible = "qcom,sc7180-dp"; status = "disabled"; - reg = <0 0xae90000 0 0x200>, - <0 0xae90200 0 0x200>, - <0 0xae90400 0 0xc00>, - <0 0xae91000 0 0x400>, - <0 0xae91400 0 0x400>; + reg = <0 0x0ae90000 0 0x200>, + <0 0x0ae90200 0 0x200>, + <0 0x0ae90400 0 0xc00>, + <0 0x0ae91000 0 0x400>, + <0 0x0ae91400 0 0x400>; interrupt-parent = <&mdss>; interrupts = <12>; From patchwork Sat Dec 31 12:59:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 638226 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D886CC54EBD for ; Sat, 31 Dec 2022 13:00:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235714AbiLaNAB (ORCPT ); Sat, 31 Dec 2022 08:00:01 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38256 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235715AbiLaM7i (ORCPT ); Sat, 31 Dec 2022 07:59:38 -0500 Received: from mail-lf1-x132.google.com (mail-lf1-x132.google.com [IPv6:2a00:1450:4864:20::132]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B8757E010 for ; Sat, 31 Dec 2022 04:59:37 -0800 (PST) Received: by mail-lf1-x132.google.com with SMTP id b3so35180125lfv.2 for ; Sat, 31 Dec 2022 04:59:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=fHHZiDJH4yLcL25GvBawR0gVWLB+uV7msCDoplyv15c=; b=qifh4ljbUMyyB7IW/tBUcw4mycSx+85LVehKLv2C6Ii7co9fKqoh6Vw6/xKIvrzUD1 wSvxS7sg9CkR/JwZlLnc8YoMjcxLqXujLJXxLw40Awvv6uWBKDsZ17QJU5/IYRiWb9sE +tSbH7ZTw+L3/WNrygo6ikIqRa3srwoNfKT0YuiGVrV4fnB+M4D+h3PkBxfCycpupSHo Mmh8yl2mLvyMRfvKCBkwLamfKy1k6LctRWD7q4FpdUANcaZNB3iptu6+ABYnmRECz5qo fon+gaiX7NRksM8U+smD5mp1dr401NEk+kHd6zgVdHpcwKJIV3MA7rnh1k+iSrfh32kh Xo7g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=fHHZiDJH4yLcL25GvBawR0gVWLB+uV7msCDoplyv15c=; b=Pl0jUz4P65FVfuf29jqVaQN7sCxKOdx02qEm8mFPT0CrlzccGbxm73kREPhyrS/qPz wRE0HRr7yY4Q8YBMg1xvkL0htu2XyIabSOaeACnsrKY5JtjItVlV1aJQ3G0idSBDT62y bg41JWUY3K93PX7xY+Cbz9foTPVXEyUurbVz71V9J6bPZxEGB3sAv7E1dJs+Dr6Ekgvf lbjnMTnAkoBzORuftZ1LWU20E4UF0TZ5xnbKQvuERDIJ5MPwLKVLMy+bB38g+yvToAXF erLLe8sScyMJHv/+LaLXLhGnUP+442Ri7sCagRHdOIXZsI5BPmRGX5rXsWHtTmFwPrHf +VyA== X-Gm-Message-State: AFqh2kp2CkdG/IhPYdF/yOWfqnZ/8mJDqbtUQzzaB4FB600HSMVSYLUK PnHI0vfTFV1ebGetYXOE+xlBOQ== X-Google-Smtp-Source: AMrXdXvmCZeetFJmI2568D/EX/5mg02cnoYqfmAcQ6yblmr6jTThVdLJ2vWdgcXN7ojX348TIcpkyQ== X-Received: by 2002:a05:6512:1592:b0:4b5:b87a:3264 with SMTP id bp18-20020a056512159200b004b5b87a3264mr10430969lfb.56.1672491577291; Sat, 31 Dec 2022 04:59:37 -0800 (PST) Received: from localhost.localdomain (abxi45.neoplus.adsl.tpnet.pl. [83.9.2.45]) by smtp.gmail.com with ESMTPSA id d10-20020a0565123d0a00b004cb344a8c77sm22266lfv.54.2022.12.31.04.59.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 31 Dec 2022 04:59:36 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: marijn.suijten@somainline.org, Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 14/18] arm64: dts: qcom: sc7280: Pad addresses to 8 hex digits Date: Sat, 31 Dec 2022 13:59:07 +0100 Message-Id: <20221231125911.437599-15-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221231125911.437599-1-konrad.dybcio@linaro.org> References: <20221231125911.437599-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Some addresses were 7-hex-digits long, or less. Fix that. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 46 ++++++++++++++-------------- 1 file changed, 23 insertions(+), 23 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index 0adf13399e64..cbf571baca9b 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -2171,9 +2171,9 @@ ipa: ipa@1e40000 { iommus = <&apps_smmu 0x480 0x0>, <&apps_smmu 0x482 0x0>; - reg = <0 0x1e40000 0 0x8000>, - <0 0x1e50000 0 0x4ad0>, - <0 0x1e04000 0 0x23000>; + reg = <0 0x01e40000 0 0x8000>, + <0 0x01e50000 0 0x4ad0>, + <0 0x01e04000 0 0x23000>; reg-names = "ipa-reg", "ipa-shared", "gsi"; @@ -2455,7 +2455,7 @@ lpass_cpu: audio@3987000 { lpass_hm: clock-controller@3c00000 { compatible = "qcom,sc7280-lpasshm"; - reg = <0 0x3c00000 0 0x28>; + reg = <0 0x03c00000 0 0x28>; clocks = <&rpmhcc RPMH_CXO_CLK>; clock-names = "bi_tcxo"; #clock-cells = <1>; @@ -3489,7 +3489,7 @@ IPCC_MPROC_SIGNAL_GLINK_QMP pmu@9091000 { compatible = "qcom,sc7280-llcc-bwmon"; - reg = <0 0x9091000 0 0x1000>; + reg = <0 0x09091000 0 0x1000>; interrupts = ; @@ -3571,7 +3571,7 @@ dc_noc: interconnect@90e0000 { }; gem_noc: interconnect@9100000 { - reg = <0 0x9100000 0 0xe2200>; + reg = <0 0x09100000 0 0xe2200>; compatible = "qcom,sc7280-gem-noc"; #interconnect-cells = <2>; qcom,bcm-voters = <&apps_bcm_voter>; @@ -3586,8 +3586,8 @@ system-cache-controller@9200000 { eud: eud@88e0000 { compatible = "qcom,sc7280-eud","qcom,eud"; - reg = <0 0x88e0000 0 0x2000>, - <0 0x88e2000 0 0x1000>; + reg = <0 0x088e0000 0 0x2000>, + <0 0x088e2000 0 0x1000>; interrupts-extended = <&pdc 11 IRQ_TYPE_LEVEL_HIGH>; ports { port@0 { @@ -3750,7 +3750,7 @@ opp-460000048 { videocc: clock-controller@aaf0000 { compatible = "qcom,sc7280-videocc"; - reg = <0 0xaaf0000 0 0x10000>; + reg = <0 0x0aaf0000 0 0x10000>; clocks = <&rpmhcc RPMH_CXO_CLK>, <&rpmhcc RPMH_CXO_CLK_A>; clock-names = "bi_tcxo", "bi_tcxo_ao"; @@ -3773,7 +3773,7 @@ camcc: clock-controller@ad00000 { dispcc: clock-controller@af00000 { compatible = "qcom,sc7280-dispcc"; - reg = <0 0xaf00000 0 0x20000>; + reg = <0 0x0af00000 0 0x20000>; clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_DISP_GPLL0_CLK_SRC>, <&mdss_dsi_phy 0>, @@ -4001,10 +4001,10 @@ mdss_edp: edp@aea0000 { pinctrl-names = "default"; pinctrl-0 = <&edp_hot_plug_det>; - reg = <0 0xaea0000 0 0x200>, - <0 0xaea0200 0 0x200>, - <0 0xaea0400 0 0xc00>, - <0 0xaea1000 0 0x400>; + reg = <0 0x0aea0000 0 0x200>, + <0 0x0aea0200 0 0x200>, + <0 0x0aea0400 0 0xc00>, + <0 0x0aea1000 0 0x400>; interrupt-parent = <&mdss>; interrupts = <14>; @@ -4076,10 +4076,10 @@ opp-810000000 { mdss_edp_phy: phy@aec2a00 { compatible = "qcom,sc7280-edp-phy"; - reg = <0 0xaec2a00 0 0x19c>, - <0 0xaec2200 0 0xa0>, - <0 0xaec2600 0 0xa0>, - <0 0xaec2000 0 0x1c0>; + reg = <0 0x0aec2a00 0 0x19c>, + <0 0x0aec2200 0 0xa0>, + <0 0x0aec2600 0 0xa0>, + <0 0x0aec2000 0 0x1c0>; clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_EDP_CLKREF_EN>; @@ -4095,11 +4095,11 @@ mdss_edp_phy: phy@aec2a00 { mdss_dp: displayport-controller@ae90000 { compatible = "qcom,sc7280-dp"; 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[83.9.2.45]) by smtp.gmail.com with ESMTPSA id d10-20020a0565123d0a00b004cb344a8c77sm22266lfv.54.2022.12.31.04.59.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 31 Dec 2022 04:59:43 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: marijn.suijten@somainline.org, Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 18/18] arm64: dts: qcom: sm6115: Pad addresses to 8 hex digits Date: Sat, 31 Dec 2022 13:59:11 +0100 Message-Id: <20221231125911.437599-19-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221231125911.437599-1-konrad.dybcio@linaro.org> References: <20221231125911.437599-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Some addresses were 7-hex-digits long, or less. Fix that. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm6115.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi index b3ed6ec16205..76dab4c2e8ed 100644 --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi @@ -831,9 +831,9 @@ ufs_mem_phy: phy@4807000 { status = "disabled"; ufs_mem_phy_lanes: phy@4807400 { - reg = <0 0x4807400 0 0x098>, - <0 0x4807600 0 0x130>, - <0 0x4807c00 0 0x16c>; + reg = <0 0x04807400 0 0x098>, + <0 0x04807600 0 0x130>, + <0 0x04807c00 0 0x16c>; #phy-cells = <0>; }; };