From patchwork Sat Dec 31 22:24:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lux Aliaga X-Patchwork-Id: 638217 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D003AC4708E for ; Sat, 31 Dec 2022 22:24:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229628AbiLaWYq (ORCPT ); Sat, 31 Dec 2022 17:24:46 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55412 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232148AbiLaWYo (ORCPT ); Sat, 31 Dec 2022 17:24:44 -0500 Received: from amity.mint.lgbt (vmi888983.contaboserver.net [149.102.157.145]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8371B6396 for ; Sat, 31 Dec 2022 14:24:42 -0800 (PST) Received: from amity.mint.lgbt (mx.mint.lgbt [127.0.0.1]) by amity.mint.lgbt (Postfix) with ESMTP id 4NkxWX4gyCz1S5Ds for ; Sat, 31 Dec 2022 17:24:40 -0500 (EST) Authentication-Results: amity.mint.lgbt (amavisd-new); dkim=pass (2048-bit key) reason="pass (just generated, assumed good)" header.d=mint.lgbt DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=mint.lgbt; h= content-transfer-encoding:mime-version:references:in-reply-to :x-mailer:message-id:date:subject:to:from; s=dkim; t=1672525479; x=1673389480; bh=We5xjhGqrFdJQxR93Npt09VH/7a6fXPhQTRN9HYr93I=; b= pmdCBW1qD8IiuvgdY1PBmhzKdLSjGO5QQtaR0TyoCqs0d0GVhtVoRpjYT2k6QKW2 o3F5do13WffSfi5BiiiiXBqJPtX7Tk3BZ8EIgjcwJkXoOmuHqbMT2spmzimDLo6W RW4E/2hpfVjw+NzmFemtnZo5qtGmjKF9ZW6i61katqBQa+dU7rJimgrszcHZBQff Rmx7uAwsyIw8bBSaoj2AOe9pw+P6yBWQKe69gwOO8wHoKqzS1t4VsQJeLi9W/pvk sGBDAGKKb8DR59soyPP5TBh2/Ly0VC4ipbIgtwjkYUWJK0hVviYf6pHUE2OUylZ4 WHlpy8JIrwb5r6OoppC3Cw== X-Virus-Scanned: amavisd-new at amity.mint.lgbt Received: from amity.mint.lgbt ([127.0.0.1]) by amity.mint.lgbt (amity.mint.lgbt [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id Cc6TZqNivUqD for ; Sat, 31 Dec 2022 17:24:39 -0500 (EST) Received: from dorothy.. (unknown [190.196.92.66]) by amity.mint.lgbt (Postfix) with ESMTPSA id 4NkxWQ3LWTz1S56h; Sat, 31 Dec 2022 17:24:34 -0500 (EST) From: Lux Aliaga To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Alim Akhtar , Avri Altman , Bart Van Assche , Rob Herring , Krzysztof Kozlowski Cc: ~postmarketos/upstreaming@lists.sr.ht, martin.botka@somainline.org, marijn.suijten@somainline.org, Lux Aliaga , linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 1/6] dt-bindings: ufs: qcom: Add SM6125 compatible string Date: Sat, 31 Dec 2022 19:24:15 -0300 Message-Id: <20221231222420.75233-2-they@mint.lgbt> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221231222420.75233-1-they@mint.lgbt> References: <20221231222420.75233-1-they@mint.lgbt> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Document the compatible for UFS found on the SM6125. Signed-off-by: Lux Aliaga --- Documentation/devicetree/bindings/ufs/qcom,ufs.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml index b517d76215e3..42422f3471b3 100644 --- a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml +++ b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml @@ -29,6 +29,7 @@ properties: - qcom,sc8280xp-ufshc - qcom,sdm845-ufshc - qcom,sm6115-ufshc + - qcom,sm6125-ufshc - qcom,sm6350-ufshc - qcom,sm8150-ufshc - qcom,sm8250-ufshc @@ -185,6 +186,7 @@ allOf: contains: enum: - qcom,sm6115-ufshc + - qcom,sm6125-ufshc then: properties: clocks: From patchwork Sat Dec 31 22:24:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lux Aliaga X-Patchwork-Id: 638216 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B48AFC3DA7D for ; Sat, 31 Dec 2022 22:25:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235867AbiLaWZE (ORCPT ); Sat, 31 Dec 2022 17:25:04 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55500 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235856AbiLaWZA (ORCPT ); Sat, 31 Dec 2022 17:25:00 -0500 Received: from amity.mint.lgbt (vmi888983.contaboserver.net [149.102.157.145]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DFA7863AB for ; Sat, 31 Dec 2022 14:24:57 -0800 (PST) Received: from amity.mint.lgbt (mx.mint.lgbt [127.0.0.1]) by amity.mint.lgbt (Postfix) with ESMTP id 4NkxWr3xzGz1S5Dq for ; Sat, 31 Dec 2022 17:24:56 -0500 (EST) Authentication-Results: amity.mint.lgbt (amavisd-new); dkim=pass (2048-bit key) reason="pass (just generated, assumed good)" header.d=mint.lgbt DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=mint.lgbt; h= content-transfer-encoding:mime-version:references:in-reply-to :x-mailer:message-id:date:subject:to:from; s=dkim; t=1672525495; x=1673389496; bh=hPWCHZoK4EhXMeU+Z17CLrLgUjsvH7q+HvKSK/bO+Rk=; b= nHI49xvb9y1UWkr7cKoZ4Ub4JMf5qC/1DT2o9Mh0gS+fpcz1GR0NnJdTxeYP5ubm wJE/2ZLAeBpP312t4g8SQmQsPImlVnVvpLOTseZfd1dAQtOAvXoFObLCzn7QyTCP i4Ew45O+kGEZ1DG2Jb1o4tq5Gi7k1wtlc89mOy3gGrzp904etpyH2y/iH5zYKwLy BHsUy/RW0f66D5tiomUepPIa7xfXwo/JgWi2sqFIwaFPuOPefrHLvjEf0R6t5Zwe Bqukq3lbg71IHCNH/fZXhuGNH4JVS9I+Z17PQ3otXtcvwHiFSykQ69Dpk8Eec2um 5F3F+ZVYnwpIR100yAGYuw== X-Virus-Scanned: amavisd-new at amity.mint.lgbt Received: from amity.mint.lgbt ([127.0.0.1]) by amity.mint.lgbt (amity.mint.lgbt [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id j-Z5o5OZ9PHh for ; Sat, 31 Dec 2022 17:24:55 -0500 (EST) Received: from dorothy.. (unknown [190.196.92.66]) by amity.mint.lgbt (Postfix) with ESMTPSA id 4NkxWl2xfxz1S5F6; Sat, 31 Dec 2022 17:24:51 -0500 (EST) From: Lux Aliaga To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski Cc: ~postmarketos/upstreaming@lists.sr.ht, martin.botka@somainline.org, marijn.suijten@somainline.org, Lux Aliaga , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 4/6] arm64: dts: qcom: sm6125: Add UFS nodes Date: Sat, 31 Dec 2022 19:24:18 -0300 Message-Id: <20221231222420.75233-5-they@mint.lgbt> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221231222420.75233-1-they@mint.lgbt> References: <20221231222420.75233-1-they@mint.lgbt> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Adds a UFS host controller node and its corresponding PHY to the sm6125 platform. Signed-off-by: Lux Aliaga --- arch/arm64/boot/dts/qcom/sm6125.dtsi | 59 ++++++++++++++++++++++++++++ 1 file changed, 59 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi index df5453fcf2b9..9cb081332849 100644 --- a/arch/arm64/boot/dts/qcom/sm6125.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi @@ -511,6 +511,65 @@ sdhc_2: mmc@4784000 { status = "disabled"; }; + ufs_mem_hc: ufs@4804000 { + compatible = "qcom,sm6125-ufshc", "qcom,ufshc", "jedec,ufs-2.0"; + reg = <0x04804000 0x3000>, <0x04810000 0x8000>; + reg-names = "std", "ice"; + interrupts = ; + phys = <&ufs_mem_phy>; + phy-names = "ufsphy"; + lanes-per-direction = <1>; + #reset-cells = <1>; + resets = <&gcc GCC_UFS_PHY_BCR>; + reset-names = "rst"; + iommus = <&apps_smmu 0x200 0x0>; + + clock-names = "core_clk", + "bus_aggr_clk", + "iface_clk", + "core_clk_unipro", + "ref_clk", + "tx_lane0_sync_clk", + "rx_lane0_sync_clk", + "ice_core_clk"; + clocks = <&gcc GCC_UFS_PHY_AXI_CLK>, + <&gcc GCC_SYS_NOC_UFS_PHY_AXI_CLK>, + <&gcc GCC_UFS_PHY_AHB_CLK>, + <&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>, + <&rpmcc RPM_SMD_XO_CLK_SRC>, + <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, + <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, + <&gcc GCC_UFS_PHY_ICE_CORE_CLK>; + freq-table-hz = <50000000 240000000>, + <0 0>, + <0 0>, + <37500000 150000000>, + <0 0>, + <0 0>, + <0 0>, + <75000000 300000000>; + + non-removable; + status = "disabled"; + }; + + ufs_mem_phy: phy@4807000 { + compatible = "qcom,sm6125-qmp-ufs-phy"; + reg = <0x04807000 0x1c4>; + + clock-names = "ref", "ref_aux"; + clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>, <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; + + power-domains = <&gcc UFS_PHY_GDSC>; + + resets = <&ufs_mem_hc 0>; + reset-names = "ufsphy"; + + #phy-cells = <0>; + + status = "disabled"; + }; + gpi_dma0: dma-controller@4a00000 { compatible = "qcom,sm6125-gpi-dma", "qcom,sdm845-gpi-dma"; reg = <0x04a00000 0x60000>; From patchwork Sat Dec 31 22:24:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lux Aliaga X-Patchwork-Id: 638215 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 36371C3DA7A for ; Sat, 31 Dec 2022 22:25:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235958AbiLaWZc (ORCPT ); Sat, 31 Dec 2022 17:25:32 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55808 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235962AbiLaWZZ (ORCPT ); Sat, 31 Dec 2022 17:25:25 -0500 Received: from amity.mint.lgbt (vmi888983.contaboserver.net [149.102.157.145]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B4B276396 for ; Sat, 31 Dec 2022 14:25:09 -0800 (PST) Received: from amity.mint.lgbt (mx.mint.lgbt [127.0.0.1]) by amity.mint.lgbt (Postfix) with ESMTP id 4NkxX36yphz1S5Dq for ; Sat, 31 Dec 2022 17:25:07 -0500 (EST) Authentication-Results: amity.mint.lgbt (amavisd-new); dkim=pass (2048-bit key) reason="pass (just generated, assumed good)" header.d=mint.lgbt DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=mint.lgbt; h= content-transfer-encoding:mime-version:references:in-reply-to :x-mailer:message-id:date:subject:to:from; s=dkim; t=1672525506; x=1673389507; bh=FFiZGTOLqnc5O7NWNkxiJRm1CIiUGan+2JsCabL8LJo=; b= 2ep1rwRTsoHh1K9LpTYaKvPhE6VHd1GHQnn1BzqgGiRDwW9yq4MgKarQ8o21ba7m oi9zO3EYJr7FLH9gJDL2fnDGk40Vh84cyvtp+SUqGYyG+fZvFAk6SWxR9pmnQHjC x5JrIJ0rQ2g+bg5YJqJ89CiCKgN11fku0cdjC0NdAGfxSobM4rTZU5pm5Folm0KP PD/a0MIkZDOhcL7gzQfo25IG6vYyPJDZ6NHYt1bdzG0f6zx65/kijkmy6Z5Hii/M vAYB4UcqUuvlROJVKOg5AlbDVZVpadkOkevwSNHex9YlJmNJVUS4YzpQ/yodwcta KLPW8iAv1AIoULNyJ8cHpQ== X-Virus-Scanned: amavisd-new at amity.mint.lgbt Received: from amity.mint.lgbt ([127.0.0.1]) by amity.mint.lgbt (amity.mint.lgbt [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id cc-aqU0kHPuM for ; Sat, 31 Dec 2022 17:25:06 -0500 (EST) Received: from dorothy.. (unknown [190.196.92.66]) by amity.mint.lgbt (Postfix) with ESMTPSA id 4NkxWy077sz1S5Dr; Sat, 31 Dec 2022 17:25:01 -0500 (EST) From: Lux Aliaga To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Kees Cook , Tony Luck , "Guilherme G. Piccoli" Cc: ~postmarketos/upstreaming@lists.sr.ht, martin.botka@somainline.org, marijn.suijten@somainline.org, Lux Aliaga , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-hardening@vger.kernel.org Subject: [PATCH v5 6/6] arm64: dts: qcom: sm6125: Initial support for xiaomi-laurel-sprout Date: Sat, 31 Dec 2022 19:24:20 -0300 Message-Id: <20221231222420.75233-7-they@mint.lgbt> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221231222420.75233-1-they@mint.lgbt> References: <20221231222420.75233-1-they@mint.lgbt> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Adds support for the Xiaomi Mi A3 (xiaomi-laurel-sprout). Here's a summary on what's working. - dmesg output to bootloader preconfigured display - USB - UFS - SD card - SMD RPM regulators - Volume Up, Down and Power buttons - Thermistors Signed-off-by: Lux Aliaga --- arch/arm64/boot/dts/qcom/Makefile | 1 + .../dts/qcom/sm6125-xiaomi-laurel-sprout.dts | 413 ++++++++++++++++++ 2 files changed, 414 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/sm6125-xiaomi-laurel-sprout.dts diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index 3e79496292e7..2b2a0170db14 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -157,6 +157,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sdm850-lenovo-yoga-c630.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm850-samsung-w737.dtb dtb-$(CONFIG_ARCH_QCOM) += sm4250-oneplus-billie2.dtb dtb-$(CONFIG_ARCH_QCOM) += sm6125-sony-xperia-seine-pdx201.dtb +dtb-$(CONFIG_ARCH_QCOM) += sm6125-xiaomi-laurel-sprout.dtb dtb-$(CONFIG_ARCH_QCOM) += sm6350-sony-xperia-lena-pdx213.dtb dtb-$(CONFIG_ARCH_QCOM) += sm6375-sony-xperia-murray-pdx225.dtb dtb-$(CONFIG_ARCH_QCOM) += sm7225-fairphone-fp4.dtb diff --git a/arch/arm64/boot/dts/qcom/sm6125-xiaomi-laurel-sprout.dts b/arch/arm64/boot/dts/qcom/sm6125-xiaomi-laurel-sprout.dts new file mode 100644 index 000000000000..cc338c7ef358 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sm6125-xiaomi-laurel-sprout.dts @@ -0,0 +1,413 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2022, Lux Aliaga + */ + +/dts-v1/; + +#include +#include +#include +#include +#include "sm6125.dtsi" +#include "pm6125.dtsi" + +/ { + model = "Xiaomi Mi A3"; + compatible = "xiaomi,laurel-sprout", "qcom,sm6125"; + chassis-type = "handset"; + + /* required for bootloader to select correct board */ + qcom,msm-id = <394 0>; /* sm6125 v1 */ + qcom,board-id = <11 0>; + + chosen { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + framebuffer0: framebuffer@5c000000 { + compatible = "simple-framebuffer"; + reg = <0 0x5c000000 0 (1560 * 720 * 4)>; + width = <720>; + height = <1560>; + stride = <(720 * 4)>; + format = "a8r8g8b8"; + }; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + + debug_mem: debug@ffb00000 { + reg = <0x0 0xffb00000 0x0 0xc0000>; + no-map; + }; + + last_log_mem: lastlog@ffbc0000 { + reg = <0x0 0xffbc0000 0x0 0x80000>; + no-map; + }; + + pstore_mem: ramoops@ffc00000 { + compatible = "ramoops"; + reg = <0x0 0xffc40000 0x0 0xc0000>; + record-size = <0x1000>; + console-size = <0x40000>; + msg-size = <0x20000 0x20000>; + }; + + cmdline_mem: memory@ffd00000 { + reg = <0x0 0xffd40000 0x0 0x1000>; + no-map; + }; + }; + + extcon_usb: usb-id { + compatible = "linux,extcon-usb-gpio"; + id-gpio = <&tlmm 102 GPIO_ACTIVE_HIGH>; + }; + + gpio-keys { + status = "okay"; + compatible = "gpio-keys"; + autorepeat; + + key-vol-up { + label = "Volume Up"; + gpios = <&pm6125_gpio 5 GPIO_ACTIVE_LOW>; + linux,input-type = <1>; + linux,code = ; + gpio-key,wakeup; + debounce-interval = <15>; + }; + }; + + thermal-zones { + rf-pa0-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&pm6125_adc_tm 0>; + + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + + quiet-thermal { + polling-delay-passive = <0>; + polling-delay = <5000>; + thermal-sensors = <&pm6125_adc_tm 1>; + + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + + xo-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&pm6125_adc_tm 2>; + + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + }; +}; + +&hsusb_phy1 { + vdd-supply = <&vreg_l7a>; + vdda-pll-supply = <&vreg_l10a>; + vdda-phy-dpdm-supply = <&vreg_l15a>; + status = "okay"; +}; + +&pm6125_adc { + pinctrl-names = "default"; + pinctrl-0 = <&camera_flash_therm &emmc_ufs_therm>; + + rf-pa0-therm@4d { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + quiet-therm@4e { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + camera-flash-therm@52 { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + emmc-ufs-therm@54 { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; +}; + +&pm6125_adc_tm { + status = "okay"; + + rf-pa0-therm@0 { + reg = <0>; + io-channels = <&pm6125_adc ADC5_AMUX_THM1_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; + + quiet-therm@1 { + reg = <1>; + io-channels = <&pm6125_adc ADC5_AMUX_THM2_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; + + xo-therm@2 { + reg = <2>; + io-channels = <&pm6125_adc ADC5_XO_THERM_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; +}; + +&pm6125_gpio { + camera_flash_therm: camera-flash-therm-state { + pins = "gpio3"; + function = PMIC_GPIO_FUNC_NORMAL; + bias-high-impedance; + }; + + emmc_ufs_therm: emmc-ufs-therm-state { + pins = "gpio6"; + function = PMIC_GPIO_FUNC_NORMAL; + bias-high-impedance; + }; + + key_vol_up: key_vol_up { + pins = "gpio5"; + function = PMIC_GPIO_FUNC_NORMAL; + input-enable; + bias-pull-up; + }; +}; + +&pon_pwrkey { + status = "okay"; +}; + +&pon_resin { + status = "okay"; + linux,code = ; +}; + +&rpm_requests { + regulators-0 { + compatible = "qcom,rpm-pm6125-regulators"; + + vreg_s6a: s6 { + regulator-min-microvolt = <936000>; + regulator-max-microvolt = <1422000>; + }; + + vreg_l1a: l1 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1256000>; + }; + + vreg_l2a: l2 { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1056000>; + }; + + vreg_l3a: l3 { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1064000>; + }; + + vreg_l4a: l4 { + regulator-min-microvolt = <872000>; + regulator-max-microvolt = <976000>; + }; + + vreg_l5a: l5 { + regulator-min-microvolt = <1648000>; + regulator-max-microvolt = <2950000>; + }; + + vreg_l6a: l6 { + regulator-min-microvolt = <576000>; + regulator-max-microvolt = <656000>; + }; + + vreg_l7a: l7 { + regulator-min-microvolt = <872000>; + regulator-max-microvolt = <976000>; + }; + + vreg_l8a: l8 { + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <728000>; + }; + + vreg_l9a: l9 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1896000>; + }; + + vreg_l10a: l10 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1896000>; + }; + + vreg_l11a: l11 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1952000>; + }; + + vreg_l12a: l12 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1996000>; + }; + + vreg_l13a: l13 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1832000>; + }; + + vreg_l14a: l14 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1904000>; + }; + + vreg_l15a: l15 { + regulator-min-microvolt = <3104000>; + regulator-max-microvolt = <3232000>; + }; + + vreg_l16a: l16 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1904000>; + }; + + vreg_l17a: l17 { + regulator-min-microvolt = <1248000>; + regulator-max-microvolt = <1304000>; + }; + + vreg_l18a: l18 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1264000>; + }; + + vreg_l19a: l19 { + regulator-min-microvolt = <1648000>; + regulator-max-microvolt = <2952000>; + }; + + vreg_l20a: l20 { + regulator-min-microvolt = <1648000>; + regulator-max-microvolt = <2952000>; + }; + + vreg_l21a: l21 { + regulator-min-microvolt = <2600000>; + regulator-max-microvolt = <2856000>; + }; + + vreg_l22a: l22 { + regulator-min-microvolt = <2944000>; + regulator-max-microvolt = <2950000>; + regulator-allow-set-load; + }; + + vreg_l23a: l23 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3400000>; + }; + + vreg_l24a: l24 { + regulator-min-microvolt = <2944000>; + regulator-max-microvolt = <3304000>; + }; + }; +}; + +&sdc2_off_state { + sd-cd-pins { + pins = "gpio98"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; +}; + +&sdc2_on_state { + sd-cd-pins { + pins = "gpio98"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; +}; + +&sdhc_2 { + cd-gpios = <&tlmm 98 GPIO_ACTIVE_HIGH>; + vmmc-supply = <&vreg_l22a>; + vqmmc-supply = <&vreg_l5a>; + no-sdio; + no-mmc; + status = "okay"; +}; + +&tlmm { + gpio-reserved-ranges = <22 2>, <28 6>; +}; + +&ufs_mem_hc { + vcc-supply = <&vreg_l24a>; + vccq2-supply = <&vreg_l11a>; + vcc-max-microamp = <600000>; + vccq2-max-microamp = <600000>; + status = "okay"; +}; + +&ufs_mem_phy { + vdda-phy-supply = <&vreg_l4a>; + vdda-pll-supply = <&vreg_l10a>; + vdda-phy-max-microamp = <51400>; + vdda-pll-max-microamp = <14200>; + vddp-ref-clk-supply = <&vreg_l18a>; + status = "okay"; +}; + +&usb3 { + status = "okay"; +}; + +&usb3_dwc3 { + extcon = <&extcon_usb>; +};