From patchwork Wed Dec 28 13:32:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 637310 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E0CD3C53210 for ; Wed, 28 Dec 2022 13:32:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232788AbiL1Ncz (ORCPT ); Wed, 28 Dec 2022 08:32:55 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41890 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232918AbiL1Ncs (ORCPT ); Wed, 28 Dec 2022 08:32:48 -0500 Received: from mail-lf1-x12c.google.com (mail-lf1-x12c.google.com [IPv6:2a00:1450:4864:20::12c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A36BDF5A0 for ; Wed, 28 Dec 2022 05:32:47 -0800 (PST) Received: by mail-lf1-x12c.google.com with SMTP id m6so13249143lfj.11 for ; Wed, 28 Dec 2022 05:32:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ptwbzrH/mwy7A+21HlgWY+l3mHpSh6bnpDwYSONm/BE=; b=oUr2S0xtFZwVtqGzid+T/6zozCl/6aU0c0tHwjV4K/UH/29O27tPUeI68yHGAvDeqT ruyTtDwo0DBDNcgt1PFnWey7pfNxwMjoo6ZBavhCQQVernIXfSb3uOiv7M7PBjTLh4EZ BmV7+l0/9CzvxTNZpLJGnl4lICL3+frv0ai6qzgNAQLUkuSKKgflQ6L2H7tj9PiWu7IQ 5Xot4sCOpAyCXrGA6T6XaGD+AEdcNIMfkPJPBmZ/zBmIHiugo+ycapW8UprLFlzfN+Xe dqMgp5CnSN1R5fGBA2H9wQJv32JutqiFOwrfs1J9g6gq9BBCT+taid09tw4Hy+WUOE99 MU0w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ptwbzrH/mwy7A+21HlgWY+l3mHpSh6bnpDwYSONm/BE=; b=QNd8qXNxaXFC7HKD4s6irA9IVtTA2ocXHfKHukNXT3/wd+dc8Yg3Y85V5D5m4qzJWn T3sWPq6cP2/lJr8JvfGUODn90AQGQv86NEPazwqdUm7oJvIKgxmS1uLE58YdOx88jWWM K+zjXy6fGw0ljXHpHhTV1/E8ruU5Jk1hHBqE5HrCcwRtE+GQbQyo1yURr+XimCLaZJzX pl9HjRasfwMlR742AjtBEWYrkJ6zoT5fUk2K38fVlYmp+txPm0dhZjI/P44UwQFbMDt+ zJQzWhgplHHg0crVJBdOY+d92ZN6JkTBtkMRwir+gRA18tFsgwB8tiPKKIVGzK9gcy15 dxEg== X-Gm-Message-State: AFqh2kq9L0hPyNa8kBFfpCOnM2IWhH18rFZhyeGSdu3UUaMsDQp8wtN+ cwV9UtONEinJCiD2z4ijHbwUpQ== X-Google-Smtp-Source: AMrXdXsWqyinV9P7CjZOcND/sTJyeoYdBO53LGZl0vUAeUo/m2D4VaB63QJZyUXBn68GpNc8PQivKw== X-Received: by 2002:a05:6512:31d1:b0:4b5:7925:8707 with SMTP id j17-20020a05651231d100b004b579258707mr8653750lfe.26.1672234366060; Wed, 28 Dec 2022 05:32:46 -0800 (PST) Received: from eriador.lan (dzccz6yyyyyyyyyyybcwt-3.rev.dnainternet.fi. [2001:14ba:a085:4d00::8a5]) by smtp.gmail.com with ESMTPSA id d7-20020ac241c7000000b004a47e7b91c4sm2613876lfi.195.2022.12.28.05.32.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Dec 2022 05:32:45 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Stephen Boyd , Michael Turquette , Rob Herring , Krzysztof Kozlowski , Taniya Das Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 01/16] dt-bindings: clock: qcom,gcc-msm8998: drop core_bi_pll_test_se Date: Wed, 28 Dec 2022 15:32:28 +0200 Message-Id: <20221228133243.3052132-2-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221228133243.3052132-1-dmitry.baryshkov@linaro.org> References: <20221228133243.3052132-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The test clock apparently it's not used by anyone upstream. Remove it. Signed-off-by: Dmitry Baryshkov --- Documentation/devicetree/bindings/clock/qcom,gcc-msm8998.yaml | 4 ---- 1 file changed, 4 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8998.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8998.yaml index 2d5355cf9def..10a8ce6640a8 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8998.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8998.yaml @@ -25,7 +25,6 @@ properties: - description: Board XO source - description: Sleep clock source - description: Audio reference clock (Optional clock) - - description: PLL test clock source (Optional clock) minItems: 2 clock-names: @@ -33,7 +32,6 @@ properties: - const: xo - const: sleep_clk - const: aud_ref_clk # Optional clock - - const: core_bi_pll_test_se # Optional clock minItems: 2 required: @@ -57,11 +55,9 @@ examples: reg = <0x00100000 0xb0000>; clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, <&sleep>, - <0>, <0>; clock-names = "xo", "sleep_clk", "aud_ref_clk", - "core_bi_pll_test_se"; }; ... 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[2001:14ba:a085:4d00::8a5]) by smtp.gmail.com with ESMTPSA id d7-20020ac241c7000000b004a47e7b91c4sm2613876lfi.195.2022.12.28.05.32.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Dec 2022 05:32:47 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Stephen Boyd , Michael Turquette , Rob Herring , Krzysztof Kozlowski , Taniya Das Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 03/16] dt-bindings: clock: qcom,gcc-sdx65: drop core_bi_pll_test_se Date: Wed, 28 Dec 2022 15:32:30 +0200 Message-Id: <20221228133243.3052132-4-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221228133243.3052132-1-dmitry.baryshkov@linaro.org> References: <20221228133243.3052132-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The test clock apparently it's not used by anyone upstream. Remove it. Signed-off-by: Dmitry Baryshkov --- .../devicetree/bindings/clock/qcom,gcc-sdx65.yaml | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sdx65.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sdx65.yaml index ba62baab916c..523e18d7f150 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-sdx65.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sdx65.yaml @@ -26,8 +26,6 @@ properties: - description: Sleep clock source - description: PCIE Pipe clock source - description: USB3 phy wrapper pipe clock source - - description: PLL test clock source (Optional clock) - minItems: 5 clock-names: items: @@ -36,8 +34,6 @@ properties: - const: sleep_clk - const: pcie_pipe_clk - const: usb3_phy_wrapper_gcc_usb30_pipe_clk - - const: core_bi_pll_test_se # Optional clock - minItems: 5 required: - compatible @@ -56,9 +52,9 @@ examples: compatible = "qcom,gcc-sdx65"; reg = <0x100000 0x1f7400>; clocks = <&rpmhcc RPMH_CXO_CLK>, <&rpmhcc RPMH_CXO_CLK_A>, <&sleep_clk>, - <&pcie_pipe_clk>, <&usb3_phy_wrapper_gcc_usb30_pipe_clk>, <&pll_test_clk>; + <&pcie_pipe_clk>, <&usb3_phy_wrapper_gcc_usb30_pipe_clk>; clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk", - "pcie_pipe_clk", "usb3_phy_wrapper_gcc_usb30_pipe_clk", "core_bi_pll_test_se"; + "pcie_pipe_clk", "usb3_phy_wrapper_gcc_usb30_pipe_clk"; #clock-cells = <1>; #reset-cells = <1>; #power-domain-cells = <1>; From patchwork Wed Dec 28 13:32:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 637308 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 89807C54EF0 for ; Wed, 28 Dec 2022 13:33:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232898AbiL1Nc7 (ORCPT ); Wed, 28 Dec 2022 08:32:59 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41936 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232946AbiL1Ncv (ORCPT ); Wed, 28 Dec 2022 08:32:51 -0500 Received: from mail-lf1-x134.google.com (mail-lf1-x134.google.com [IPv6:2a00:1450:4864:20::134]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AD283FCCB for ; Wed, 28 Dec 2022 05:32:50 -0800 (PST) Received: by mail-lf1-x134.google.com with SMTP id j17so14130239lfr.3 for ; Wed, 28 Dec 2022 05:32:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=x9geNYllAFv/EDrrrYZhMPV0udfvXOAUMaZPXHOy8Y8=; b=d2NtHDjcKltV4Etqm3awnf8GCdJCroJbHpudoeaHKTQoi5vIBKNxzB4ZgmxmOeI19Q RzZ1LyGFiiIbLFTT6sEYaza4+vx+VAPCGQKvZ98xQIKj6cV3BKAb9UHs5f6lqW3JwURD mnNhCuD3FancjpJofSPHJIv95G15r23V2jk5lZYNGkw+mi2ZONW3n3EF8U0g/wv8PQFS ngEN5jwl1fI5rj5OzSFB+Q7RoyRm6cOqv+lU94M+hFfRIRr9XwXN+JU7GU3cM+VtQsOt pogLyrSZtd/FmkTG2nlLzFuIc0dpeo0SkZ1KPk42wK6o7IQMOgZjt3NbCiI8IaDDqFDn O4xQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=x9geNYllAFv/EDrrrYZhMPV0udfvXOAUMaZPXHOy8Y8=; b=wYeTqpUrEwsdSDRDHEcD5N17zTBDYlSG8E3k+CMiuEVQCNILiYslLopiDyMBtq0rSv LVUhFcgKW0Xoi0gqAGADNDyXluEfUtvALO2gmhk7He3nmgPjpupkyiLIrO671HfFS5Jz FraWe0Mh+QB8xOO06rFyWX6xzJpU9JSi8wuAYRsp4i6AlI8+YkZZqd866K6QtWQCauvA v77ZIkCXuWntj54eooqKGqsqD2st1TfnWDOG6N9QK/ETXYITwXXEm5Ew425gNa4Nc9Zr DWHBNXX+8FC27AYQFySVQtuzQnvxcSxIPVPZWtAMNtZf65gFgm1cuMbYGSKGGG8DD5BE eJVA== X-Gm-Message-State: AFqh2kr6IhOhGXCw6yM7Byuok4ks+cUW2U909F9Tk9OCE3oQoyrB82mG Jqz/UKJsXN4mSrnae29+yC+fk5ZG6LqouSr4fIo= X-Google-Smtp-Source: AMrXdXvBn9fle1O57vI9H4eLfrUil8jj8nnXZImnHUpW9eQnaR9IbC2kzCdUuVPHcYA2Zj+1QgHBtg== X-Received: by 2002:a05:6512:2506:b0:4a7:7d62:2808 with SMTP id be6-20020a056512250600b004a77d622808mr7327571lfb.27.1672234370278; Wed, 28 Dec 2022 05:32:50 -0800 (PST) Received: from eriador.lan (dzccz6yyyyyyyyyyybcwt-3.rev.dnainternet.fi. [2001:14ba:a085:4d00::8a5]) by smtp.gmail.com with ESMTPSA id d7-20020ac241c7000000b004a47e7b91c4sm2613876lfi.195.2022.12.28.05.32.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Dec 2022 05:32:49 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Stephen Boyd , Michael Turquette , Rob Herring , Krzysztof Kozlowski , Taniya Das Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 06/16] dt-bindings: clock: qcom: gcc-sm8350: drop test clock Date: Wed, 28 Dec 2022 15:32:33 +0200 Message-Id: <20221228133243.3052132-7-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221228133243.3052132-1-dmitry.baryshkov@linaro.org> References: <20221228133243.3052132-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The test clock apparently it's not used by anyone upstream. Remove it. Signed-off-by: Dmitry Baryshkov --- include/dt-bindings/clock/qcom,gcc-sm8350.h | 1 - 1 file changed, 1 deletion(-) diff --git a/include/dt-bindings/clock/qcom,gcc-sm8350.h b/include/dt-bindings/clock/qcom,gcc-sm8350.h index f6be3da5f781..529c1b8b0417 100644 --- a/include/dt-bindings/clock/qcom,gcc-sm8350.h +++ b/include/dt-bindings/clock/qcom,gcc-sm8350.h @@ -8,7 +8,6 @@ #define _DT_BINDINGS_CLK_QCOM_GCC_SM8350_H /* GCC HW clocks */ -#define CORE_BI_PLL_TEST_SE 0 #define PCIE_0_PIPE_CLK 1 #define PCIE_1_PIPE_CLK 2 #define UFS_CARD_RX_SYMBOL_0_CLK 3 From patchwork Wed Dec 28 13:32:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 637307 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7A3D0C677F0 for ; Wed, 28 Dec 2022 13:33:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232978AbiL1Nd0 (ORCPT ); Wed, 28 Dec 2022 08:33:26 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42024 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232972AbiL1Ncy (ORCPT ); Wed, 28 Dec 2022 08:32:54 -0500 Received: from mail-lf1-x131.google.com (mail-lf1-x131.google.com [IPv6:2a00:1450:4864:20::131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 96B5BFAED for ; Wed, 28 Dec 2022 05:32:53 -0800 (PST) Received: by mail-lf1-x131.google.com with SMTP id 1so23631660lfz.4 for ; Wed, 28 Dec 2022 05:32:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=5ijMDoR4AdR4NsVCY72cZZHnUNmH0Cvvqw6DU7+bt38=; b=pCaBh0b1aFdQ/bPydctI6EILckDsFMQksLf/vXZZ6peEHJKLY3TBppMvQXkC3z7tE2 PVzYczJSqJ3JVOTJh1TUsrqwCecaBU/xhOIw0EPNlTeqO6xXpAUYqfEPrLWcl6R4CBJU e5le/x7g0WLp8zHnoQ9ZTyuLJrOFOpYG9kuEOBlVsCoWEX469yi4Kuhn+7sLU54dqhP5 EIGwiy4SThZmP89BrmE2TqRdGpH/BSk06rgBpZzOXMXleYPfdpaMxBvMivp5M/CmvKU9 G15Y6Xc2xLAI0MgwErLeRgHtq2K7o99EyIeVL3FJ1v1FMUEK3ciIwZ4OqNpAgzrIjUPM N5fA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=5ijMDoR4AdR4NsVCY72cZZHnUNmH0Cvvqw6DU7+bt38=; b=Jt+gRJPN9hu+gpmpVvprmSWYd6T8JoxOK6jx9qNvkvzIl/CNz00nxeN22KZyKrUyQ7 HYNGoTnGqca4UgoAkbafXRBlkieIbw+F86xWn1wmRszriM/DNe5i2v9S+goB3FvTS+uZ Y6BM6JJLR7Swna3ZHw97zhp3zeliXq6wAscmtC3DambAIJvTMWQRTDC6UYU852yrcP3q 1uOGObIVgGr4izXByetFwAGXZrOl3VFPxprmFfu5l9xrMqLJBw2bmb4sMMcLcpY1xLcd hPsNx3oV9JkNY3OVI/XVZxrwHuoaoG+eIBCK/Bg2yGTQxkTNu/mj2QrU/ZTeQGcsKK/p wgGQ== X-Gm-Message-State: AFqh2krjN20D0k8u8cukvs3aBkpLNtULdKN1avGMX3S/z6hG0h2eB+Qj rTP1tU1kywaQM5Dvpy9NYnHSSA== X-Google-Smtp-Source: AMrXdXvIl6PsuVcVaJ8r4yPl1Pvd9+VXLBwN0Juia0Gq0Xmq4oRKcSH5/+ViWBpYppCuY1S/1SkNHQ== X-Received: by 2002:a05:6512:acd:b0:4b5:a206:30ee with SMTP id n13-20020a0565120acd00b004b5a20630eemr9900805lfu.65.1672234372014; Wed, 28 Dec 2022 05:32:52 -0800 (PST) Received: from eriador.lan (dzccz6yyyyyyyyyyybcwt-3.rev.dnainternet.fi. [2001:14ba:a085:4d00::8a5]) by smtp.gmail.com with ESMTPSA id d7-20020ac241c7000000b004a47e7b91c4sm2613876lfi.195.2022.12.28.05.32.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Dec 2022 05:32:51 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Stephen Boyd , Michael Turquette , Rob Herring , Krzysztof Kozlowski , Taniya Das Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 08/16] clk: qcom: dispcc-qcm2290: get rid of test clock Date: Wed, 28 Dec 2022 15:32:35 +0200 Message-Id: <20221228133243.3052132-9-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221228133243.3052132-1-dmitry.baryshkov@linaro.org> References: <20221228133243.3052132-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The test clock apparently it's not used by anyone upstream. Remove it. Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/dispcc-qcm2290.c | 6 ------ 1 file changed, 6 deletions(-) diff --git a/drivers/clk/qcom/dispcc-qcm2290.c b/drivers/clk/qcom/dispcc-qcm2290.c index 96b149365912..2ebd9a02b895 100644 --- a/drivers/clk/qcom/dispcc-qcm2290.c +++ b/drivers/clk/qcom/dispcc-qcm2290.c @@ -71,7 +71,6 @@ static const struct parent_map disp_cc_parent_map_0[] = { static const struct clk_parent_data disp_cc_parent_data_0[] = { { .fw_name = "bi_tcxo" }, { .fw_name = "dsi0_phy_pll_out_byteclk" }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct parent_map disp_cc_parent_map_1[] = { @@ -80,7 +79,6 @@ static const struct parent_map disp_cc_parent_map_1[] = { static const struct clk_parent_data disp_cc_parent_data_1[] = { { .fw_name = "bi_tcxo" }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct parent_map disp_cc_parent_map_2[] = { @@ -91,7 +89,6 @@ static const struct parent_map disp_cc_parent_map_2[] = { static const struct clk_parent_data disp_cc_parent_data_2[] = { { .fw_name = "bi_tcxo_ao" }, { .fw_name = "gcc_disp_gpll0_div_clk_src" }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct parent_map disp_cc_parent_map_3[] = { @@ -104,7 +101,6 @@ static const struct clk_parent_data disp_cc_parent_data_3[] = { { .fw_name = "bi_tcxo" }, { .hw = &disp_cc_pll0.clkr.hw }, { .fw_name = "gcc_disp_gpll0_clk_src" }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct parent_map disp_cc_parent_map_4[] = { @@ -117,7 +113,6 @@ static const struct clk_parent_data disp_cc_parent_data_4[] = { { .fw_name = "bi_tcxo" }, { .fw_name = "dsi0_phy_pll_out_dsiclk" }, { .fw_name = "dsi1_phy_pll_out_dsiclk" }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct parent_map disp_cc_parent_map_5[] = { @@ -126,7 +121,6 @@ static const struct parent_map disp_cc_parent_map_5[] = { static const struct clk_parent_data disp_cc_parent_data_5[] = { { .fw_name = "sleep_clk" }, - { .fw_name = "core_bi_pll_test_se" }, }; static struct clk_rcg2 disp_cc_mdss_byte0_clk_src = { From patchwork Wed Dec 28 13:32:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 637306 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3E377C678D7 for ; Wed, 28 Dec 2022 13:33:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232770AbiL1Nd1 (ORCPT ); Wed, 28 Dec 2022 08:33:27 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41896 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232747AbiL1Ncz (ORCPT ); Wed, 28 Dec 2022 08:32:55 -0500 Received: from mail-lf1-x135.google.com (mail-lf1-x135.google.com [IPv6:2a00:1450:4864:20::135]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F1BB1FD0E for ; Wed, 28 Dec 2022 05:32:53 -0800 (PST) Received: by mail-lf1-x135.google.com with SMTP id bq39so15841476lfb.0 for ; Wed, 28 Dec 2022 05:32:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=RdrSP/q0OgBKvgM/UC7meyzdpow2K93QbfzvK24ZKa0=; b=PomBJ/kXP2fF8ehcevFRPUwhS20auX9Q1udBngtr3SRDktuOwmILda/u1+BFnIHMuE mUeCkEAd5Nv4m4bqI2wRZgx/MwAsUan6oC+XorqpYPyTMOesEhZO4UkEO+uE5JZqfBTN ChUq+unq8n9+C+PD5Hr3MbxcETYGS5Gi+ecplCUWOjleIDMTy5sYxGG4YeMtaGiX0Qik X3PTEJM3X2GAbm77LoULvwMMFyS8Ffgub+0aaw0UzRhF8gKi+koPz0/p7ISXRXoyiare 3Q+AGv/0dwBk2sgr+nYw3tsZDF17cSsjSmxoWX7ijaaoWSgOIJ3Ib1iOl2gg4nyHWcH0 SpZQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=RdrSP/q0OgBKvgM/UC7meyzdpow2K93QbfzvK24ZKa0=; b=sg5UN0txfjc6VWYN4Kuq14s3f76BanlXPtiLSAbGbgwA6R5LUeMoS9eMSNY+u3RZkh 0Xf9CvfRcboED4PnUX7gFY41wKh/0Kep7qa0Xrw4IvqOsPPOWHwbo19q9DYvH9g7NaxC T+M7PWHU1897DynM4D3mBUbadsWMk7T3HwFl1rkeywcsfQR82xEskz6BeyDEtobuoX9d LzkWSGUtOTt+n+IJjRCLs6ua9HTouA8Ly8NUKKoVKdGs4xaiWuZEQ0Trda3b2OpvSHl4 afoGGWJSseQtcpv8R6T83ccYaAgulSVwWP3S++p4Ob+3Wta5Y/QoxwjNzqmAHXD3O+nX 8q/w== X-Gm-Message-State: AFqh2krCT1fInVQlq3YY/ShJCY8cUT0ZKeMLYfbyQJijUjnOc//3hOwp ywmsJqIUn7DV5RMYw9hfo/88SQ== X-Google-Smtp-Source: AMrXdXuGa68Gf6qxl03g28xXpWaaMOjMPv3LIg5Wx9wNMYuN5KiTYz0NoZ11HxczgGhuFLqVALBFJA== X-Received: by 2002:ac2:4f0c:0:b0:4b5:5f2e:3cc6 with SMTP id k12-20020ac24f0c000000b004b55f2e3cc6mr6867337lfr.47.1672234373548; Wed, 28 Dec 2022 05:32:53 -0800 (PST) Received: from eriador.lan (dzccz6yyyyyyyyyyybcwt-3.rev.dnainternet.fi. [2001:14ba:a085:4d00::8a5]) by smtp.gmail.com with ESMTPSA id d7-20020ac241c7000000b004a47e7b91c4sm2613876lfi.195.2022.12.28.05.32.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Dec 2022 05:32:53 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Stephen Boyd , Michael Turquette , Rob Herring , Krzysztof Kozlowski , Taniya Das Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 10/16] clk: qcom: gcc-sc7180: get rid of test clock Date: Wed, 28 Dec 2022 15:32:37 +0200 Message-Id: <20221228133243.3052132-11-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221228133243.3052132-1-dmitry.baryshkov@linaro.org> References: <20221228133243.3052132-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The test clock apparently it's not used by anyone upstream. Remove it. Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/gcc-sc7180.c | 16 ---------------- 1 file changed, 16 deletions(-) diff --git a/drivers/clk/qcom/gcc-sc7180.c b/drivers/clk/qcom/gcc-sc7180.c index 2d3980251e78..105c4762ca84 100644 --- a/drivers/clk/qcom/gcc-sc7180.c +++ b/drivers/clk/qcom/gcc-sc7180.c @@ -23,7 +23,6 @@ enum { P_BI_TCXO, - P_CORE_BI_PLL_TEST_SE, P_GPLL0_OUT_EVEN, P_GPLL0_OUT_MAIN, P_GPLL1_OUT_MAIN, @@ -162,21 +161,18 @@ static const struct parent_map gcc_parent_map_0[] = { { P_BI_TCXO, 0 }, { P_GPLL0_OUT_MAIN, 1 }, { P_GPLL0_OUT_EVEN, 6 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data gcc_parent_data_0[] = { { .fw_name = "bi_tcxo", .name = "bi_tcxo" }, { .hw = &gpll0.clkr.hw }, { .hw = &gpll0_out_even.clkr.hw }, - { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; static const struct clk_parent_data gcc_parent_data_0_ao[] = { { .fw_name = "bi_tcxo_ao", .name = "bi_tcxo_ao" }, { .hw = &gpll0.clkr.hw }, { .hw = &gpll0_out_even.clkr.hw }, - { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; static const struct parent_map gcc_parent_map_1[] = { @@ -184,7 +180,6 @@ static const struct parent_map gcc_parent_map_1[] = { { P_GPLL0_OUT_MAIN, 1 }, { P_GPLL6_OUT_MAIN, 2 }, { P_GPLL0_OUT_EVEN, 6 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data gcc_parent_data_1[] = { @@ -192,7 +187,6 @@ static const struct clk_parent_data gcc_parent_data_1[] = { { .hw = &gpll0.clkr.hw }, { .hw = &gpll6.clkr.hw }, { .hw = &gpll0_out_even.clkr.hw }, - { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; static const struct parent_map gcc_parent_map_2[] = { @@ -201,7 +195,6 @@ static const struct parent_map gcc_parent_map_2[] = { { P_GPLL1_OUT_MAIN, 4 }, { P_GPLL4_OUT_MAIN, 5 }, { P_GPLL0_OUT_EVEN, 6 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data gcc_parent_data_2[] = { @@ -210,19 +203,16 @@ static const struct clk_parent_data gcc_parent_data_2[] = { { .hw = &gpll1.clkr.hw }, { .hw = &gpll4.clkr.hw }, { .hw = &gpll0_out_even.clkr.hw }, - { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; static const struct parent_map gcc_parent_map_3[] = { { P_BI_TCXO, 0 }, { P_GPLL0_OUT_MAIN, 1 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data gcc_parent_data_3[] = { { .fw_name = "bi_tcxo", .name = "bi_tcxo" }, { .hw = &gpll0.clkr.hw }, - { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; static const struct parent_map gcc_parent_map_4[] = { @@ -230,7 +220,6 @@ static const struct parent_map gcc_parent_map_4[] = { { P_GPLL0_OUT_MAIN, 1 }, { P_SLEEP_CLK, 5 }, { P_GPLL0_OUT_EVEN, 6 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data gcc_parent_data_4[] = { @@ -238,7 +227,6 @@ static const struct clk_parent_data gcc_parent_data_4[] = { { .hw = &gpll0.clkr.hw }, { .fw_name = "sleep_clk", .name = "sleep_clk" }, { .hw = &gpll0_out_even.clkr.hw }, - { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; static const struct parent_map gcc_parent_map_5[] = { @@ -246,7 +234,6 @@ static const struct parent_map gcc_parent_map_5[] = { { P_GPLL0_OUT_MAIN, 1 }, { P_GPLL7_OUT_MAIN, 3 }, { P_GPLL0_OUT_EVEN, 6 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data gcc_parent_data_5[] = { @@ -254,21 +241,18 @@ static const struct clk_parent_data gcc_parent_data_5[] = { { .hw = &gpll0.clkr.hw }, { .hw = &gpll7.clkr.hw }, { .hw = &gpll0_out_even.clkr.hw }, - { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; static const struct parent_map gcc_parent_map_6[] = { { P_BI_TCXO, 0 }, { P_GPLL0_OUT_MAIN, 1 }, { P_SLEEP_CLK, 5 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data gcc_parent_data_6[] = { { .fw_name = "bi_tcxo", .name = "bi_tcxo" }, { .hw = &gpll0.clkr.hw }, { .fw_name = "sleep_clk", .name = "sleep_clk" }, - { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; static const struct freq_tbl ftbl_gcc_cpuss_ahb_clk_src[] = { From patchwork Wed Dec 28 13:32:38 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 637304 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1923EC678DD for ; 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[2001:14ba:a085:4d00::8a5]) by smtp.gmail.com with ESMTPSA id d7-20020ac241c7000000b004a47e7b91c4sm2613876lfi.195.2022.12.28.05.32.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Dec 2022 05:32:53 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Stephen Boyd , Michael Turquette , Rob Herring , Krzysztof Kozlowski , Taniya Das Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 11/16] clk: qcom: gcc-sdx55: use ARRAY_SIZE instead of specifying num_parents Date: Wed, 28 Dec 2022 15:32:38 +0200 Message-Id: <20221228133243.3052132-12-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221228133243.3052132-1-dmitry.baryshkov@linaro.org> References: <20221228133243.3052132-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Use ARRAY_SIZE() instead of manually specifying num_parents. This makes adding/removing entries to/from parent_data/names/hws easy and errorproof. Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/gcc-sdx55.c | 52 ++++++++++++++++++------------------ 1 file changed, 26 insertions(+), 26 deletions(-) diff --git a/drivers/clk/qcom/gcc-sdx55.c b/drivers/clk/qcom/gcc-sdx55.c index 4fca19006a77..758b295e1bfa 100644 --- a/drivers/clk/qcom/gcc-sdx55.c +++ b/drivers/clk/qcom/gcc-sdx55.c @@ -232,7 +232,7 @@ static struct clk_rcg2 gcc_blsp1_qup1_i2c_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup1_i2c_apps_clk_src", .parent_data = gcc_parents_0, - .num_parents = 4, + .num_parents = ARRAY_SIZE(gcc_parents_0), .ops = &clk_rcg2_ops, }, }; @@ -258,7 +258,7 @@ static struct clk_rcg2 gcc_blsp1_qup1_spi_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup1_spi_apps_clk_src", .parent_data = gcc_parents_0, - .num_parents = 4, + .num_parents = ARRAY_SIZE(gcc_parents_0), .ops = &clk_rcg2_ops, }, }; @@ -272,7 +272,7 @@ static struct clk_rcg2 gcc_blsp1_qup2_i2c_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup2_i2c_apps_clk_src", .parent_data = gcc_parents_0, - .num_parents = 4, + .num_parents = ARRAY_SIZE(gcc_parents_0), .ops = &clk_rcg2_ops, }, }; @@ -286,7 +286,7 @@ static struct clk_rcg2 gcc_blsp1_qup2_spi_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup2_spi_apps_clk_src", .parent_data = gcc_parents_0, - .num_parents = 4, + .num_parents = ARRAY_SIZE(gcc_parents_0), .ops = &clk_rcg2_ops, }, }; @@ -300,7 +300,7 @@ static struct clk_rcg2 gcc_blsp1_qup3_i2c_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup3_i2c_apps_clk_src", .parent_data = gcc_parents_0, - .num_parents = 4, + .num_parents = ARRAY_SIZE(gcc_parents_0), .ops = &clk_rcg2_ops, }, }; @@ -314,7 +314,7 @@ static struct clk_rcg2 gcc_blsp1_qup3_spi_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup3_spi_apps_clk_src", .parent_data = gcc_parents_0, - .num_parents = 4, + .num_parents = ARRAY_SIZE(gcc_parents_0), .ops = &clk_rcg2_ops, }, }; @@ -328,7 +328,7 @@ static struct clk_rcg2 gcc_blsp1_qup4_i2c_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup4_i2c_apps_clk_src", .parent_data = gcc_parents_0, - .num_parents = 4, + .num_parents = ARRAY_SIZE(gcc_parents_0), .ops = &clk_rcg2_ops, }, }; @@ -342,7 +342,7 @@ static struct clk_rcg2 gcc_blsp1_qup4_spi_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup4_spi_apps_clk_src", .parent_data = gcc_parents_0, - .num_parents = 4, + .num_parents = ARRAY_SIZE(gcc_parents_0), .ops = &clk_rcg2_ops, }, }; @@ -386,7 +386,7 @@ static struct clk_rcg2 gcc_blsp1_uart1_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_uart1_apps_clk_src", .parent_data = gcc_parents_0, - .num_parents = 4, + .num_parents = ARRAY_SIZE(gcc_parents_0), .ops = &clk_rcg2_ops, }, }; @@ -400,7 +400,7 @@ static struct clk_rcg2 gcc_blsp1_uart2_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_uart2_apps_clk_src", .parent_data = gcc_parents_0, - .num_parents = 4, + .num_parents = ARRAY_SIZE(gcc_parents_0), .ops = &clk_rcg2_ops, }, }; @@ -414,7 +414,7 @@ static struct clk_rcg2 gcc_blsp1_uart3_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_uart3_apps_clk_src", .parent_data = gcc_parents_0, - .num_parents = 4, + .num_parents = ARRAY_SIZE(gcc_parents_0), .ops = &clk_rcg2_ops, }, }; @@ -428,7 +428,7 @@ static struct clk_rcg2 gcc_blsp1_uart4_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_uart4_apps_clk_src", .parent_data = gcc_parents_0, - .num_parents = 4, + .num_parents = ARRAY_SIZE(gcc_parents_0), .ops = &clk_rcg2_ops, }, }; @@ -450,7 +450,7 @@ static struct clk_rcg2 gcc_cpuss_ahb_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_cpuss_ahb_clk_src", .parent_data = gcc_parents_0_ao, - .num_parents = 4, + .num_parents = ARRAY_SIZE(gcc_parents_0_ao), .ops = &clk_rcg2_ops, }, }; @@ -469,7 +469,7 @@ static struct clk_rcg2 gcc_cpuss_rbcpr_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_cpuss_rbcpr_clk_src", .parent_data = gcc_parents_0_ao, - .num_parents = 4, + .num_parents = ARRAY_SIZE(gcc_parents_0_ao), .ops = &clk_rcg2_ops, }, }; @@ -493,7 +493,7 @@ static struct clk_rcg2 gcc_emac_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_emac_clk_src", .parent_data = gcc_parents_5, - .num_parents = 5, + .num_parents = ARRAY_SIZE(gcc_parents_5), .ops = &clk_rcg2_ops, }, }; @@ -514,7 +514,7 @@ static struct clk_rcg2 gcc_emac_ptp_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_emac_ptp_clk_src", .parent_data = gcc_parents_2, - .num_parents = 6, + .num_parents = ARRAY_SIZE(gcc_parents_2), .ops = &clk_rcg2_ops, }, }; @@ -537,7 +537,7 @@ static struct clk_rcg2 gcc_gp1_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_gp1_clk_src", .parent_data = gcc_parents_3, - .num_parents = 5, + .num_parents = ARRAY_SIZE(gcc_parents_3), .ops = &clk_rcg2_ops, }, }; @@ -551,7 +551,7 @@ static struct clk_rcg2 gcc_gp2_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_gp2_clk_src", .parent_data = gcc_parents_3, - .num_parents = 5, + .num_parents = ARRAY_SIZE(gcc_parents_3), .ops = &clk_rcg2_ops, }, }; @@ -565,7 +565,7 @@ static struct clk_rcg2 gcc_gp3_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_gp3_clk_src", .parent_data = gcc_parents_3, - .num_parents = 5, + .num_parents = ARRAY_SIZE(gcc_parents_3), .ops = &clk_rcg2_ops, }, }; @@ -579,7 +579,7 @@ static struct clk_rcg2 gcc_pcie_aux_phy_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_pcie_aux_phy_clk_src", .parent_data = gcc_parents_4, - .num_parents = 3, + .num_parents = ARRAY_SIZE(gcc_parents_4), .ops = &clk_rcg2_ops, }, }; @@ -598,7 +598,7 @@ static struct clk_rcg2 gcc_pcie_rchng_phy_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_pcie_rchng_phy_clk_src", .parent_data = gcc_parents_3, - .num_parents = 5, + .num_parents = ARRAY_SIZE(gcc_parents_3), .ops = &clk_rcg2_ops, }, }; @@ -619,7 +619,7 @@ static struct clk_rcg2 gcc_pdm2_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_pdm2_clk_src", .parent_data = gcc_parents_0, - .num_parents = 4, + .num_parents = ARRAY_SIZE(gcc_parents_0), .ops = &clk_rcg2_ops, }, }; @@ -633,7 +633,7 @@ static struct clk_rcg2 gcc_sdcc1_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_sdcc1_apps_clk_src", .parent_data = gcc_parents_0, - .num_parents = 4, + .num_parents = ARRAY_SIZE(gcc_parents_0), .ops = &clk_rcg2_ops, }, }; @@ -652,7 +652,7 @@ static struct clk_rcg2 gcc_usb30_master_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_usb30_master_clk_src", .parent_data = gcc_parents_0, - .num_parents = 4, + .num_parents = ARRAY_SIZE(gcc_parents_0), .ops = &clk_rcg2_ops, }, }; @@ -671,7 +671,7 @@ static struct clk_rcg2 gcc_usb30_mock_utmi_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_usb30_mock_utmi_clk_src", .parent_data = gcc_parents_0, - .num_parents = 4, + .num_parents = ARRAY_SIZE(gcc_parents_0), .ops = &clk_rcg2_ops, }, }; @@ -691,7 +691,7 @@ static struct clk_rcg2 gcc_usb3_phy_aux_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_usb3_phy_aux_clk_src", .parent_data = gcc_parents_4, - .num_parents = 3, + .num_parents = ARRAY_SIZE(gcc_parents_4), .ops = &clk_rcg2_ops, }, }; From patchwork Wed Dec 28 13:32:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 637305 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6267EC7112B for ; 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[2001:14ba:a085:4d00::8a5]) by smtp.gmail.com with ESMTPSA id d7-20020ac241c7000000b004a47e7b91c4sm2613876lfi.195.2022.12.28.05.32.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Dec 2022 05:32:55 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Stephen Boyd , Michael Turquette , Rob Herring , Krzysztof Kozlowski , Taniya Das Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 13/16] clk: qcom: gcc-sm8150: get rid of test clock Date: Wed, 28 Dec 2022 15:32:40 +0200 Message-Id: <20221228133243.3052132-14-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221228133243.3052132-1-dmitry.baryshkov@linaro.org> References: <20221228133243.3052132-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The test clock apparently it's not used by anyone upstream. Remove it. Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/gcc-sm8150.c | 17 ----------------- 1 file changed, 17 deletions(-) diff --git a/drivers/clk/qcom/gcc-sm8150.c b/drivers/clk/qcom/gcc-sm8150.c index 09cf827addab..70b067f3618c 100644 --- a/drivers/clk/qcom/gcc-sm8150.c +++ b/drivers/clk/qcom/gcc-sm8150.c @@ -26,7 +26,6 @@ enum { P_BI_TCXO, P_AUD_REF_CLK, - P_CORE_BI_PLL_TEST_SE, P_GPLL0_OUT_EVEN, P_GPLL0_OUT_MAIN, P_GPLL7_OUT_MAIN, @@ -117,14 +116,12 @@ static const struct parent_map gcc_parent_map_0[] = { { P_BI_TCXO, 0 }, { P_GPLL0_OUT_MAIN, 1 }, { P_GPLL0_OUT_EVEN, 6 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data gcc_parents_0[] = { { .fw_name = "bi_tcxo", .name = "bi_tcxo" }, { .hw = &gpll0.clkr.hw }, { .hw = &gpll0_out_even.clkr.hw }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct parent_map gcc_parent_map_1[] = { @@ -132,7 +129,6 @@ static const struct parent_map gcc_parent_map_1[] = { { P_GPLL0_OUT_MAIN, 1 }, { P_SLEEP_CLK, 5 }, { P_GPLL0_OUT_EVEN, 6 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data gcc_parents_1[] = { @@ -140,41 +136,34 @@ static const struct clk_parent_data gcc_parents_1[] = { { .hw = &gpll0.clkr.hw }, { .fw_name = "sleep_clk", .name = "sleep_clk" }, { .hw = &gpll0_out_even.clkr.hw }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct parent_map gcc_parent_map_2[] = { { P_BI_TCXO, 0 }, { P_SLEEP_CLK, 5 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data gcc_parents_2[] = { { .fw_name = "bi_tcxo", .name = "bi_tcxo" }, { .fw_name = "sleep_clk", .name = "sleep_clk" }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct parent_map gcc_parent_map_3[] = { { P_BI_TCXO, 0 }, { P_GPLL0_OUT_MAIN, 1 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data gcc_parents_3[] = { { .fw_name = "bi_tcxo", .name = "bi_tcxo" }, { .hw = &gpll0.clkr.hw }, - { .fw_name = "core_bi_pll_test_se"}, }; static const struct parent_map gcc_parent_map_4[] = { { P_BI_TCXO, 0 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data gcc_parents_4[] = { { .fw_name = "bi_tcxo", .name = "bi_tcxo" }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct parent_map gcc_parent_map_5[] = { @@ -182,7 +171,6 @@ static const struct parent_map gcc_parent_map_5[] = { { P_GPLL0_OUT_MAIN, 1 }, { P_GPLL7_OUT_MAIN, 3 }, { P_GPLL0_OUT_EVEN, 6 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data gcc_parents_5[] = { @@ -190,7 +178,6 @@ static const struct clk_parent_data gcc_parents_5[] = { { .hw = &gpll0.clkr.hw }, { .hw = &gpll7.clkr.hw }, { .hw = &gpll0_out_even.clkr.hw }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct parent_map gcc_parent_map_6[] = { @@ -198,7 +185,6 @@ static const struct parent_map gcc_parent_map_6[] = { { P_GPLL0_OUT_MAIN, 1 }, { P_GPLL9_OUT_MAIN, 2 }, { P_GPLL0_OUT_EVEN, 6 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data gcc_parents_6[] = { @@ -206,7 +192,6 @@ static const struct clk_parent_data gcc_parents_6[] = { { .hw = &gpll0.clkr.hw }, { .hw = &gpll9.clkr.hw }, { .hw = &gpll0_out_even.clkr.hw }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct parent_map gcc_parent_map_7[] = { @@ -214,7 +199,6 @@ static const struct parent_map gcc_parent_map_7[] = { { P_GPLL0_OUT_MAIN, 1 }, { P_AUD_REF_CLK, 2 }, { P_GPLL0_OUT_EVEN, 6 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data gcc_parents_7[] = { @@ -222,7 +206,6 @@ static const struct clk_parent_data gcc_parents_7[] = { { .hw = &gpll0.clkr.hw }, { .fw_name = "aud_ref_clk", .name = "aud_ref_clk" }, { .hw = &gpll0_out_even.clkr.hw }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct freq_tbl ftbl_gcc_cpuss_ahb_clk_src[] = { From patchwork Wed Dec 28 13:32:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 637303 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4CE1FC71130 for ; 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[2001:14ba:a085:4d00::8a5]) by smtp.gmail.com with ESMTPSA id d7-20020ac241c7000000b004a47e7b91c4sm2613876lfi.195.2022.12.28.05.32.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Dec 2022 05:32:57 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Stephen Boyd , Michael Turquette , Rob Herring , Krzysztof Kozlowski , Taniya Das Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 16/16] arm64: dts: qcom: msm8998: get rid of test clock Date: Wed, 28 Dec 2022 15:32:43 +0200 Message-Id: <20221228133243.3052132-17-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221228133243.3052132-1-dmitry.baryshkov@linaro.org> References: <20221228133243.3052132-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The test clock apparently it's not used by anyone upstream. Remove it. Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/msm8998.dtsi | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi index 18cc149b6be4..6d69dce14dba 100644 --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi @@ -2398,8 +2398,7 @@ mmcc: clock-controller@c8c0000 { "dsi1byte", "hdmipll", "dplink", - "dpvco", - "core_bi_pll_test_se"; + "dpvco"; clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, <&gcc GCC_MMSS_GPLL0_CLK>, <0>, @@ -2408,7 +2407,6 @@ mmcc: clock-controller@c8c0000 { <0>, <0>, <0>, - <0>, <0>; };