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[88.156.142.67]) by smtp.gmail.com with ESMTPSA id v10-20020ac258ea000000b004b501497b6fsm1338615lfo.148.2022.12.25.03.59.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 25 Dec 2022 03:59:46 -0800 (PST) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Wesley Cheng , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH 1/2] dt-bindings: phy: qcom,sc7180-qmp-usb3-dp-phy: correct SC7280 compatibles Date: Sun, 25 Dec 2022 12:59:43 +0100 Message-Id: <20221225115944.55425-1-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org USB3 DP PHY on SC7280 is used with SM8250 fallback: sc7280-herobrine-evoker.dtb: phy-wrapper@88e9000: compatible: ['qcom,sc7280-qmp-usb3-dp-phy', 'qcom,sm8250-qmp-usb3-dp-phy'] is too long Signed-off-by: Krzysztof Kozlowski --- .../phy/qcom,sc7180-qmp-usb3-dp-phy.yaml | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml index d9d0ab90edb1..97d94c685d7b 100644 --- a/Documentation/devicetree/bindings/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml @@ -19,12 +19,17 @@ maintainers: properties: compatible: - enum: - - qcom,sc7180-qmp-usb3-dp-phy - - qcom,sc7280-qmp-usb3-dp-phy - - qcom,sc8180x-qmp-usb3-dp-phy - - qcom,sdm845-qmp-usb3-dp-phy - - qcom,sm8250-qmp-usb3-dp-phy + oneOf: + - enum: + - qcom,sc7180-qmp-usb3-dp-phy + - qcom,sc8180x-qmp-usb3-dp-phy + - qcom,sdm845-qmp-usb3-dp-phy + - qcom,sm8250-qmp-usb3-dp-phy + - items: + - enum: + - qcom,sc7280-qmp-usb3-dp-phy + - const: qcom,sm8250-qmp-usb3-dp-phy + reg: items: - description: Address and length of PHY's USB serdes block. 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[88.156.142.67]) by smtp.gmail.com with ESMTPSA id v10-20020ac258ea000000b004b501497b6fsm1338615lfo.148.2022.12.25.03.59.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 25 Dec 2022 03:59:47 -0800 (PST) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Wesley Cheng , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH 2/2] dt-bindings: phy: qcom,sc7180-qmp-usb3-dp-phy: correct clocks per variants Date: Sun, 25 Dec 2022 12:59:44 +0100 Message-Id: <20221225115944.55425-2-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221225115944.55425-1-krzysztof.kozlowski@linaro.org> References: <20221225115944.55425-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Different variants of Qualcomm USB3 DP PHY take different clocks (according to upstream DTS and Linux driver): sc7280-herobrine-crd.dtb: phy-wrapper@88e9000: clocks: [[43, 151], [39, 0], [43, 153]] is too short sc7280-herobrine-crd.dtb: phy-wrapper@88e9000: clock-names:1: 'cfg_ahb' was expected ... sm8250-hdk.dtb: phy@88e9000: clocks: [[46, 185], [44, 0], [46, 187]] is too short sm8250-hdk.dtb: phy@88e9000: clock-names:1: 'cfg_ahb' was expected Signed-off-by: Krzysztof Kozlowski Acked-by: Rob Herring --- .../phy/qcom,sc7180-qmp-usb3-dp-phy.yaml | 72 ++++++++++++++++--- 1 file changed, 62 insertions(+), 10 deletions(-) diff --git a/Documentation/devicetree/bindings/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml index 97d94c685d7b..2e19a434c669 100644 --- a/Documentation/devicetree/bindings/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml @@ -51,18 +51,12 @@ properties: ranges: true clocks: - items: - - description: Phy aux clock. - - description: Phy config clock. - - description: 19.2 MHz ref clk. - - description: Phy common block aux clock. + minItems: 3 + maxItems: 4 clock-names: - items: - - const: aux - - const: cfg_ahb - - const: ref - - const: com_aux + minItems: 3 + maxItems: 4 power-domains: maxItems: 1 @@ -171,6 +165,64 @@ required: - vdda-phy-supply - vdda-pll-supply +allOf: + - if: + properties: + compatible: + enum: + - qcom,sc7180-qmp-usb3-dp-phy + - qcom,sdm845-qmp-usb3-dp-phy + then: + properties: + clocks: + items: + - description: Phy aux clock + - description: Phy config clock + - description: 19.2 MHz ref clk + - description: Phy common block aux clock + clock-names: + items: + - const: aux + - const: cfg_ahb + - const: ref + - const: com_aux + + - if: + properties: + compatible: + enum: + - qcom,sc8180x-qmp-usb3-dp-phy + then: + properties: + clocks: + items: + - description: Phy aux clock + - description: 19.2 MHz ref clk + - description: Phy common block aux clock + clock-names: + items: + - const: aux + - const: ref + - const: com_aux + + - if: + properties: + compatible: + enum: + - qcom,sm8250-qmp-usb3-dp-phy + then: + properties: + clocks: + items: + - description: Phy aux clock + - description: Board XO source + - description: Phy common block aux clock + clock-names: + items: + - const: aux + - const: ref_clk_src + - const: com_aux + additionalProperties: false examples: