From patchwork Sat Mar 30 00:58:57 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 161479 Delivered-To: patch@linaro.org Received: by 2002:a02:c6d8:0:0:0:0:0 with SMTP id r24csp2705437jan; Fri, 29 Mar 2019 18:04:59 -0700 (PDT) X-Google-Smtp-Source: APXvYqwyZOnDOzehkP8iDCUc+T8boici4tA+Wi3jSjiAe4wFA9AHE4zuovBfhcOZDj8UgZikHjMz X-Received: by 2002:a24:3905:: with SMTP id l5mr7803056ita.43.1553907899568; Fri, 29 Mar 2019 18:04:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1553907899; cv=none; d=google.com; s=arc-20160816; b=iFSPFe3MdvVhjSUSpQfChpujQjjOs3PPCuCWpd1Khi+Wcu1bORe9nTCR2eM4/njt+4 5ck3IrF8V4aqGPChNxSHrn6NXXsnCe246yyJr5/cruVRfSejqTXxEbkXr19TEe2OYTM+ PVmEmWgzkmVkFFP7xJ/kWhzzREWcNFL3WW+Wm9e4z1mzdRs9MfKLU019AXd8X6jd6J5e K4g+Pn2ulXtU/u92NZcT9EcEvkdOsuCiXHCUrF0sWgrwI0xhvlw+l7Ue27o1yk29W49M sK+YM2iVGNDNd6aBBgirZyNsoK7uFxzTxwrtjiR00SlbZZRmXoNZVArtzFfMAF7lFp71 ppEg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=kqHe5v2q79iXufkRdD9H4UM2SE/bcUFqYqqxTH4VdfM=; b=euItYYX8r+E252ETrhzefhMqqvnHMMNEcpYcFutABSsO4GjGXC8zSU2ZdaO1b31ZvB nilr/XBDOvroD4aUXT5/8ps+eCV9UPmGe0kShh4M+Vri1KFuGHB7D2bgFN3rfKcC/xcj zOnLO5sX0895oDrmZl7Jik2yUeiBtotHei1FdY+2GxJo/y+MxaCIdAUfOR5ysX+39Tq2 t7y/RB8XXu+VSu9Ciuhlm591Ee+XzucQlz52kYGK57T8OTvItuwV0SAsA+REO/FsjndP Pp70pr6R+pkfZREK9jWFuEVoTOCln83Lw7spNr7LAyFvvvk0U+j8kzIvokeE/rddAr6G i4tg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=S4w3Un0R; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[66.75.72.255]) by smtp.gmail.com with ESMTPSA id e1sm2229900pfn.187.2019.03.29.17.59.04 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 29 Mar 2019 17:59:04 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Fri, 29 Mar 2019 14:58:57 -1000 Message-Id: <20190330005900.17282-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190330005900.17282-1-richard.henderson@linaro.org> References: <20190330005900.17282-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::442 Subject: [Qemu-devel] [PATCH v4 1/4] linux-user/aarch64: Reset btype for syscalls and signals X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, alex.bennee@linaro.org, ramana.radhakrishnan@arm.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The value of btype for syscalls is CONSTRAINED UNPREDICTABLE, so we need to make sure that the value is 0 before clone, fork, or syscall return. The value of btype for signals is defined, but it does not make sense for a SIGILL handler to enter with the btype set as for the indirect branch that caused the SIGILL. Signed-off-by: Richard Henderson --- v4: Do not clear btype in signal frame. --- linux-user/aarch64/cpu_loop.c | 7 +++++++ linux-user/aarch64/signal.c | 5 +++-- 2 files changed, 10 insertions(+), 2 deletions(-) -- 2.17.1 Reviewed-by: Peter Maydell diff --git a/linux-user/aarch64/cpu_loop.c b/linux-user/aarch64/cpu_loop.c index d75fd9d3e2..f5cce4769d 100644 --- a/linux-user/aarch64/cpu_loop.c +++ b/linux-user/aarch64/cpu_loop.c @@ -85,6 +85,13 @@ void cpu_loop(CPUARMState *env) switch (trapnr) { case EXCP_SWI: + /* + * The state of BTYPE on syscall entry is CONSTRAINED + * UNPREDICTABLE. The real kernel will need to tidy this up + * as well. Do this before syscalls so that the value is + * correct on return from syscall (especially clone & fork). + */ + env->btype = 0; ret = do_syscall(env, env->xregs[8], env->xregs[0], diff --git a/linux-user/aarch64/signal.c b/linux-user/aarch64/signal.c index f84a9cf28a..078873c4a5 100644 --- a/linux-user/aarch64/signal.c +++ b/linux-user/aarch64/signal.c @@ -506,10 +506,11 @@ static void target_setup_frame(int usig, struct target_sigaction *ka, + offsetof(struct target_rt_frame_record, tramp); } env->xregs[0] = usig; - env->xregs[31] = frame_addr; env->xregs[29] = frame_addr + fr_ofs; - env->pc = ka->_sa_handler; env->xregs[30] = return_addr; + env->xregs[31] = frame_addr; + env->pc = ka->_sa_handler; + env->btype = 0; if (info) { tswap_siginfo(&frame->info, info); env->xregs[1] = frame_addr + offsetof(struct target_rt_sigframe, info); From patchwork Sat Mar 30 00:58:58 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 161483 Delivered-To: patch@linaro.org Received: by 2002:a02:c6d8:0:0:0:0:0 with SMTP id r24csp2808913jan; Fri, 29 Mar 2019 20:35:12 -0700 (PDT) X-Google-Smtp-Source: APXvYqyJCFEMvwSLhbd2bY1nWYmiHn4iBqZCDTSderN+SMpQ/vyYgmdoOXPgRZ7qAg1QiwBHTAUI X-Received: by 2002:a02:3b6e:: with SMTP id i46mr25391342jaf.138.1553916912580; Fri, 29 Mar 2019 20:35:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1553916912; cv=none; d=google.com; s=arc-20160816; b=rcu7O2p85+puwCROY/pf+54tOJj0HeGoQEN0PdcpjLFJRG0tHlh4gF+pzQSU2QPerJ GhJV3uDntcDQzU6ql5WlsDM6wdLagW+5uyD2iT/dC/ejX2fHPZ9CR/T6Ljnv1uxSgwym zsMSd9JHxAcACZ7uuyeEeYuWM1TlRgF0AvqPAN+BWsUp13OkFOLgfPBYFsmnbgO+MV1E Ls0qnie6L2Sipz7AU8B0k4VPgIM2bjIy6EqDGW4TtLw81pSJZEY6oarHbXpFrTRbE4tv aicNlSlOP1dHYMBJgsGgs0yZxLFT0tNPiwgYc6xGFa0UWakS/8dwLg1v2bnTNBWiJJYQ 1jDQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=+BPmCxbz0CPP0QJi6QmliFS0UpMvpjSbAC3AIaHbJHo=; b=fqDpBXQc0iITFr1DmKcJ1sZoyhDESRXja35Lrjhl59910LPlenK5ire/3RIA0eOb5b fB+xbXUoBXFzh8oUVwo0/hyunowvgcInxSI7egZKho4L2H9KL8Q5lCdlVg2KRaKss4fI WcqRxC2qE/y59UspL8Ou6M9ZXVX5kc187E0Esgpa0l4FE/kSCMF9oD1jE5h0rZ4RfTVZ 3UTp7zBFdXsV1KnL2zJQMW5D3avI74zcvhFOL7UH4aLzDDulyaE9MlLJHSY2GLrMbPrI mbgauZ7m5ZXm6+LO746efmyVqARZFjtpO4CW419mL7wBRueY4c0q/jmAIDQz2yR9itmP +gaQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=UbcO9oUl; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[66.75.72.255]) by smtp.gmail.com with ESMTPSA id e1sm2229900pfn.187.2019.03.29.17.59.05 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 29 Mar 2019 17:59:06 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Fri, 29 Mar 2019 14:58:58 -1000 Message-Id: <20190330005900.17282-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190330005900.17282-1-richard.henderson@linaro.org> References: <20190330005900.17282-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::444 Subject: [Qemu-devel] [PATCH v4 2/4] linux-user: Set PAGE_TARGET_1 for TARGET_PROT_BTI X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, alex.bennee@linaro.org, ramana.radhakrishnan@arm.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" There is agreement that there will be a mmap/mprotect bit, although no word yet on the value or the name. Invent a name to make forward progress. The PAGE_TARGET_1 bit, is qemu internal, and allows the target something to query from the guest page tables. Signed-off-by: Richard Henderson --- include/exec/cpu-all.h | 12 +++++++++--- linux-user/syscall_defs.h | 5 +++++ linux-user/mmap.c | 13 ++++++++++++- target/arm/translate-a64.c | 6 +++--- 4 files changed, 29 insertions(+), 7 deletions(-) -- 2.17.1 diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index b16c9ec513..fb38467ed1 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -242,13 +242,19 @@ extern intptr_t qemu_host_page_mask; /* original state of the write flag (used when tracking self-modifying code */ #define PAGE_WRITE_ORG 0x0010 -/* Invalidate the TLB entry immediately, helpful for s390x - * Low-Address-Protection. Used with PAGE_WRITE in tlb_set_page_with_attrs() */ -#define PAGE_WRITE_INV 0x0040 #if defined(CONFIG_BSD) && defined(CONFIG_USER_ONLY) /* FIXME: Code that sets/uses this is broken and needs to go away. */ #define PAGE_RESERVED 0x0020 #endif +/* + * Invalidate the TLB entry immediately, helpful for s390x + * Low-Address-Protection. Used with PAGE_WRITE in tlb_set_page_with_attrs() + */ +#define PAGE_WRITE_INV 0x0040 +/* + * Some target-specific bits that will be used via page_get_flags(). + */ +#define PAGE_TARGET_1 0x0080 #if defined(CONFIG_USER_ONLY) void page_dump(FILE *f); diff --git a/linux-user/syscall_defs.h b/linux-user/syscall_defs.h index 12c8407144..563f752081 100644 --- a/linux-user/syscall_defs.h +++ b/linux-user/syscall_defs.h @@ -1090,6 +1090,11 @@ struct target_winsize { #define TARGET_PROT_SEM 0x08 #endif +#ifdef TARGET_AARCH64 +/* FIXME: Placeholder while waiting on the official ABI. */ +#define TARGET_PROT_BTI 0x1000 +#endif + /* Common */ #define TARGET_MAP_SHARED 0x01 /* Share changes */ #define TARGET_MAP_PRIVATE 0x02 /* Changes are private */ diff --git a/linux-user/mmap.c b/linux-user/mmap.c index e0249efe4f..48b4d9ea02 100644 --- a/linux-user/mmap.c +++ b/linux-user/mmap.c @@ -362,6 +362,7 @@ abi_long target_mmap(abi_ulong start, abi_ulong len, int prot, int flags, int fd, abi_ulong offset) { abi_ulong ret, end, real_start, real_end, retaddr, host_offset, host_len; + int page_flags; mmap_lock(); #ifdef DEBUG_MMAP @@ -451,6 +452,16 @@ abi_long target_mmap(abi_ulong start, abi_ulong len, int prot, } } + page_flags = (prot & PAGE_BITS) | PAGE_VALID; + +#ifdef TARGET_AARCH64 + /* Remember the BTI bit for page_get_flags, but don't pass to host. */ + if (prot & TARGET_PROT_BTI) { + page_flags |= PAGE_TARGET_1; + prot &= ~TARGET_PROT_BTI; + } +#endif + if (!(flags & MAP_FIXED)) { unsigned long host_start; void *p; @@ -562,7 +573,7 @@ abi_long target_mmap(abi_ulong start, abi_ulong len, int prot, } } the_end1: - page_set_flags(start, start + len, prot | PAGE_VALID); + page_set_flags(start, start + len, page_flags); the_end: #ifdef DEBUG_MMAP printf("ret=0x" TARGET_ABI_FMT_lx "\n", start); diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index dcdeb80176..5b7bdc3926 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -14144,10 +14144,10 @@ static void disas_data_proc_simd_fp(DisasContext *s, uint32_t insn) */ static bool is_guarded_page(CPUARMState *env, DisasContext *s) { -#ifdef CONFIG_USER_ONLY - return false; /* FIXME */ -#else uint64_t addr = s->base.pc_first; +#ifdef CONFIG_USER_ONLY + return page_get_flags(addr) & PAGE_TARGET_1; +#else int mmu_idx = arm_to_core_mmu_idx(s->mmu_idx); unsigned int index = tlb_index(env, mmu_idx, addr); CPUTLBEntry *entry = tlb_entry(env, mmu_idx, addr); From patchwork Sat Mar 30 00:58:59 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 161480 Delivered-To: patch@linaro.org Received: by 2002:a02:c6d8:0:0:0:0:0 with SMTP id r24csp2762605jan; Fri, 29 Mar 2019 19:25:35 -0700 (PDT) X-Google-Smtp-Source: APXvYqwOr5Gi9NednZMh2V070W87EAllQx0DZsRx4C8UQFPmTHyzD/b6B7jNVkkWtp1Cl99VXHld X-Received: by 2002:a02:938f:: with SMTP id z15mr21837503jah.108.1553912735598; Fri, 29 Mar 2019 19:25:35 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1553912726; cv=none; d=google.com; s=arc-20160816; b=qrJrthIO+8B9MTtBdLBwaRog2U0Puqpz3j+IbGZi8xtN+VxuUit5VAC9c05GkFW1WA u9405VJtZYoZZiy+2yDvQIZFoxp1PrILrjdA4do5/hpdXlKfsVUW2asXm17FSUbiFYQy qvxA856mVSgBDDE3jD4GSbjh9NlnK8unqvkSCXOY+WG8ND+90GGHCoVZiYhgNig5sQ4N FaeBpYKwCCYkl4jpDGeiIV9glBBwE+4y8A6Dq5tgIunaJkfkcB6c5393o0jxl4s1cks7 pNDky1XXdk17lUTvqnXIXKNLEyPN7TSWvM59stxtcUDL62n4tNTNaW3CocWYmflUE7i/ 9z8Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=z4WDNajKPnmHVMuD6PXewZbG8jDBRC/myV7ZolbBuM0=; b=rBQFID61Ob8EUZsFUxQaZxce+wnPL6mpVhR1ShaVmIII57/r26A2b1aCv5do2Bs2+h guUr7uKWJXZhSlaauC0NgMY2wBaNS0X105iE+Z4BwF7vqQJ/tsl0RkCEVUuuGprkReHF 94tfDAybTk5wrziRvv0ocpy/3SPfUVfWGCvW1ozgXUH0fX6gG5Ztw2QJmcq77hrFVOzD gP/LyIsrHQ04/g/9Io6At4zsAOmApnur6fky+NGaUiLfehBF/Jbz0CzAV+XROb8dfRI7 DtlkQzJ8TQGMj2Erdh16E63X6FbtAjZfnClr7RCQQlCpUZq07SW6t5LYFDzF+aLHZx3u g7hg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b="y/vWxKAi"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[66.75.72.255]) by smtp.gmail.com with ESMTPSA id e1sm2229900pfn.187.2019.03.29.17.59.07 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 29 Mar 2019 17:59:07 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Fri, 29 Mar 2019 14:58:59 -1000 Message-Id: <20190330005900.17282-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190330005900.17282-1-richard.henderson@linaro.org> References: <20190330005900.17282-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::443 Subject: [Qemu-devel] [PATCH v4 3/4] linux-user: Parse NT_GNU_PROPERTY_TYPE_0 notes X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, alex.bennee@linaro.org, ramana.radhakrishnan@arm.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" For aarch64, this includes the GNU_PROPERTY_AARCH64_FEATURE_1_BTI bit, which indicates that the image should be mapped with guarded pages. Signed-off-by: Richard Henderson --- linux-user/elfload.c | 79 ++++++++++++++++++++++++++++++++++++++------ 1 file changed, 68 insertions(+), 11 deletions(-) -- 2.17.1 Reviewed-by: Peter Maydell diff --git a/linux-user/elfload.c b/linux-user/elfload.c index c1a26021f8..12ee96e5d4 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -116,6 +116,10 @@ typedef abi_uint target_gid_t; #endif typedef abi_int target_pid_t; + +#define TARGET_NT_GNU_PROPERTY_TYPE_0 5 + + #ifdef TARGET_I386 #define ELF_PLATFORM get_elf_platform() @@ -543,6 +547,10 @@ static const char *get_elf_platform(void) # define ELF_PLATFORM "aarch64" #endif +#define TARGET_GNU_PROPERTY_AARCH64_FEATURE_1_AND 0xc0000000 +#define TARGET_GNU_PROPERTY_AARCH64_FEATURE_1_BTI (1u << 0) +#define TARGET_GNU_PROPERTY_AARCH64_FEATURE_1_PAC (1u << 1) + static inline void init_thread(struct target_pt_regs *regs, struct image_info *infop) { @@ -2252,7 +2260,7 @@ static void load_elf_image(const char *image_name, int image_fd, struct elfhdr *ehdr = (struct elfhdr *)bprm_buf; struct elf_phdr *phdr; abi_ulong load_addr, load_bias, loaddr, hiaddr, error; - int i, retval; + int i, retval, prot_exec = PROT_EXEC; const char *errmsg; /* First of all, some simple consistency checks */ @@ -2287,17 +2295,66 @@ static void load_elf_image(const char *image_name, int image_fd, loaddr = -1, hiaddr = 0; info->alignment = 0; for (i = 0; i < ehdr->e_phnum; ++i) { - if (phdr[i].p_type == PT_LOAD) { - abi_ulong a = phdr[i].p_vaddr - phdr[i].p_offset; - if (a < loaddr) { - loaddr = a; + struct elf_phdr *eppnt = phdr + i; + + switch (eppnt->p_type) { + case PT_LOAD: + { + abi_ulong a = eppnt->p_vaddr - eppnt->p_offset; + if (a < loaddr) { + loaddr = a; + } + a = eppnt->p_vaddr + eppnt->p_memsz; + if (a > hiaddr) { + hiaddr = a; + } + ++info->nsegs; + info->alignment |= eppnt->p_align; } - a = phdr[i].p_vaddr + phdr[i].p_memsz; - if (a > hiaddr) { - hiaddr = a; + break; + case PT_NOTE: + { + uint32_t note[7]; + uint32_t gnu0; + + if (eppnt->p_filesz < sizeof(note)) { + break; + } + if (eppnt->p_offset + eppnt->p_filesz <= BPRM_BUF_SIZE) { + memcpy(note, bprm_buf + eppnt->p_offset, sizeof(note)); + } else { + retval = pread(image_fd, note, sizeof(note), + eppnt->p_offset); + if (retval != sizeof(note)) { + goto exit_perror; + } + } +#ifdef BSWAP_NEEDED + for (i = 0; i < ARRAY_SIZE(note); ++i) { + bswap32s(note + i); + } +#endif +#ifdef HOST_WORDS_BIGENDIAN + gnu0 = 'G' << 24 | 'N' << 16 | 'U' << 8; +#else + gnu0 = 'G' | 'N' << 8 | 'U' << 16; +#endif + + if (note[0] != 4 || /* namesz */ + note[1] < 12 || /* descsz -- may include padding */ + note[2] != TARGET_NT_GNU_PROPERTY_TYPE_0 || /* type */ + note[3] != gnu0) { /* name */ + break; + } +#ifdef TARGET_AARCH64 + if (note[4] == TARGET_GNU_PROPERTY_AARCH64_FEATURE_1_AND && + note[5] == 4 && + (note[6] & TARGET_GNU_PROPERTY_AARCH64_FEATURE_1_BTI)) { + prot_exec |= TARGET_PROT_BTI; + } +#endif } - ++info->nsegs; - info->alignment |= phdr[i].p_align; + break; } } @@ -2359,7 +2416,7 @@ static void load_elf_image(const char *image_name, int image_fd, if (eppnt->p_flags & PF_R) elf_prot = PROT_READ; if (eppnt->p_flags & PF_W) elf_prot |= PROT_WRITE; - if (eppnt->p_flags & PF_X) elf_prot |= PROT_EXEC; + if (eppnt->p_flags & PF_X) elf_prot |= prot_exec; vaddr = load_bias + eppnt->p_vaddr; vaddr_po = TARGET_ELF_PAGEOFFSET(vaddr); From patchwork Sat Mar 30 00:59:00 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 161481 Delivered-To: patch@linaro.org Received: by 2002:a02:c6d8:0:0:0:0:0 with SMTP id r24csp2787918jan; Fri, 29 Mar 2019 20:03:34 -0700 (PDT) X-Google-Smtp-Source: APXvYqwYo/5vF+l/66OZSPis3yOokg2n0L16gdHw8r7/HIlx0bJdyAY/ktDPS9iKdUPcwlHGrs+e X-Received: by 2002:a24:45de:: with SMTP id c91mr405296itd.166.1553915014171; Fri, 29 Mar 2019 20:03:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1553915014; cv=none; d=google.com; s=arc-20160816; b=tuW/gh598PueN4wShGSdJKko5rNxk04qExfnsSBE1+ekkDFF+LguuK3iMUk5logRkO Wzkvqmm2FqQq6p/6zkj98OVZ0e/ef+Jc9ObDkSOI8n/MK8lxW0b9o2CmEr6B/K/JtnsM mK78nXyXVSnl1o5TCsIW8lvGw8nc6Vi0zhdsdTymNZo0HhSm4CAmBnnv9zhXKsWEsXAq pjR/QTF7EHP1djjlPnRfXwICkea7mZB9jk9VPR4kKHgt5hJauKRIZJKTxBcYk8AWavel 6EhCow3y905DMOhbCkXu2r+JaUBIsSjgAelcez2FHetGVwuOKQgzkx5VTCWTsCN47Ld/ Zp3Q== ARC-Message-Signature: i=1; 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X-Received-From: 2607:f8b0:4864:20::543 Subject: [Qemu-devel] [PATCH v4 4/4] tests/tcg/aarch64: Add bti smoke test X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, alex.bennee@linaro.org, ramana.radhakrishnan@arm.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Richard Henderson --- tests/tcg/aarch64/bti-1.c | 62 +++++++++++++++++++++++++++ tests/tcg/aarch64/bti-crt.inc.c | 69 +++++++++++++++++++++++++++++++ tests/tcg/aarch64/Makefile.target | 3 ++ 3 files changed, 134 insertions(+) create mode 100644 tests/tcg/aarch64/bti-1.c create mode 100644 tests/tcg/aarch64/bti-crt.inc.c -- 2.17.1 diff --git a/tests/tcg/aarch64/bti-1.c b/tests/tcg/aarch64/bti-1.c new file mode 100644 index 0000000000..61924f0d7a --- /dev/null +++ b/tests/tcg/aarch64/bti-1.c @@ -0,0 +1,62 @@ +/* + * Branch target identification, basic notskip cases. + */ + +#include "bti-crt.inc.c" + +static void skip2_sigill(int sig, siginfo_t *info, ucontext_t *uc) +{ + uc->uc_mcontext.pc += 8; + uc->uc_mcontext.pstate = 1; +} + +#define NOP "nop" +#define BTI_N "hint #32" +#define BTI_C "hint #34" +#define BTI_J "hint #36" +#define BTI_JC "hint #38" + +#define BTYPE_1(DEST) \ + asm("mov %0,#1; adr x16, 1f; br x16; 1: " DEST "; mov %0,#0" \ + : "=r"(skipped) : : "x16") + +#define BTYPE_2(DEST) \ + asm("mov %0,#1; adr x16, 1f; blr x16; 1: " DEST "; mov %0,#0" \ + : "=r"(skipped) : : "x16", "x30") + +#define BTYPE_3(DEST) \ + asm("mov %0,#1; adr x15, 1f; br x15; 1: " DEST "; mov %0,#0" \ + : "=r"(skipped) : : "x15") + +#define TEST(WHICH, DEST, EXPECT) \ + do { WHICH(DEST); fail += skipped ^ EXPECT; } while (0) + + +int main() +{ + int fail = 0; + int skipped; + + /* Signal-like with SA_SIGINFO. */ + signal_info(SIGILL, skip2_sigill); + + TEST(BTYPE_1, NOP, 1); + TEST(BTYPE_1, BTI_N, 1); + TEST(BTYPE_1, BTI_C, 0); + TEST(BTYPE_1, BTI_J, 0); + TEST(BTYPE_1, BTI_JC, 0); + + TEST(BTYPE_2, NOP, 1); + TEST(BTYPE_2, BTI_N, 1); + TEST(BTYPE_2, BTI_C, 0); + TEST(BTYPE_2, BTI_J, 1); + TEST(BTYPE_2, BTI_JC, 0); + + TEST(BTYPE_3, NOP, 1); + TEST(BTYPE_3, BTI_N, 1); + TEST(BTYPE_3, BTI_C, 1); + TEST(BTYPE_3, BTI_J, 0); + TEST(BTYPE_3, BTI_JC, 0); + + return fail; +} diff --git a/tests/tcg/aarch64/bti-crt.inc.c b/tests/tcg/aarch64/bti-crt.inc.c new file mode 100644 index 0000000000..bb363853de --- /dev/null +++ b/tests/tcg/aarch64/bti-crt.inc.c @@ -0,0 +1,69 @@ +/* + * Minimal user-environment for testing BTI. + * + * Normal libc is not built with BTI support enabled, and so could + * generate a BTI TRAP before ever reaching main. + */ + +#include +#include +#include +#include + +int main(void); + +void _start(void) +{ + exit(main()); +} + +void exit(int ret) +{ + register int x0 __asm__("x0") = ret; + register int x8 __asm__("x8") = __NR_exit; + + asm volatile("svc #0" : : "r"(x0), "r"(x8)); + __builtin_unreachable(); +} + +/* + * Irritatingly, the user API struct sigaction does not match the + * kernel API struct sigaction. So for simplicity, isolate the + * kernel ABI here, and make this act like signal. + */ +void signal_info(int sig, void (*fn)(int, siginfo_t *, ucontext_t *)) +{ + struct kernel_sigaction { + void (*handler)(int, siginfo_t *, ucontext_t *); + unsigned long flags; + unsigned long restorer; + unsigned long mask; + } sa = { fn, SA_SIGINFO, 0, 0 }; + + register int x0 __asm__("x0") = sig; + register void *x1 __asm__("x1") = &sa; + register void *x2 __asm__("x2") = 0; + register int x3 __asm__("x3") = sizeof(unsigned long); + register int x8 __asm__("x8") = __NR_rt_sigaction; + + asm volatile("svc #0" + : : "r"(x0), "r"(x1), "r"(x2), "r"(x3), "r"(x8) : "memory"); +} + +/* + * Create the PT_NOTE that will enable BTI in the page tables. + * This will be created by the compiler with -mbranch-protection=standard, + * but as of 2019-03-29, this is has not been committed to gcc mainline. + * This will probably be in GCC10. + */ +asm(".section .note.gnu.property,\"a\"\n\ + .align 3\n\ + .long 4\n\ + .long 16\n\ + .long 5\n\ + .string \"GNU\"\n\ + .long 0xc0000000\n\ + .long 4\n\ + .long 1\n\ + .align 3\n\ + .previous"); diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target index 2bb914975b..21da3bc37f 100644 --- a/tests/tcg/aarch64/Makefile.target +++ b/tests/tcg/aarch64/Makefile.target @@ -18,4 +18,7 @@ run-fcvt: fcvt AARCH64_TESTS += pauth-1 run-pauth-%: QEMU += -cpu max +AARCH64_TESTS += bti-1 +bti-1: LDFLAGS += -nostartfiles -nodefaultlibs -nostdlib + TESTS:=$(AARCH64_TESTS)