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[209.51.188.17]) by mx.google.com with ESMTPS id k20-20020ac84794000000b00397e910165esi4784699qtq.417.2022.12.20.03.05.35 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 20 Dec 2022 03:05:35 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=IbmGcfax; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p7aPF-0000fx-41; Tue, 20 Dec 2022 06:03:33 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p7aP6-0000bf-WD for qemu-devel@nongnu.org; Tue, 20 Dec 2022 06:03:26 -0500 Received: from mail-wr1-x430.google.com ([2a00:1450:4864:20::430]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p7aP3-0002HM-Fk for qemu-devel@nongnu.org; Tue, 20 Dec 2022 06:03:23 -0500 Received: by mail-wr1-x430.google.com with SMTP id f18so11375768wrj.5 for ; Tue, 20 Dec 2022 03:03:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=VCqVdn1MR+8q4KNBpfFHWACRBuZ63eQE6lUtevF78ks=; b=IbmGcfaxQjjoUj4M9k4hlUOnR4o0fsyYLTPSFI8cKOjIqCAw6dnov02C1C4zKqWDos kCFE28qLE75WmOyr4IR0Dce3lkMJyV7v6TmQzXNxf6+q3UUEwH8heosLdhO6EdZrXyQK mUOI+ldneUka09yGLG+aHkn02nwE8N0zvQdyI3bsAEv/F84S+L0iaiAF8Eo/6Nde17+U WR5lHCppoas0eMnqA3xK7UeOuSFEEAHyWzmBGwmNQCWmMrUE6aXH9xQx0GDnsjOoo/Bn RAgzsGB0NvLGrKFSGteecNeEKrkggfxwxEOElWI29/wYJaKjldR3df3hm7Dkku8Js7To nO3Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=VCqVdn1MR+8q4KNBpfFHWACRBuZ63eQE6lUtevF78ks=; b=rFsGpy2wEdoctxVylt8QetG1oE0tV4PBulRJL9wxvI9MUKnkz8YE93Bx0GM+/txXHd QB7IIdvBdPFbcHpsjQ0zBKvRIGC2Kjgw73b3dzF/y2Aulysg7pRkhra/xOcdAi33vpZn 8PRzzcyL5w/65BReEjez1BHREPpKfA2seFPIdZ9cP8118Ptp4GdQLogy+zbRLChfujPA wdUNPMVfylpYcFaFY2xjYQWUvZt4Vq8c8I4R+55ViQbsYIGEorDnP+P3fU8i9F5RElzA 0mQaupSoMimaNJREv0IfAmh/kHLMqOxXgQrR6cchtGsezIrwcKxTsMAF/8WY1KAZnrkE JHwA== X-Gm-Message-State: ANoB5pkj1mcHmmf9vMgYi+azZxSVI6es1rpE3Af44gU8f4M1C7wSnfhx wlhBDRF8/fbnJqMUInlo0yBiq0WfE/d6K7LAtNE= X-Received: by 2002:adf:e710:0:b0:24c:f3b8:816d with SMTP id c16-20020adfe710000000b0024cf3b8816dmr24771787wrm.60.1671534199819; Tue, 20 Dec 2022 03:03:19 -0800 (PST) Received: from localhost.localdomain ([81.0.6.76]) by smtp.gmail.com with ESMTPSA id l17-20020a5d5611000000b002424b695f7esm12340039wrv.46.2022.12.20.03.03.17 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 20 Dec 2022 03:03:18 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Xiaojuan Yang , Daniel Henrique Barboza , =?utf-8?q?Philippe_Mathieu?= =?utf-8?q?-Daud=C3=A9?= , Greg Kurz , =?utf-8?q?C=C3=A9dric_Le_Goater?= , qemu-ppc@nongnu.org, Peter Maydell , Aurelien Jarno , Song Gao , Jiaxun Yang , David Gibson , Huacai Chen , Aleksandar Rikalo , qemu-arm@nongnu.org, Markus Armbruster , Richard Henderson Subject: [PATCH v2 1/5] target/arm: Restrict 'qapi-commands-machine.h' to system emulation Date: Tue, 20 Dec 2022 12:03:06 +0100 Message-Id: <20221220110310.8656-2-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221220110310.8656-1-philmd@linaro.org> References: <20221220110310.8656-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=philmd@linaro.org; helo=mail-wr1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Since commit a0e61807a3 ("qapi: Remove QMP events and commands from user-mode builds") we don't generate the "qapi-commands-machine.h" header in a user-emulation-only build. Move the QMP functions from helper.c (which is always compiled) to monitor.c (which is only compiled when system-emulation is selected). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/arm/helper.c | 29 ----------------------------- target/arm/m_helper.c | 1 - target/arm/monitor.c | 28 ++++++++++++++++++++++++++++ 3 files changed, 28 insertions(+), 30 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index bac2ea62c4..399603b680 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -27,7 +27,6 @@ #include "sysemu/cpu-timers.h" #include "sysemu/kvm.h" #include "qemu/range.h" -#include "qapi/qapi-commands-machine-target.h" #include "qapi/error.h" #include "qemu/guest-random.h" #ifdef CONFIG_TCG @@ -8514,34 +8513,6 @@ void arm_cpu_list(void) g_slist_free(list); } -static void arm_cpu_add_definition(gpointer data, gpointer user_data) -{ - ObjectClass *oc = data; - CpuDefinitionInfoList **cpu_list = user_data; - CpuDefinitionInfo *info; - const char *typename; - - typename = object_class_get_name(oc); - info = g_malloc0(sizeof(*info)); - info->name = g_strndup(typename, - strlen(typename) - strlen("-" TYPE_ARM_CPU)); - info->q_typename = g_strdup(typename); - - QAPI_LIST_PREPEND(*cpu_list, info); -} - -CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp) -{ - CpuDefinitionInfoList *cpu_list = NULL; - GSList *list; - - list = object_class_get_list(TYPE_ARM_CPU, false); - g_slist_foreach(list, arm_cpu_add_definition, &cpu_list); - g_slist_free(list); - - return cpu_list; -} - /* * Private utility function for define_one_arm_cp_reg_with_opaque(): * add a single reginfo struct to the hash table. diff --git a/target/arm/m_helper.c b/target/arm/m_helper.c index 355cd4d60a..11008528b5 100644 --- a/target/arm/m_helper.c +++ b/target/arm/m_helper.c @@ -26,7 +26,6 @@ #include "sysemu/cpus.h" #include "sysemu/kvm.h" #include "qemu/range.h" -#include "qapi/qapi-commands-machine-target.h" #include "qapi/error.h" #include "qemu/guest-random.h" #ifdef CONFIG_TCG diff --git a/target/arm/monitor.c b/target/arm/monitor.c index ecdd5ee817..c8fa524002 100644 --- a/target/arm/monitor.c +++ b/target/arm/monitor.c @@ -227,3 +227,31 @@ CpuModelExpansionInfo *qmp_query_cpu_model_expansion(CpuModelExpansionType type, return expansion_info; } + +static void arm_cpu_add_definition(gpointer data, gpointer user_data) +{ + ObjectClass *oc = data; + CpuDefinitionInfoList **cpu_list = user_data; + CpuDefinitionInfo *info; + const char *typename; + + typename = object_class_get_name(oc); + info = g_malloc0(sizeof(*info)); + info->name = g_strndup(typename, + strlen(typename) - strlen("-" TYPE_ARM_CPU)); + info->q_typename = g_strdup(typename); + + QAPI_LIST_PREPEND(*cpu_list, info); +} + +CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp) +{ + CpuDefinitionInfoList *cpu_list = NULL; + GSList *list; + + list = object_class_get_list(TYPE_ARM_CPU, false); + g_slist_foreach(list, arm_cpu_add_definition, &cpu_list); + g_slist_free(list); + + return cpu_list; +} From patchwork Tue Dec 20 11:03:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 635437 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp2847637pvb; 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[209.51.188.17]) by mx.google.com with ESMTPS id t74-20020a37aa4d000000b006feb9d4e1efsi2816554qke.254.2022.12.20.03.06.57 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 20 Dec 2022 03:06:57 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=B1Y6gzfn; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p7aPG-0000hu-N7; Tue, 20 Dec 2022 06:03:34 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p7aPC-0000eH-52 for qemu-devel@nongnu.org; Tue, 20 Dec 2022 06:03:30 -0500 Received: from mail-wr1-x42f.google.com ([2a00:1450:4864:20::42f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p7aP9-0002JA-N8 for qemu-devel@nongnu.org; Tue, 20 Dec 2022 06:03:29 -0500 Received: by mail-wr1-x42f.google.com with SMTP id w15so11347841wrl.9 for ; Tue, 20 Dec 2022 03:03:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=N/h6l6Dt4LtktYJzyaWdIUhcMQmq+IUjXoUtOmfFZYU=; b=B1Y6gzfnRX2slGZn1yrWt62YpN3fgoftDdBks09/8a1Bqux/jGxPx722o07OrXZ1KY egg+6Byaq9uTn0vnN21lMNx3hm9iaUx1DiSSiTdPc77kqA0y6O6uxOdn6YTBCldLklvz +1Ci9Quaz3moHMRPHyYd4heuuwtpoKsdv7zVkjDqKdqrF7X1Xd6mXG/lQN7VEvkLC+x4 n9lSyV4wNg9w2+cTxncCDxkI90goyDgZ32Lsc/IaMo7sJKioGSr8DVyTdxCgZtkaisKO F1aX7qFd3Yb43PkY/fWXuAuKMvOV5OeuGOML1jyV/huDCRIvPmjIaJPA32HMiF2HRLtA jgIQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=N/h6l6Dt4LtktYJzyaWdIUhcMQmq+IUjXoUtOmfFZYU=; b=WYHc/oUk7JNxTUUAaVSAVnGMlUhoEVLvs/n0f6oHxfZMJtJHwMDQ7YgEdTp6rGZNZk j7AwtpSKvbuk4AaKWB6g85xu1CboDbIEcjM1zq5sJBVQnLgXwz7pZof8MRkQ0NXVmoQ0 z1XHchMZ80NL1+HxRxGs+L7VV2B6lhObcp1ZlIg/Jcz3Eyvu4lFFBseYuZsrrCMLBtRn n7dBATHhIFJD45JEehgkparGvhYbHXc0sZ4z1/1Ib+F8V9sk+foSk1LBS9StcBNXbSUM QUwruA2GzH2Z9/JmhcNw7Ul4EX5eXsJ+vrN29G7kpB6JP+TYaXfc11q7gutiK9aQCdpt z3lQ== X-Gm-Message-State: AFqh2kpu/s4r4e6ntjlgxErgDyNRUXKoQ/5toDt5HKY5fkHRjeieBJtL xNIa7unEQW3I56ljsX96n481mMHtDCgoDQGu5cE= X-Received: by 2002:a05:6000:1c13:b0:263:56a0:4fde with SMTP id ba19-20020a0560001c1300b0026356a04fdemr3719696wrb.14.1671534205962; Tue, 20 Dec 2022 03:03:25 -0800 (PST) Received: from localhost.localdomain ([81.0.6.76]) by smtp.gmail.com with ESMTPSA id az29-20020adfe19d000000b0024246991121sm12402834wrb.116.2022.12.20.03.03.24 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 20 Dec 2022 03:03:25 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Xiaojuan Yang , Daniel Henrique Barboza , =?utf-8?q?Philippe_Mathieu?= =?utf-8?q?-Daud=C3=A9?= , Greg Kurz , =?utf-8?q?C=C3=A9dric_Le_Goater?= , qemu-ppc@nongnu.org, Peter Maydell , Aurelien Jarno , Song Gao , Jiaxun Yang , David Gibson , Huacai Chen , Aleksandar Rikalo , qemu-arm@nongnu.org, Markus Armbruster , Richard Henderson Subject: [PATCH v2 2/5] target/i386: Restrict 'qapi-commands-machine.h' to system emulation Date: Tue, 20 Dec 2022 12:03:07 +0100 Message-Id: <20221220110310.8656-3-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221220110310.8656-1-philmd@linaro.org> References: <20221220110310.8656-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42f; envelope-from=philmd@linaro.org; helo=mail-wr1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Philippe Mathieu-Daude Since commit a0e61807a3 ("qapi: Remove QMP events and commands from user-mode builds") we don't generate the "qapi-commands-machine.h" header in a user-emulation-only build. Guard qmp_query_cpu_definitions() within CONFIG_USER_ONLY; move x86_cpu_class_check_missing_features() closer since it is only used by this QMP command handler. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/i386/cpu.c | 74 +++++++++++++++++++++++++---------------------- 1 file changed, 39 insertions(+), 35 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index ae502f0bfe..435980dd3a 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -31,11 +31,11 @@ #include "qapi/error.h" #include "qapi/qapi-visit-machine.h" #include "qapi/qmp/qerror.h" -#include "qapi/qapi-commands-machine-target.h" #include "standard-headers/asm-x86/kvm_para.h" #include "hw/qdev-properties.h" #include "hw/i386/topology.h" #ifndef CONFIG_USER_ONLY +#include "qapi/qapi-commands-machine-target.h" #include "exec/address-spaces.h" #include "hw/boards.h" #include "hw/i386/sgx-epc.h" @@ -4713,40 +4713,6 @@ static void x86_cpu_get_unavailable_features(Object *obj, Visitor *v, visit_type_strList(v, "unavailable-features", &result, errp); } -/* Check for missing features that may prevent the CPU class from - * running using the current machine and accelerator. - */ -static void x86_cpu_class_check_missing_features(X86CPUClass *xcc, - strList **list) -{ - strList **tail = list; - X86CPU *xc; - Error *err = NULL; - - if (xcc->host_cpuid_required && !accel_uses_host_cpuid()) { - QAPI_LIST_APPEND(tail, g_strdup("kvm")); - return; - } - - xc = X86_CPU(object_new_with_class(OBJECT_CLASS(xcc))); - - x86_cpu_expand_features(xc, &err); - if (err) { - /* Errors at x86_cpu_expand_features should never happen, - * but in case it does, just report the model as not - * runnable at all using the "type" property. - */ - QAPI_LIST_APPEND(tail, g_strdup("type")); - error_free(err); - } - - x86_cpu_filter_features(xc, false); - - x86_cpu_list_feature_names(xc->filtered_features, tail); - - object_unref(OBJECT(xc)); -} - /* Print all cpuid feature names in featureset */ static void listflags(GList *features) @@ -4875,6 +4841,42 @@ void x86_cpu_list(void) g_list_free(names); } +#ifndef CONFIG_USER_ONLY + +/* Check for missing features that may prevent the CPU class from + * running using the current machine and accelerator. + */ +static void x86_cpu_class_check_missing_features(X86CPUClass *xcc, + strList **list) +{ + strList **tail = list; + X86CPU *xc; + Error *err = NULL; + + if (xcc->host_cpuid_required && !accel_uses_host_cpuid()) { + QAPI_LIST_APPEND(tail, g_strdup("kvm")); + return; + } + + xc = X86_CPU(object_new_with_class(OBJECT_CLASS(xcc))); + + x86_cpu_expand_features(xc, &err); + if (err) { + /* Errors at x86_cpu_expand_features should never happen, + * but in case it does, just report the model as not + * runnable at all using the "type" property. + */ + QAPI_LIST_APPEND(tail, g_strdup("type")); + error_free(err); + } + + x86_cpu_filter_features(xc, false); + + x86_cpu_list_feature_names(xc->filtered_features, tail); + + object_unref(OBJECT(xc)); +} + static void x86_cpu_definition_entry(gpointer data, gpointer user_data) { ObjectClass *oc = data; @@ -4915,6 +4917,8 @@ CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp) return cpu_list; } +#endif /* !CONFIG_USER_ONLY */ + uint64_t x86_cpu_get_supported_feature_word(FeatureWord w, bool migratable_only) { From patchwork Tue Dec 20 11:03:08 2022 Content-Type: text/plain; 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[209.51.188.17]) by mx.google.com with ESMTPS id w26-20020a05620a0e9a00b006fc9629b552si3149155qkm.232.2022.12.20.03.04.50 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 20 Dec 2022 03:04:50 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Q0Cut2wm; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p7aPJ-0000ik-Di; Tue, 20 Dec 2022 06:03:37 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p7aPG-0000hx-VG for qemu-devel@nongnu.org; Tue, 20 Dec 2022 06:03:34 -0500 Received: from mail-wr1-x42b.google.com ([2a00:1450:4864:20::42b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p7aPF-0002HH-1k for qemu-devel@nongnu.org; Tue, 20 Dec 2022 06:03:34 -0500 Received: by mail-wr1-x42b.google.com with SMTP id i7so11353792wrv.8 for ; Tue, 20 Dec 2022 03:03:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=MyQMRgrRRtBuBRaMJJ8Zm89RkSug1TwSfRjxwE6LfEk=; b=Q0Cut2wmR9oBCCzWT5DAOFNRC8FUk6WgBGMlJZpOPD34TpOoUo3oDx0Xwtm2I6dC+s wt51Ptf/FIWQJ8XqLie/exdfPbwkquYWB9tELzDCKeF/a+Q+FwZ0OjGPkIP4UmR+Va4p HfAvUsCF18YsJ6aH+jLLk/0BXsZR0xNN7kkz2fXosSaBIeNCcTX2nLTmmmGih5ikAJ15 Pyo53I8+DJXi45a6Vd82mtowG+5GxRNUsDTaL0+7R1gtOk24t3xdILVT5t5LIXivX6UY 77agTD4GEFosHtK+twOpJ9O8K9tfONhRh8sNdaiq4J5Pe9J++z62vCYiD0o8RHFdQXfM nQJw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=MyQMRgrRRtBuBRaMJJ8Zm89RkSug1TwSfRjxwE6LfEk=; b=ShiPrxpgU5c1OVaRn5+UPJzUWiJ95H1jRBFCjT6aP47JCBWhL/1WnusWdN7R2EVGVr 93sv2f6XUbBwlOWWocp3E1L0pxl9W/iq+6JH9v2jH5fdvuK9BBhlxcT7MdS46jYs+0lb QMkwKrYakopJnDRBFq2FV79z81yqtz5gGiH72YjiJ7Hcfo+NcmfINTMxEvJE2bjIfYaA ngIU6AfC6no/y61/xtIKvjtNGUxjWfm/NZxo/9I9gVu4BDx0vjwKU7qeRtsEkjn4NNGU TNDopZl5PH0tj6cdYTUmHEhQ+p3KNP24B9IFeQXZa5npIEav238ktuxTMZbRqkNV8qKV J+bQ== X-Gm-Message-State: AFqh2ko2hfNT1kryAKKGoyLSXdBixmJpEiDaz/ZrhnJXJKlw6A4rlDSg +3iFbjlsF3HAEryoJ5g+jtf2TmuLbC+qE2kt/fU= X-Received: by 2002:adf:e78d:0:b0:268:2971:465f with SMTP id n13-20020adfe78d000000b002682971465fmr679925wrm.50.1671534211968; Tue, 20 Dec 2022 03:03:31 -0800 (PST) Received: from localhost.localdomain ([81.0.6.76]) by smtp.gmail.com with ESMTPSA id t6-20020a5d4606000000b0022cc0a2cbecsm12248203wrq.15.2022.12.20.03.03.30 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 20 Dec 2022 03:03:31 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Xiaojuan Yang , Daniel Henrique Barboza , =?utf-8?q?Philippe_Mathieu?= =?utf-8?q?-Daud=C3=A9?= , Greg Kurz , =?utf-8?q?C=C3=A9dric_Le_Goater?= , qemu-ppc@nongnu.org, Peter Maydell , Aurelien Jarno , Song Gao , Jiaxun Yang , David Gibson , Huacai Chen , Aleksandar Rikalo , qemu-arm@nongnu.org, Markus Armbruster , Richard Henderson Subject: [PATCH v2 3/5] target/loongarch: Restrict 'qapi-commands-machine.h' to system emulation Date: Tue, 20 Dec 2022 12:03:08 +0100 Message-Id: <20221220110310.8656-4-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221220110310.8656-1-philmd@linaro.org> References: <20221220110310.8656-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42b; envelope-from=philmd@linaro.org; helo=mail-wr1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Since commit a0e61807a3 ("qapi: Remove QMP events and commands from user-mode builds") we don't generate the "qapi-commands-machine.h" header in a user-emulation-only build. Extract the QMP functions from cpu.c (which is always compiled) to the new 'monitor.c' unit (which is only compiled when system emulation is selected). Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/loongarch/cpu.c | 27 -------------------------- target/loongarch/meson.build | 1 + target/loongarch/monitor.c | 37 ++++++++++++++++++++++++++++++++++++ 3 files changed, 38 insertions(+), 27 deletions(-) create mode 100644 target/loongarch/monitor.c diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index e7b0e12be6..0fb853d915 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -12,7 +12,6 @@ #include "qemu/module.h" #include "sysemu/qtest.h" #include "exec/exec-all.h" -#include "qapi/qapi-commands-machine-target.h" #include "cpu.h" #include "internals.h" #include "fpu/softfloat-helpers.h" @@ -744,29 +743,3 @@ static const TypeInfo loongarch_cpu_type_infos[] = { }; DEFINE_TYPES(loongarch_cpu_type_infos) - -static void loongarch_cpu_add_definition(gpointer data, gpointer user_data) -{ - ObjectClass *oc = data; - CpuDefinitionInfoList **cpu_list = user_data; - CpuDefinitionInfo *info = g_new0(CpuDefinitionInfo, 1); - const char *typename = object_class_get_name(oc); - - info->name = g_strndup(typename, - strlen(typename) - strlen("-" TYPE_LOONGARCH_CPU)); - info->q_typename = g_strdup(typename); - - QAPI_LIST_PREPEND(*cpu_list, info); -} - -CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp) -{ - CpuDefinitionInfoList *cpu_list = NULL; - GSList *list; - - list = object_class_get_list(TYPE_LOONGARCH_CPU, false); - g_slist_foreach(list, loongarch_cpu_add_definition, &cpu_list); - g_slist_free(list); - - return cpu_list; -} diff --git a/target/loongarch/meson.build b/target/loongarch/meson.build index 6376f9e84b..48a7eb7c40 100644 --- a/target/loongarch/meson.build +++ b/target/loongarch/meson.build @@ -18,6 +18,7 @@ loongarch_tcg_ss.add(zlib) loongarch_softmmu_ss = ss.source_set() loongarch_softmmu_ss.add(files( 'machine.c', + 'monitor.c', 'tlb_helper.c', 'constant_timer.c', 'csr_helper.c', diff --git a/target/loongarch/monitor.c b/target/loongarch/monitor.c new file mode 100644 index 0000000000..6c25957881 --- /dev/null +++ b/target/loongarch/monitor.c @@ -0,0 +1,37 @@ +/* + * QEMU LoongArch CPU (monitor definitions) + * + * SPDX-FileCopyrightText: 2021 Loongson Technology Corporation Limited + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "qapi/qapi-commands-machine-target.h" +#include "cpu.h" + +static void loongarch_cpu_add_definition(gpointer data, gpointer user_data) +{ + ObjectClass *oc = data; + CpuDefinitionInfoList **cpu_list = user_data; + CpuDefinitionInfo *info = g_new0(CpuDefinitionInfo, 1); + const char *typename = object_class_get_name(oc); + + info->name = g_strndup(typename, + strlen(typename) - strlen("-" TYPE_LOONGARCH_CPU)); + info->q_typename = g_strdup(typename); + + QAPI_LIST_PREPEND(*cpu_list, info); +} + +CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp) +{ + CpuDefinitionInfoList *cpu_list = NULL; + GSList *list; + + list = object_class_get_list(TYPE_LOONGARCH_CPU, false); + g_slist_foreach(list, loongarch_cpu_add_definition, &cpu_list); + g_slist_free(list); + + return cpu_list; +} From patchwork Tue Dec 20 11:03:09 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 635435 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp2847087pvb; Tue, 20 Dec 2022 03:05:52 -0800 (PST) X-Google-Smtp-Source: AA0mqf7SPSewyEntBas9I+e875PCEH1rUzLlHiZD6cutUrBR37eBmujmEzjJHrHjN4nB/A+rlQh7 X-Received: by 2002:a05:6214:5712:b0:4e3:6abf:ddb4 with SMTP id lt18-20020a056214571200b004e36abfddb4mr43937466qvb.23.1671534352311; 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[209.51.188.17]) by mx.google.com with ESMTPS id p12-20020ad45f4c000000b004afb621a445si5346353qvg.75.2022.12.20.03.05.52 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 20 Dec 2022 03:05:52 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=gbZ2ZRjR; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p7aQ2-0000px-JK; Tue, 20 Dec 2022 06:04:24 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p7aPO-0000mQ-EM for qemu-devel@nongnu.org; Tue, 20 Dec 2022 06:03:46 -0500 Received: from mail-wm1-x336.google.com ([2a00:1450:4864:20::336]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p7aPL-0002Lf-UV for qemu-devel@nongnu.org; Tue, 20 Dec 2022 06:03:42 -0500 Received: by mail-wm1-x336.google.com with SMTP id h8-20020a1c2108000000b003d1efd60b65so10860101wmh.0 for ; Tue, 20 Dec 2022 03:03:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=e1KLjwcpkRpHkyHTd4A9nwCZS64HWEF8CTuzylI9ZoM=; b=gbZ2ZRjRDxU6os7yj2g9dkDqR8E1g52fMzrT1PA38XjO9cKwH3Ye6S0nKx4FNHApEn uh8owtikq6QNeqQMamlKot5cDpXBeZkxAIkOa9nuRuB9QX9l2guolCSzEV40KiW9Mlqw vnae0qdb4bUAz5yz6ijDnehl423DTEL+I2qWk3p5lngVkZtTYkV06C5Ux4LYW1W1SaMt HXfoLN8Wi53sNCh0PWA8pW49iXS+ygDXvGtfakrTANEIoXZurOz9WCQX9nA1SOrWErLL erwcIhdfphZdkCdV0AIvAExXJdzh6M/ea/2m/sA8xNU0/E1t38tTSCfIh7GpeuQlckif dvVg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=e1KLjwcpkRpHkyHTd4A9nwCZS64HWEF8CTuzylI9ZoM=; b=Ns+/9ull9JV4/f2PTvMha4TukPW7nqcLumxfGGzFJYCvqYxXR8+NxzdNNu2aiQ1pke NQgYrzKPxaew/yCrhf43GLNZILDnMT/BkOlTCp/WhlR9W3dSkMZzmWL0KdftkrzNX1gH rlEzzulS5mg77KwgcVK4ffI121AuKILyKgzPReI3ruY6GoAi/SWkQYEcLf9/sVzchbBm k1eT9+0GjDw5dZj/yRkkRz04tqYu/xwVtHHxeYgBD6f+ka00uYs0zgLUQpeUCXO7V35P ASSNYLUAVFUgeYJSGsJ5aKEbuQgLLbc0Lw2gxToFiiP1dnL3o4TglNEsHIwTRytBMMUj DMKw== X-Gm-Message-State: ANoB5pnAQw/V9ccDNXt0v1ec8kRhSKV+8UGouwTOWhJU4Jjv9VIkkMVd WamJrmIwVteN4YZVX4D2LuWL/CjrINgAybdgdwU= X-Received: by 2002:a05:600c:538f:b0:3d1:d396:1ade with SMTP id hg15-20020a05600c538f00b003d1d3961ademr35069487wmb.9.1671534218114; Tue, 20 Dec 2022 03:03:38 -0800 (PST) Received: from localhost.localdomain ([81.0.6.76]) by smtp.gmail.com with ESMTPSA id i12-20020a05600c354c00b003cfd64b6be1sm29812398wmq.27.2022.12.20.03.03.36 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 20 Dec 2022 03:03:37 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Xiaojuan Yang , Daniel Henrique Barboza , =?utf-8?q?Philippe_Mathieu?= =?utf-8?q?-Daud=C3=A9?= , Greg Kurz , =?utf-8?q?C=C3=A9dric_Le_Goater?= , qemu-ppc@nongnu.org, Peter Maydell , Aurelien Jarno , Song Gao , Jiaxun Yang , David Gibson , Huacai Chen , Aleksandar Rikalo , qemu-arm@nongnu.org, Markus Armbruster , Richard Henderson Subject: [PATCH v2 4/5] target/mips: Restrict 'qapi-commands-machine.h' to system emulation Date: Tue, 20 Dec 2022 12:03:09 +0100 Message-Id: <20221220110310.8656-5-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221220110310.8656-1-philmd@linaro.org> References: <20221220110310.8656-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::336; envelope-from=philmd@linaro.org; helo=mail-wm1-x336.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Since commit a0e61807a3 ("qapi: Remove QMP events and commands from user-mode builds") we don't generate the "qapi-commands-machine.h" header in a user-emulation-only build. Extract the QMP functions from cpu.c (which is always compiled) to the new 'sysemu/monitor.c' unit (which is only compiled when system emulation is selected). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/mips/cpu.c | 29 ------------------------- target/mips/sysemu/meson.build | 1 + target/mips/sysemu/monitor.c | 39 ++++++++++++++++++++++++++++++++++ 3 files changed, 40 insertions(+), 29 deletions(-) create mode 100644 target/mips/sysemu/monitor.c diff --git a/target/mips/cpu.c b/target/mips/cpu.c index 7a565466cb..7a37123419 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -32,7 +32,6 @@ #include "hw/qdev-properties.h" #include "hw/qdev-clock.h" #include "semihosting/semihost.h" -#include "qapi/qapi-commands-machine-target.h" #include "fpu_helper.h" const char regnames[32][3] = { @@ -627,34 +626,6 @@ static void mips_cpu_register_types(void) type_init(mips_cpu_register_types) -static void mips_cpu_add_definition(gpointer data, gpointer user_data) -{ - ObjectClass *oc = data; - CpuDefinitionInfoList **cpu_list = user_data; - CpuDefinitionInfo *info; - const char *typename; - - typename = object_class_get_name(oc); - info = g_malloc0(sizeof(*info)); - info->name = g_strndup(typename, - strlen(typename) - strlen("-" TYPE_MIPS_CPU)); - info->q_typename = g_strdup(typename); - - QAPI_LIST_PREPEND(*cpu_list, info); -} - -CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp) -{ - CpuDefinitionInfoList *cpu_list = NULL; - GSList *list; - - list = object_class_get_list(TYPE_MIPS_CPU, false); - g_slist_foreach(list, mips_cpu_add_definition, &cpu_list); - g_slist_free(list); - - return cpu_list; -} - /* Could be used by generic CPU object */ MIPSCPU *mips_cpu_create_with_clock(const char *cpu_type, Clock *cpu_refclk) { diff --git a/target/mips/sysemu/meson.build b/target/mips/sysemu/meson.build index cefc227582..0e424c9cc6 100644 --- a/target/mips/sysemu/meson.build +++ b/target/mips/sysemu/meson.build @@ -3,5 +3,6 @@ mips_softmmu_ss.add(files( 'cp0.c', 'cp0_timer.c', 'machine.c', + 'monitor.c', 'physaddr.c', )) diff --git a/target/mips/sysemu/monitor.c b/target/mips/sysemu/monitor.c new file mode 100644 index 0000000000..6db4626412 --- /dev/null +++ b/target/mips/sysemu/monitor.c @@ -0,0 +1,39 @@ +/* + * QEMU MIPS CPU (monitor definitions) + * + * SPDX-FileCopyrightText: 2012 SUSE LINUX Products GmbH + * + * SPDX-License-Identifier: LGPL-2.1-or-later + */ + +#include "qemu/osdep.h" +#include "qapi/qapi-commands-machine-target.h" +#include "cpu.h" + +static void mips_cpu_add_definition(gpointer data, gpointer user_data) +{ + ObjectClass *oc = data; + CpuDefinitionInfoList **cpu_list = user_data; + CpuDefinitionInfo *info; + const char *typename; + + typename = object_class_get_name(oc); + info = g_malloc0(sizeof(*info)); + info->name = g_strndup(typename, + strlen(typename) - strlen("-" TYPE_MIPS_CPU)); + info->q_typename = g_strdup(typename); + + QAPI_LIST_PREPEND(*cpu_list, info); +} + +CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp) +{ + CpuDefinitionInfoList *cpu_list = NULL; + GSList *list; + + list = object_class_get_list(TYPE_MIPS_CPU, false); + g_slist_foreach(list, mips_cpu_add_definition, &cpu_list); + g_slist_free(list); + + return cpu_list; +} From patchwork Tue Dec 20 11:03:10 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 635442 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp2857525pvb; Tue, 20 Dec 2022 03:31:16 -0800 (PST) X-Google-Smtp-Source: AA0mqf6XWFLY11F+fowsNgAxt01k5p4gVQDbF18sifes6k/2WKU1JUMJ5xeZb0w8QG06CVzIMZKa X-Received: by 2002:a0c:fbd1:0:b0:4c7:61a9:ab5c with SMTP id n17-20020a0cfbd1000000b004c761a9ab5cmr59831999qvp.25.1671535876296; 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Move the QMP functions from cpu_init.c (which is always compiled) to monitor.c (which is only compiled when system-emulation is selected). Note ppc_cpu_class_by_name() is used by both file units, so we expose its prototype in "cpu-qom.h". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/ppc/cpu-qom.h | 2 ++ target/ppc/cpu_init.c | 48 +---------------------------------------- target/ppc/monitor.c | 50 ++++++++++++++++++++++++++++++++++++++++++- 3 files changed, 52 insertions(+), 48 deletions(-) diff --git a/target/ppc/cpu-qom.h b/target/ppc/cpu-qom.h index 89ff88f28c..6431c520c8 100644 --- a/target/ppc/cpu-qom.h +++ b/target/ppc/cpu-qom.h @@ -31,6 +31,8 @@ OBJECT_DECLARE_CPU_TYPE(PowerPCCPU, PowerPCCPUClass, POWERPC_CPU) +ObjectClass *ppc_cpu_class_by_name(const char *name); + typedef struct CPUArchState CPUPPCState; typedef struct ppc_tb_t ppc_tb_t; typedef struct ppc_dcr_t ppc_dcr_t; diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index cbf0081374..7858cc4c6c 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -40,7 +40,6 @@ #include "qemu/cutils.h" #include "disas/capstone.h" #include "fpu/softfloat.h" -#include "qapi/qapi-commands-machine-target.h" #include "helper_regs.h" #include "internal.h" @@ -6816,7 +6815,7 @@ static const char *ppc_cpu_lookup_alias(const char *alias) return NULL; } -static ObjectClass *ppc_cpu_class_by_name(const char *name) +ObjectClass *ppc_cpu_class_by_name(const char *name) { char *cpu_model, *typename; ObjectClass *oc; @@ -6956,51 +6955,6 @@ void ppc_cpu_list(void) #endif } -static void ppc_cpu_defs_entry(gpointer data, gpointer user_data) -{ - ObjectClass *oc = data; - CpuDefinitionInfoList **first = user_data; - const char *typename; - CpuDefinitionInfo *info; - - typename = object_class_get_name(oc); - info = g_malloc0(sizeof(*info)); - info->name = g_strndup(typename, - strlen(typename) - strlen(POWERPC_CPU_TYPE_SUFFIX)); - - QAPI_LIST_PREPEND(*first, info); -} - -CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp) -{ - CpuDefinitionInfoList *cpu_list = NULL; - GSList *list; - int i; - - list = object_class_get_list(TYPE_POWERPC_CPU, false); - g_slist_foreach(list, ppc_cpu_defs_entry, &cpu_list); - g_slist_free(list); - - for (i = 0; ppc_cpu_aliases[i].alias != NULL; i++) { - PowerPCCPUAlias *alias = &ppc_cpu_aliases[i]; - ObjectClass *oc; - CpuDefinitionInfo *info; - - oc = ppc_cpu_class_by_name(alias->model); - if (oc == NULL) { - continue; - } - - info = g_malloc0(sizeof(*info)); - info->name = g_strdup(alias->alias); - info->q_typename = g_strdup(object_class_get_name(oc)); - - QAPI_LIST_PREPEND(cpu_list, info); - } - - return cpu_list; -} - static void ppc_cpu_set_pc(CPUState *cs, vaddr value) { PowerPCCPU *cpu = POWERPC_CPU(cs); diff --git a/target/ppc/monitor.c b/target/ppc/monitor.c index 8250b1304e..36e5b5eff8 100644 --- a/target/ppc/monitor.c +++ b/target/ppc/monitor.c @@ -1,5 +1,5 @@ /* - * QEMU monitor + * QEMU PPC (monitor definitions) * * Copyright (c) 2003-2004 Fabrice Bellard * @@ -28,6 +28,9 @@ #include "qemu/ctype.h" #include "monitor/hmp-target.h" #include "monitor/hmp.h" +#include "qapi/qapi-commands-machine-target.h" +#include "cpu-models.h" +#include "cpu-qom.h" static target_long monitor_get_ccr(Monitor *mon, const struct MonitorDef *md, int val) @@ -172,3 +175,48 @@ int target_get_monitor_def(CPUState *cs, const char *name, uint64_t *pval) return -EINVAL; } + +static void ppc_cpu_defs_entry(gpointer data, gpointer user_data) +{ + ObjectClass *oc = data; + CpuDefinitionInfoList **first = user_data; + const char *typename; + CpuDefinitionInfo *info; + + typename = object_class_get_name(oc); + info = g_malloc0(sizeof(*info)); + info->name = g_strndup(typename, + strlen(typename) - strlen(POWERPC_CPU_TYPE_SUFFIX)); + + QAPI_LIST_PREPEND(*first, info); +} + +CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp) +{ + CpuDefinitionInfoList *cpu_list = NULL; + GSList *list; + int i; + + list = object_class_get_list(TYPE_POWERPC_CPU, false); + g_slist_foreach(list, ppc_cpu_defs_entry, &cpu_list); + g_slist_free(list); + + for (i = 0; ppc_cpu_aliases[i].alias != NULL; i++) { + PowerPCCPUAlias *alias = &ppc_cpu_aliases[i]; + ObjectClass *oc; + CpuDefinitionInfo *info; + + oc = ppc_cpu_class_by_name(alias->model); + if (oc == NULL) { + continue; + } + + info = g_malloc0(sizeof(*info)); + info->name = g_strdup(alias->alias); + info->q_typename = g_strdup(object_class_get_name(oc)); + + QAPI_LIST_PREPEND(cpu_list, info); + } + + return cpu_list; +}