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Mon, 19 Dec 2022 06:41:07 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by DM6NAM11FT101.mail.protection.outlook.com (10.13.172.208) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.5924.16 via Frontend Transport; Mon, 19 Dec 2022 06:41:07 +0000 Received: from pyuan-Cloudripper.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Mon, 19 Dec 2022 00:41:03 -0600 From: Perry Yuan To: , , , CC: , , , , , , , , Subject: [PATCH v8 01/13] ACPI: CPPC: Add AMD pstate energy performance preference cppc control Date: Mon, 19 Dec 2022 14:40:30 +0800 Message-ID: <20221219064042.661122-2-perry.yuan@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221219064042.661122-1-perry.yuan@amd.com> References: <20221219064042.661122-1-perry.yuan@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM6NAM11FT101:EE_|BY5PR12MB4034:EE_ X-MS-Office365-Filtering-Correlation-Id: d56afac0-309f-4c98-ad5a-08dae18c0207 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Dec 2022 06:41:07.1293 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d56afac0-309f-4c98-ad5a-08dae18c0207 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT101.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR12MB4034 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Perry Yuan Add support for setting and querying EPP preferences to the generic CPPC driver. This enables downstream drivers such as amd-pstate to discover and use these values Downstream drivers that want to use the new symbols cppc_get_epp_caps and cppc_set_epp_perf for querying and setting EPP preferences will need to call cppc_set_epp_perf to enable the EPP function firstly. Signed-off-by: Perry Yuan --- drivers/acpi/cppc_acpi.c | 76 +++++++++++++++++++++++++++++++++++++--- include/acpi/cppc_acpi.h | 12 +++++++ 2 files changed, 83 insertions(+), 5 deletions(-) diff --git a/drivers/acpi/cppc_acpi.c b/drivers/acpi/cppc_acpi.c index 093675b1a1ff..81081eb899ea 100644 --- a/drivers/acpi/cppc_acpi.c +++ b/drivers/acpi/cppc_acpi.c @@ -1093,6 +1093,9 @@ static int cppc_get_perf(int cpunum, enum cppc_regs reg_idx, u64 *perf) { struct cpc_desc *cpc_desc = per_cpu(cpc_desc_ptr, cpunum); struct cpc_register_resource *reg; + int pcc_ss_id = per_cpu(cpu_pcc_subspace_idx, cpunum); + struct cppc_pcc_data *pcc_ss_data = NULL; + int ret = -EINVAL; if (!cpc_desc) { pr_debug("No CPC descriptor for CPU:%d\n", cpunum); @@ -1102,10 +1105,6 @@ static int cppc_get_perf(int cpunum, enum cppc_regs reg_idx, u64 *perf) reg = &cpc_desc->cpc_regs[reg_idx]; if (CPC_IN_PCC(reg)) { - int pcc_ss_id = per_cpu(cpu_pcc_subspace_idx, cpunum); - struct cppc_pcc_data *pcc_ss_data = NULL; - int ret = 0; - if (pcc_ss_id < 0) return -EIO; @@ -1125,7 +1124,7 @@ static int cppc_get_perf(int cpunum, enum cppc_regs reg_idx, u64 *perf) cpc_read(cpunum, reg, perf); - return 0; + return ret; } /** @@ -1153,6 +1152,19 @@ int cppc_get_nominal_perf(int cpunum, u64 *nominal_perf) return cppc_get_perf(cpunum, NOMINAL_PERF, nominal_perf); } +/** + * cppc_get_epp_perf - Get the epp register value. + * @cpunum: CPU from which to get epp preference value. + * @epp_perf: Return address. + * + * Return: 0 for success, -EIO otherwise. + */ +int cppc_get_epp_perf(int cpunum, u64 *epp_perf) +{ + return cppc_get_perf(cpunum, ENERGY_PERF, epp_perf); +} +EXPORT_SYMBOL_GPL(cppc_get_epp_perf); + /** * cppc_get_perf_caps - Get a CPU's performance capabilities. * @cpunum: CPU from which to get capabilities info. @@ -1365,6 +1377,60 @@ int cppc_get_perf_ctrs(int cpunum, struct cppc_perf_fb_ctrs *perf_fb_ctrs) } EXPORT_SYMBOL_GPL(cppc_get_perf_ctrs); +/* + * Set Energy Performance Preference Register value through + * Performance Controls Interface + */ +int cppc_set_epp_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls, bool enable) +{ + int pcc_ss_id = per_cpu(cpu_pcc_subspace_idx, cpu); + struct cpc_register_resource *epp_set_reg; + struct cpc_register_resource *auto_sel_reg; + struct cpc_desc *cpc_desc = per_cpu(cpc_desc_ptr, cpu); + struct cppc_pcc_data *pcc_ss_data = NULL; + int ret = -EINVAL; + + if (!cpc_desc) { + pr_debug("No CPC descriptor for CPU:%d\n", cpu); + return -ENODEV; + } + + auto_sel_reg = &cpc_desc->cpc_regs[AUTO_SEL_ENABLE]; + epp_set_reg = &cpc_desc->cpc_regs[ENERGY_PERF]; + + if (CPC_IN_PCC(epp_set_reg) || CPC_IN_PCC(auto_sel_reg)) { + if (pcc_ss_id < 0) { + pr_debug("Invalid pcc_ss_id\n"); + return -ENODEV; + } + + if (CPC_SUPPORTED(auto_sel_reg)) { + ret = cpc_write(cpu, auto_sel_reg, enable); + if (ret) + return ret; + } + + if (CPC_SUPPORTED(epp_set_reg)) { + ret = cpc_write(cpu, epp_set_reg, perf_ctrls->energy_perf); + if (ret) + return ret; + } + + pcc_ss_data = pcc_data[pcc_ss_id]; + + down_write(&pcc_ss_data->pcc_lock); + /* after writing CPC, transfer the ownership of PCC to platform */ + ret = send_pcc_cmd(pcc_ss_id, CMD_WRITE); + up_write(&pcc_ss_data->pcc_lock); + } else { + ret = -ENOTSUPP; + pr_debug("_CPC in PCC is not supported\n"); + } + + return ret; +} +EXPORT_SYMBOL_GPL(cppc_set_epp_perf); + /** * cppc_set_enable - Set to enable CPPC on the processor by writing the * Continuous Performance Control package EnableRegister field. diff --git a/include/acpi/cppc_acpi.h b/include/acpi/cppc_acpi.h index c5614444031f..6b487a5bd638 100644 --- a/include/acpi/cppc_acpi.h +++ b/include/acpi/cppc_acpi.h @@ -108,12 +108,14 @@ struct cppc_perf_caps { u32 lowest_nonlinear_perf; u32 lowest_freq; u32 nominal_freq; + u32 energy_perf; }; struct cppc_perf_ctrls { u32 max_perf; u32 min_perf; u32 desired_perf; + u32 energy_perf; }; struct cppc_perf_fb_ctrs { @@ -149,6 +151,8 @@ extern bool cpc_ffh_supported(void); extern bool cpc_supported_by_cpu(void); extern int cpc_read_ffh(int cpunum, struct cpc_reg *reg, u64 *val); extern int cpc_write_ffh(int cpunum, struct cpc_reg *reg, u64 val); +extern int cppc_get_epp_perf(int cpunum, u64 *epp_perf); +extern int cppc_set_epp_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls, bool enable); #else /* !CONFIG_ACPI_CPPC_LIB */ static inline int cppc_get_desired_perf(int cpunum, u64 *desired_perf) { @@ -202,6 +206,14 @@ static inline int cpc_write_ffh(int cpunum, struct cpc_reg *reg, u64 val) { return -ENOTSUPP; } +static inline int cppc_set_epp_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls, bool enable) +{ + return -ENOTSUPP; +} +static inline int cppc_get_epp_perf(int cpunum, u64 *epp_perf) +{ + return -ENOTSUPP; +} #endif /* !CONFIG_ACPI_CPPC_LIB */ #endif /* _CPPC_ACPI_H*/ From patchwork Mon Dec 19 06:40:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Yuan, Perry" X-Patchwork-Id: 635371 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 076D2C4332F for ; Mon, 19 Dec 2022 06:41:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231414AbiLSGl2 (ORCPT ); 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Mon, 19 Dec 2022 00:41:10 -0600 From: Perry Yuan To: , , , CC: , , , , , , , , Subject: [PATCH v8 03/13] cpufreq: intel_pstate: use common macro definition for Energy Preference Performance(EPP) Date: Mon, 19 Dec 2022 14:40:32 +0800 Message-ID: <20221219064042.661122-4-perry.yuan@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221219064042.661122-1-perry.yuan@amd.com> References: <20221219064042.661122-1-perry.yuan@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM6NAM11FT101:EE_|DM4PR12MB6664:EE_ X-MS-Office365-Filtering-Correlation-Id: 28c77821-82d4-4a1f-8c04-08dae18c0657 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: K/YS4Wc1nO4ZuNSqx2ono+2aU1YLIxBKQYFtG538BkTiXlttX9aM2Wmk4Y/Qhoa6QRPc8Le8qhALwO/2/M9eo8Yukvd6nD8+gaW5/WhkupZBCa7vZsJl1BGxcUd7jO149OY0RwolPV4RkpF9Bg0031J68BB2miflyF/V8dU1uq2rCyq3rZp1FnW1Fj0USOlzhFS0pDfMgGyKEdOaEmk4kLtajVm/1Z8Tddlwm1CUKKnhpxSr3HetfZ4KhvJYD1vfd5Iv7agPQgGOYoVbbysqojx6J9jCJCjUXfQLK39XMGQOvTXNJgBkHF7WBekVI1GC2R4rywJeukNRGak1BJQ/IF4PLhuscqe20dazKlU3+HU1RyiV6E2jk5ARsOrGgLmZZ/+bNS1OsFjjT88MAFi0+0Tt0+MFVCaUmMqiKI4kUKlux9BsE8O0BU7Yd9zPOUeOdOcqvrMiBXGJ9rk/33SQBWIXUANOmD/jk8lOxF0SapfFoyH2UCQYLdEE64pD19yrsnGLeZzruhbYsFoHDJWG3ot4dGI7rUAQJ9q/syGXvQFFSJDA4kbX/ns+7kHfqJATWvscpwNrcJm6HUPozpwCJpPVNDGh1Eh9K1VwXhF7cJFhXvTNbw9rzhzsGvbY9Bfhrynb6SrGjVrHteDL/n1zKID+IPeBZN7QLd0s1Q3hMQE3JO4Bv5Bb4x/r2pXYS5UnU9fwCpfdXVjVU4fyzhaDpTpm6BIoo5OExPvjzsDVqZU= X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230022)(4636009)(376002)(396003)(136003)(39860400002)(346002)(451199015)(46966006)(40470700004)(36840700001)(6666004)(54906003)(316002)(110136005)(36860700001)(40480700001)(2906002)(70586007)(70206006)(40460700003)(478600001)(1076003)(47076005)(426003)(86362001)(2616005)(26005)(4326008)(8676002)(16526019)(186003)(36756003)(8936002)(44832011)(81166007)(82740400003)(7696005)(82310400005)(41300700001)(356005)(83380400001)(5660300002)(336012)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Dec 2022 06:41:14.3793 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 28c77821-82d4-4a1f-8c04-08dae18c0657 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT101.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB6664 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org make the energy preference performance strings and profiles using one common header for intel_pstate driver, then the amd_pstate epp driver can use the common header as well. This will simpify the intel_pstate and amd_pstate driver. Signed-off-by: Perry Yuan --- drivers/cpufreq/intel_pstate.c | 13 +++---------- include/linux/cpufreq.h | 11 +++++++++++ 2 files changed, 14 insertions(+), 10 deletions(-) diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c index ad9be31753b6..93a60fdac0fc 100644 --- a/drivers/cpufreq/intel_pstate.c +++ b/drivers/cpufreq/intel_pstate.c @@ -640,15 +640,7 @@ static int intel_pstate_set_epb(int cpu, s16 pref) * 4 power */ -enum energy_perf_value_index { - EPP_INDEX_DEFAULT = 0, - EPP_INDEX_PERFORMANCE, - EPP_INDEX_BALANCE_PERFORMANCE, - EPP_INDEX_BALANCE_POWERSAVE, - EPP_INDEX_POWERSAVE, -}; - -static const char * const energy_perf_strings[] = { +const char * const energy_perf_strings[] = { [EPP_INDEX_DEFAULT] = "default", [EPP_INDEX_PERFORMANCE] = "performance", [EPP_INDEX_BALANCE_PERFORMANCE] = "balance_performance", @@ -656,7 +648,8 @@ static const char * const energy_perf_strings[] = { [EPP_INDEX_POWERSAVE] = "power", NULL }; -static unsigned int epp_values[] = { + +unsigned int epp_values[] = { [EPP_INDEX_DEFAULT] = 0, /* Unused index */ [EPP_INDEX_PERFORMANCE] = HWP_EPP_PERFORMANCE, [EPP_INDEX_BALANCE_PERFORMANCE] = HWP_EPP_BALANCE_PERFORMANCE, diff --git a/include/linux/cpufreq.h b/include/linux/cpufreq.h index d5595d57f4e5..e63309d497fe 100644 --- a/include/linux/cpufreq.h +++ b/include/linux/cpufreq.h @@ -20,6 +20,7 @@ #include #include #include +#include /********************************************************************* * CPUFREQ INTERFACE * @@ -185,6 +186,16 @@ struct cpufreq_freqs { u8 flags; /* flags of cpufreq_driver, see below. */ }; +enum energy_perf_value_index { + EPP_INDEX_DEFAULT = 0, + EPP_INDEX_PERFORMANCE, + EPP_INDEX_BALANCE_PERFORMANCE, + EPP_INDEX_BALANCE_POWERSAVE, + EPP_INDEX_POWERSAVE, +}; +extern const char * const energy_perf_strings[]; +extern unsigned int epp_values[]; + /* Only for ACPI */ #define CPUFREQ_SHARED_TYPE_NONE (0) /* None */ #define CPUFREQ_SHARED_TYPE_HW (1) /* HW does needed coordination */ From patchwork Mon Dec 19 06:40:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Yuan, Perry" X-Patchwork-Id: 635370 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 513D7C10F1B for ; Mon, 19 Dec 2022 06:41:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231442AbiLSGle (ORCPT ); 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Mon, 19 Dec 2022 00:41:14 -0600 From: Perry Yuan To: , , , CC: , , , , , , , , Subject: [PATCH v8 04/13] cpufreq: amd-pstate: fix kernel hang issue while amd-pstate unregistering Date: Mon, 19 Dec 2022 14:40:33 +0800 Message-ID: <20221219064042.661122-5-perry.yuan@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221219064042.661122-1-perry.yuan@amd.com> References: <20221219064042.661122-1-perry.yuan@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM6NAM11FT101:EE_|MN0PR12MB6174:EE_ X-MS-Office365-Filtering-Correlation-Id: 3ccb2026-0b1c-44bc-6b54-08dae18c0847 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: qX856iBrS0kU9lq3g943XpndPLuATzzgrMXbdHCA2pB3f8kMohCHglKDnLTPwzOuAxh6mEx/PXzxaGB+eAB929ZjVpdThWqRyUCigjaL4awd2EApQGHo/fSEANMpU9FSQ/YW+J+8mFhEDNswVSWmHhIgnzlKEhXU6+wv1AccSi2IADv0lRtqZ9/78Bs1Wep0JbuUy0lsVml/84ZvT0fnxjdgueazJCFsI5c5HK5rITV4a23ugD6CIIvbsSRFmFOLXkiAIRXmAIv5+9r/SkAQUgF9laXV87OlZ3j09EMCMluwZ303CzdlVm9hzkhccL7eJljKCmv5bJTpGSrGhHzzRubE8gwfd7OXlGKcxa0Y6stozBQ/vlSsz7Erz2yLCIcoARzAWrZD5xUJ1V+3UhwWrEsgSF4anFaKhXB1WU0uwiBT+t9vXmfQIE/rVmdghUG4BK5Z4Lk1z0Asag8ktb83PcEKNOSFZhAIjxesCzralws5XYBtPFyyye/YhHUixIetYIwLEG23asvP+UMxTnQ+KNbrrYePcVYGxJfs9Tcda8bbouxFwXln8SGwUWV6ZwxkFLBJ4KNYhQTZbHjgAnMBC2m7nok78QdY9VzChLoR267NebzZfDjIXFl0sZd1tB+uaQ5HISap1P2R3FZo6QyrC5rdqkP7Yd8j7FlCY8OVetV78WNtGAu4Ptxw+lAfkWckM6IVOFbdcxfM7RjN1qvLIhun2nDicKdR9Fq8HQCx5cc= X-Forefront-Antispam-Report: CIP:165.204.84.17; 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Therefore, a corresponding call to cpufreq_cpu_put() is needed to decrement the kobject reference count back, it will resolve the kernel hang issue when unregistering the amd-pstate driver and register the `amd_pstate_epp` driver instance. Signed-off-by: Perry Yuan Acked-by: Huang Rui Reviewed-by: Mario Limonciello --- drivers/cpufreq/amd-pstate.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index 204e39006dda..c17bd845f5fc 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -307,6 +307,7 @@ static void amd_pstate_adjust_perf(unsigned int cpu, max_perf = min_perf; amd_pstate_update(cpudata, min_perf, des_perf, max_perf, true); + cpufreq_cpu_put(policy); } static int amd_get_min_freq(struct amd_cpudata *cpudata) From patchwork Mon Dec 19 06:40:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Yuan, Perry" X-Patchwork-Id: 635369 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C4817C10F1B for ; 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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by DM6NAM11FT056.mail.protection.outlook.com (10.13.173.99) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.5924.16 via Frontend Transport; Mon, 19 Dec 2022 06:41:44 +0000 Received: from pyuan-Cloudripper.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Mon, 19 Dec 2022 00:41:40 -0600 From: Perry Yuan To: , , , CC: , , , , , , , , Subject: [PATCH v8 07/13] cpufreq: amd-pstate: implement amd pstate cpu online and offline callback Date: Mon, 19 Dec 2022 14:40:36 +0800 Message-ID: <20221219064042.661122-8-perry.yuan@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221219064042.661122-1-perry.yuan@amd.com> References: <20221219064042.661122-1-perry.yuan@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM6NAM11FT056:EE_|SJ1PR12MB6219:EE_ X-MS-Office365-Filtering-Correlation-Id: 58f1e912-7c53-4708-0fe1-08dae18c187a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Dec 2022 06:41:44.7888 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 58f1e912-7c53-4708-0fe1-08dae18c187a X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT056.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ1PR12MB6219 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Perry Yuan Adds online and offline driver callback support to allow cpu cores go offline and help to restore the previous working states when core goes back online later for EPP driver mode. Reviewed-by: Mario Limonciello Signed-off-by: Perry Yuan Acked-by: Huang Rui --- drivers/cpufreq/amd-pstate.c | 82 ++++++++++++++++++++++++++++++++++++ include/linux/amd-pstate.h | 1 + 2 files changed, 83 insertions(+) diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index 66b39457a312..cb647f55a169 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -1020,6 +1020,86 @@ static int amd_pstate_epp_set_policy(struct cpufreq_policy *policy) return 0; } +static void amd_pstate_epp_reenable(struct amd_cpudata *cpudata) +{ + struct cppc_perf_ctrls perf_ctrls; + u64 value, max_perf; + int ret; + + ret = amd_pstate_enable(true); + if (ret) + pr_err("failed to enable amd pstate during resume, return %d\n", ret); + + value = READ_ONCE(cpudata->cppc_req_cached); + max_perf = READ_ONCE(cpudata->highest_perf); + + if (boot_cpu_has(X86_FEATURE_CPPC)) { + wrmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_REQ, value); + } else { + perf_ctrls.max_perf = max_perf; + perf_ctrls.energy_perf = AMD_CPPC_ENERGY_PERF_PREF(cpudata->epp_cached); + cppc_set_perf(cpudata->cpu, &perf_ctrls); + } +} + +static int amd_pstate_epp_cpu_online(struct cpufreq_policy *policy) +{ + struct amd_cpudata *cpudata = all_cpu_data[policy->cpu]; + + pr_debug("AMD CPU Core %d going online\n", cpudata->cpu); + + if (cppc_state == AMD_PSTATE_ACTIVE) { + amd_pstate_epp_reenable(cpudata); + cpudata->suspended = false; + } + + return 0; +} + +static void amd_pstate_epp_offline(struct cpufreq_policy *policy) +{ + struct amd_cpudata *cpudata = all_cpu_data[policy->cpu]; + struct cppc_perf_ctrls perf_ctrls; + int min_perf; + u64 value; + + min_perf = READ_ONCE(cpudata->lowest_perf); + value = READ_ONCE(cpudata->cppc_req_cached); + + mutex_lock(&amd_pstate_limits_lock); + if (boot_cpu_has(X86_FEATURE_CPPC)) { + cpudata->epp_policy = CPUFREQ_POLICY_UNKNOWN; + + /* Set max perf same as min perf */ + value &= ~AMD_CPPC_MAX_PERF(~0L); + value |= AMD_CPPC_MAX_PERF(min_perf); + value &= ~AMD_CPPC_MIN_PERF(~0L); + value |= AMD_CPPC_MIN_PERF(min_perf); + wrmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_REQ, value); + } else { + perf_ctrls.desired_perf = 0; + perf_ctrls.max_perf = min_perf; + perf_ctrls.energy_perf = AMD_CPPC_ENERGY_PERF_PREF(HWP_EPP_BALANCE_POWERSAVE); + cppc_set_perf(cpudata->cpu, &perf_ctrls); + } + mutex_unlock(&amd_pstate_limits_lock); +} + +static int amd_pstate_epp_cpu_offline(struct cpufreq_policy *policy) +{ + struct amd_cpudata *cpudata = all_cpu_data[policy->cpu]; + + pr_debug("AMD CPU Core %d going offline\n", cpudata->cpu); + + if (cpudata->suspended) + return 0; + + if (cppc_state == AMD_PSTATE_ACTIVE) + amd_pstate_epp_offline(policy); + + return 0; +} + static int amd_pstate_epp_verify_policy(struct cpufreq_policy_data *policy) { cpufreq_verify_within_cpu_limits(policy); @@ -1047,6 +1127,8 @@ static struct cpufreq_driver amd_pstate_epp_driver = { .init = amd_pstate_epp_cpu_init, .exit = amd_pstate_epp_cpu_exit, .update_limits = amd_pstate_epp_update_limits, + .offline = amd_pstate_epp_cpu_offline, + .online = amd_pstate_epp_cpu_online, .name = "amd_pstate_epp", .attr = amd_pstate_epp_attr, }; diff --git a/include/linux/amd-pstate.h b/include/linux/amd-pstate.h index fe1aef743c09..1424b09ef543 100644 --- a/include/linux/amd-pstate.h +++ b/include/linux/amd-pstate.h @@ -82,6 +82,7 @@ struct amd_cpudata { s16 epp_cached; u32 policy; u64 cppc_cap1_cached; + bool suspended; }; /** From patchwork Mon Dec 19 06:40:38 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Yuan, Perry" X-Patchwork-Id: 635368 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 793BDC4332F for ; Mon, 19 Dec 2022 06:43:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231465AbiLSGnL (ORCPT ); Mon, 19 Dec 2022 01:43:11 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48760 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231459AbiLSGmd (ORCPT ); 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Mon, 19 Dec 2022 00:41:48 -0600 From: Perry Yuan To: , , , CC: , , , , , , , , Subject: [PATCH v8 09/13] cpufreq: amd-pstate: add driver working mode switch support Date: Mon, 19 Dec 2022 14:40:38 +0800 Message-ID: <20221219064042.661122-10-perry.yuan@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221219064042.661122-1-perry.yuan@amd.com> References: <20221219064042.661122-1-perry.yuan@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM6NAM11FT050:EE_|SA1PR12MB7245:EE_ X-MS-Office365-Filtering-Correlation-Id: dfde6600-fa56-4c48-18f9-08dae18c1c7d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: r5clV4acaRKPaC3eabGYYwYkwOfU+ovsC9HSRf8m6YMqkm5ORLkZyi7fs1BSV6nPj1ALP3cXgdV2sFXPe6EkLjTNyv4J0g2pNKBlWSGH2xqVnF+ao0Rq4DC2mSo6LM+Q4Q5GnNGxyFieFlhS1J4QFa+bcCteqhIJcY+6UDH/+IIxYp8PGygAbpmb5lUthT5otzhPZ9JWQL33lKeHClUFkiWw4JPiCYjDTuxMzRkEp5Xq+AYJEZAeq/on6ZA9NvO04rAR/o9KvK8YAvB7oEObHKknMHISDBezyeShwCmLJaB86QcNrOV3Da0kHA/KZwgze5BCD+7nwmGL+Woy4P+Djc4r3CWajp5ikFkEE4FnkTCnHUscmCYdBeSn08b8bfv4+ralv7nxB3GumRAs1i+/+txrA5eT/1buStzHB123T5OYXGiDdRQ78f36rZAXhmoSf46dJ2T6oWpm3tMVO+qX9g8hG49KM2UOxWpqZyiQLVLNMHDHQ8QjSmnZsLWdrOkaIIP8kikJj7BxY/PEa7CVnHL674J0U96BnLTnwzQLk64UyjXc2RQD6p2vUCsHhs2ySjSKXNsdVWgCUJDXHZQVt5tEXympElLeoWwU+z0FqV1GZ02VSL27MWHEf+1fnaNupJXBiC9zadjtQA1kAIFpYY93aeGqoO+eoRkMUK7NPpUM0LmQIBGip6H1Sx09FxqC2lOtHxTjkR358RJYXw91l146m4Vxhv5gqUQOaUgx30w= X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230022)(4636009)(346002)(39860400002)(136003)(376002)(396003)(451199015)(46966006)(40470700004)(36840700001)(70586007)(70206006)(40460700003)(86362001)(8676002)(4326008)(316002)(5660300002)(36756003)(8936002)(2616005)(41300700001)(1076003)(82310400005)(7696005)(16526019)(6666004)(186003)(36860700001)(26005)(83380400001)(426003)(336012)(47076005)(356005)(54906003)(40480700001)(82740400003)(81166007)(110136005)(478600001)(44832011)(2906002)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Dec 2022 06:41:51.5196 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: dfde6600-fa56-4c48-18f9-08dae18c1c7d X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT050.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB7245 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Perry Yuan While amd-pstate driver was loaded with specific driver mode, it will need to check which mode is enabled for the pstate driver,add this sysfs entry to show the current status $ cat /sys/devices/system/cpu/amd-pstate/status active Meanwhile, user can switch the pstate driver mode with writing mode string to sysfs entry as below. Enable passive mode: $ sudo bash -c "echo passive > /sys/devices/system/cpu/amd-pstate/status" Enable active mode (EPP driver mode): $ sudo bash -c "echo active > /sys/devices/system/cpu/amd-pstate/status" Signed-off-by: Perry Yuan --- drivers/cpufreq/amd-pstate.c | 128 +++++++++++++++++++++++++++++++++++ 1 file changed, 128 insertions(+) diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index fc12d35bc7bd..e8996e937e63 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -64,6 +64,7 @@ static struct cpufreq_driver amd_pstate_driver; static struct cpufreq_driver amd_pstate_epp_driver; static struct amd_cpudata **all_cpu_data; static int cppc_state = AMD_PSTATE_DISABLE; +struct kobject *amd_pstate_kobj; static inline int get_mode_idx_from_str(const char *str, size_t size) { @@ -90,6 +91,8 @@ static struct amd_pstate_params global_params; static DEFINE_MUTEX(amd_pstate_limits_lock); static DEFINE_MUTEX(amd_pstate_driver_lock); +static DEFINE_SPINLOCK(cppc_notify_lock); + static s16 amd_pstate_get_epp(struct amd_cpudata *cpudata, u64 cppc_req_cached) { u64 epp; @@ -644,6 +647,8 @@ static int amd_pstate_cpu_init(struct cpufreq_policy *policy) policy->driver_data = cpudata; amd_pstate_boost_init(cpudata); + if (!default_pstate_driver->adjust_perf) + default_pstate_driver->adjust_perf = amd_pstate_adjust_perf; return 0; @@ -784,12 +789,106 @@ static ssize_t show_energy_performance_preference( return sysfs_emit(buf, "%s\n", energy_perf_strings[preference]); } +static ssize_t amd_pstate_show_status(char *buf) +{ + if (!default_pstate_driver) + return sysfs_emit(buf, "off\n"); + + return sysfs_emit(buf, "%s\n", default_pstate_driver == &amd_pstate_epp_driver ? + "active" : "passive"); +} + +static void amd_pstate_driver_cleanup(void) +{ + unsigned int cpu; + + cpus_read_lock(); + for_each_online_cpu(cpu) { + if (all_cpu_data[cpu]) { + spin_lock(&cppc_notify_lock); + kfree(all_cpu_data[cpu]); + WRITE_ONCE(all_cpu_data[cpu], NULL); + spin_unlock(&cppc_notify_lock); + } + } + cpus_read_unlock(); + + default_pstate_driver = NULL; +} + +static int amd_pstate_update_status(const char *buf, size_t size) +{ + if (size == 3 && !strncmp(buf, "off", size)) { + if (!default_pstate_driver) + return -EINVAL; + + if (cppc_state == AMD_PSTATE_ACTIVE) + return -EBUSY; + + cpufreq_unregister_driver(default_pstate_driver); + amd_pstate_driver_cleanup(); + return 0; + } + + if (size == 6 && !strncmp(buf, "active", size)) { + if (default_pstate_driver) { + if (default_pstate_driver == &amd_pstate_epp_driver) + return 0; + cpufreq_unregister_driver(default_pstate_driver); + default_pstate_driver = &amd_pstate_epp_driver; + cppc_state = AMD_PSTATE_ACTIVE; + } + + return cpufreq_register_driver(default_pstate_driver); + } + + if (size == 7 && !strncmp(buf, "passive", size)) { + if (default_pstate_driver) { + if (default_pstate_driver == &amd_pstate_driver) + return 0; + cpufreq_unregister_driver(default_pstate_driver); + cppc_state = AMD_PSTATE_PASSIVE; + default_pstate_driver = &amd_pstate_driver; + } + + return cpufreq_register_driver(default_pstate_driver); + } + + return -EINVAL; +} + +static ssize_t show_status(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +{ + ssize_t ret; + + mutex_lock(&amd_pstate_driver_lock); + ret = amd_pstate_show_status(buf); + mutex_unlock(&amd_pstate_driver_lock); + + return ret; +} + +static ssize_t store_status(struct kobject *a, struct kobj_attribute *b, + const char *buf, size_t count) +{ + char *p = memchr(buf, '\n', count); + int ret; + + mutex_lock(&amd_pstate_driver_lock); + ret = amd_pstate_update_status(buf, p ? p - buf : count); + mutex_unlock(&amd_pstate_driver_lock); + + return ret < 0 ? ret : count; +} + cpufreq_freq_attr_ro(amd_pstate_max_freq); cpufreq_freq_attr_ro(amd_pstate_lowest_nonlinear_freq); cpufreq_freq_attr_ro(amd_pstate_highest_perf); cpufreq_freq_attr_rw(energy_performance_preference); cpufreq_freq_attr_ro(energy_performance_available_preferences); +define_one_global_rw(status); static struct freq_attr *amd_pstate_attr[] = { &amd_pstate_max_freq, @@ -807,6 +906,15 @@ static struct freq_attr *amd_pstate_epp_attr[] = { NULL, }; +static struct attribute *pstate_global_attributes[] = { + &status.attr, + NULL +}; + +static const struct attribute_group amd_pstate_global_attr_group = { + .attrs = pstate_global_attributes, +}; + static inline void update_boost_state(void) { u64 misc_en; @@ -1228,6 +1336,26 @@ static int __init amd_pstate_init(void) if (ret) pr_err("failed to register with return %d\n", ret); + amd_pstate_kobj = kobject_create_and_add("amd-pstate", &cpu_subsys.dev_root->kobj); + if (!amd_pstate_kobj) { + ret = -EINVAL; + pr_err("global sysfs registration failed.\n"); + goto kobject_free; + } + + ret = sysfs_create_group(amd_pstate_kobj, &amd_pstate_global_attr_group); + if (ret) { + pr_err("sysfs attribute export failed with error %d.\n", ret); + goto global_attr_free; + } + + return ret; + +global_attr_free: + kobject_put(amd_pstate_kobj); +kobject_free: + kfree(cpudata); + cpufreq_unregister_driver(default_pstate_driver); return ret; } device_initcall(amd_pstate_init); From patchwork Mon Dec 19 06:40:40 2022 Content-Type: text/plain; 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Mon, 19 Dec 2022 06:42:24 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by DM6NAM11FT084.mail.protection.outlook.com (10.13.172.132) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.5924.16 via Frontend Transport; Mon, 19 Dec 2022 06:42:24 +0000 Received: from pyuan-Cloudripper.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Mon, 19 Dec 2022 00:41:54 -0600 From: Perry Yuan To: , , , CC: , , , , , , , , Subject: [PATCH v8 11/13] Documentation: introduce amd pstate active mode kernel command line options Date: Mon, 19 Dec 2022 14:40:40 +0800 Message-ID: <20221219064042.661122-12-perry.yuan@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221219064042.661122-1-perry.yuan@amd.com> References: <20221219064042.661122-1-perry.yuan@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM6NAM11FT084:EE_|MN2PR12MB4222:EE_ X-MS-Office365-Filtering-Correlation-Id: 3508d86c-3934-4fa4-ec25-08dae18c2fe6 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Dec 2022 06:42:24.0899 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3508d86c-3934-4fa4-ec25-08dae18c2fe6 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT084.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4222 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org AMD Pstate driver support another firmware based autonomous mode with "amd_pstate=active" added to the kernel command line. In autonomous mode SMU firmware decides frequencies at 1 ms timescale based on workload utilization, usage in other IPs, infrastructure limits such as power, thermals and so on. Signed-off-by: Perry Yuan --- Documentation/admin-guide/kernel-parameters.txt | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index 42af9ca0127e..73a02816f6f8 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -6970,3 +6970,10 @@ management firmware translates the requests into actual hardware states (core frequency, data fabric and memory clocks etc.) + active + Use amd_pstate_epp driver instance as the scaling driver, + driver provides a hint to the hardware if software wants + to bias toward performance (0x0) or energy efficiency (0xff) + to the CPPC firmware. then CPPC power algorithm will + calculate the runtime workload and adjust the realtime cores + frequency. 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Mon, 19 Dec 2022 06:42:28 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by DM6NAM11FT088.mail.protection.outlook.com (10.13.172.147) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.5924.16 via Frontend Transport; Mon, 19 Dec 2022 06:42:28 +0000 Received: from pyuan-Cloudripper.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Mon, 19 Dec 2022 00:42:24 -0600 From: Perry Yuan To: , , , CC: , , , , , , , , Subject: [PATCH v8 12/13] cpufreq: amd-pstate: convert sprintf with sysfs_emit() Date: Mon, 19 Dec 2022 14:40:41 +0800 Message-ID: <20221219064042.661122-13-perry.yuan@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221219064042.661122-1-perry.yuan@amd.com> References: <20221219064042.661122-1-perry.yuan@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM6NAM11FT088:EE_|CH2PR12MB4230:EE_ X-MS-Office365-Filtering-Correlation-Id: 46896717-ff0d-4c4d-e725-08dae18c325f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Dec 2022 06:42:28.2538 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 46896717-ff0d-4c4d-e725-08dae18c325f X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT088.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR12MB4230 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org replace the sprintf with a more generic sysfs_emit function No potential function impact Signed-off-by: Perry Yuan Reviewed-by: Mario Limonciello Acked-by: Huang Rui --- drivers/cpufreq/amd-pstate.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index e8996e937e63..d8b182614c18 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -709,7 +709,7 @@ static ssize_t show_amd_pstate_max_freq(struct cpufreq_policy *policy, if (max_freq < 0) return max_freq; - return sprintf(&buf[0], "%u\n", max_freq); + return sysfs_emit(buf, "%u\n", max_freq); } static ssize_t show_amd_pstate_lowest_nonlinear_freq(struct cpufreq_policy *policy, @@ -722,7 +722,7 @@ static ssize_t show_amd_pstate_lowest_nonlinear_freq(struct cpufreq_policy *poli if (freq < 0) return freq; - return sprintf(&buf[0], "%u\n", freq); + return sysfs_emit(buf, "%u\n", freq); } /* @@ -737,7 +737,7 @@ static ssize_t show_amd_pstate_highest_perf(struct cpufreq_policy *policy, perf = READ_ONCE(cpudata->highest_perf); - return sprintf(&buf[0], "%u\n", perf); + return sysfs_emit(buf, "%u\n", perf); } static ssize_t show_energy_performance_available_preferences(