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[209.51.188.17]) by mx.google.com with ESMTPS id cc13-20020a05622a410d00b003a97e804cfesi2959477qtb.528.2022.12.19.13.11.25 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 19 Dec 2022 13:11:25 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=jVxdFmHR; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p7NPM-0002tC-JI; Mon, 19 Dec 2022 16:10:48 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p7NPL-0002sZ-0Q for qemu-devel@nongnu.org; Mon, 19 Dec 2022 16:10:47 -0500 Received: from mail-ej1-x634.google.com ([2a00:1450:4864:20::634]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p7NPJ-0003uQ-EC for qemu-devel@nongnu.org; Mon, 19 Dec 2022 16:10:46 -0500 Received: by mail-ej1-x634.google.com with SMTP id ud5so24650447ejc.4 for ; Mon, 19 Dec 2022 13:10:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=JEs3SkvAJGEbyxdlsDJ5PBeYdVgPsoeB7mLoefSjUU0=; b=jVxdFmHRr7sYE4xUWv6hYW+u+Mgnp8ZK9nIV0/Jtiyxi95mkPPZPO+oraA5zW0EMO9 iy6cEqaAKs+EuL9p9U9A6nKTu0CJJbgcQNqq3GY++nmroiikBM4MUYd76He43EkFAxHm b5yY1urKu9alCUQv5mqCTR/WCIzwcHNnOhDOn20UkM9O1BA8Hy8mVWyM/GW0uQARcz0V YC6kekt+8BWZMbGy0pSLL3+bJQtOZF1Pf1BAcNZKT5eoRAWBz5E/EFuHHqzBnLgjpTUa LFyq+C/wUIy0ObQFWy5RNQ0G1R8AwZ25oUFHEfQSetlDS4X0f3X/qHOBblAUS6crhHF+ saSQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=JEs3SkvAJGEbyxdlsDJ5PBeYdVgPsoeB7mLoefSjUU0=; b=jnLLMQBInU8RzmB/fcicvJBka8ATkwSibYANPjGCoahGo2cRS/NvgpK4ycs5WpGPKK 76QxOR4aEleR5oO6s6Usbg2/ya18WgnOaj5246mRnVkcSOoNUBxu7e1gVqiKDhnV5xIn g31ANpeq5lhdImGIIiVYBFgr3kMeFSZJyYvV8p21k2OsKBNdBjeJQIqBi9VhixnSdDz2 VwJ7gxMnt93SIhr/AJRmGNq0kIRqD+2KzF4asJ9E7Ji5MeAz3YISbrTwm4r7ZvSNRBof edCORlvV3jD7FxHvvZf0T9liVodNgZRQKsyV+qtp7DM+dm744znpE87X1QMDnGSi2zUo 3NTg== X-Gm-Message-State: ANoB5pktKG0svGUAwJtnpK3XfPHHAjYa/rgikAWoXQkKkHgRsBhdoqvz FQBMmIeVU1svOYMWTNzjAhEQKvRayS3a8o/XhVg= X-Received: by 2002:a17:907:2a04:b0:7c4:f752:e95c with SMTP id fd4-20020a1709072a0400b007c4f752e95cmr17699393ejc.1.1671484243566; Mon, 19 Dec 2022 13:10:43 -0800 (PST) Received: from localhost.localdomain ([185.126.107.38]) by smtp.gmail.com with ESMTPSA id r18-20020a17090609d200b007be301a1d51sm4780469eje.211.2022.12.19.13.10.41 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 19 Dec 2022 13:10:43 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Markus Armbruster , Huacai Chen , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , qemu-arm@nongnu.org, Xiaojuan Yang , Daniel Henrique Barboza , Aleksandar Rikalo , Aurelien Jarno , Peter Maydell , David Gibson , qemu-ppc@nongnu.org, =?utf-8?q?C=C3=A9dric_Le_Goater?= , Jiaxun Yang , Greg Kurz , Song Gao Subject: [PATCH 1/4] target/arm: Restrict 'qapi-commands-machine.h' to system emulation Date: Mon, 19 Dec 2022 22:10:31 +0100 Message-Id: <20221219211034.70491-2-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221219211034.70491-1-philmd@linaro.org> References: <20221219211034.70491-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::634; envelope-from=philmd@linaro.org; helo=mail-ej1-x634.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Since commit a0e61807a3 ("qapi: Remove QMP events and commands from user-mode builds") we don't generate the "qapi-commands-machine.h" header in a user-emulation-only build. Move the QMP functions from helper.c (which is always compiled) to monitor.c (which is only compiled when system-emulation is selected). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/arm/helper.c | 29 ----------------------------- target/arm/m_helper.c | 1 - target/arm/monitor.c | 28 ++++++++++++++++++++++++++++ 3 files changed, 28 insertions(+), 30 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index bac2ea62c4..399603b680 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -27,7 +27,6 @@ #include "sysemu/cpu-timers.h" #include "sysemu/kvm.h" #include "qemu/range.h" -#include "qapi/qapi-commands-machine-target.h" #include "qapi/error.h" #include "qemu/guest-random.h" #ifdef CONFIG_TCG @@ -8514,34 +8513,6 @@ void arm_cpu_list(void) g_slist_free(list); } -static void arm_cpu_add_definition(gpointer data, gpointer user_data) -{ - ObjectClass *oc = data; - CpuDefinitionInfoList **cpu_list = user_data; - CpuDefinitionInfo *info; - const char *typename; - - typename = object_class_get_name(oc); - info = g_malloc0(sizeof(*info)); - info->name = g_strndup(typename, - strlen(typename) - strlen("-" TYPE_ARM_CPU)); - info->q_typename = g_strdup(typename); - - QAPI_LIST_PREPEND(*cpu_list, info); -} - -CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp) -{ - CpuDefinitionInfoList *cpu_list = NULL; - GSList *list; - - list = object_class_get_list(TYPE_ARM_CPU, false); - g_slist_foreach(list, arm_cpu_add_definition, &cpu_list); - g_slist_free(list); - - return cpu_list; -} - /* * Private utility function for define_one_arm_cp_reg_with_opaque(): * add a single reginfo struct to the hash table. diff --git a/target/arm/m_helper.c b/target/arm/m_helper.c index 355cd4d60a..11008528b5 100644 --- a/target/arm/m_helper.c +++ b/target/arm/m_helper.c @@ -26,7 +26,6 @@ #include "sysemu/cpus.h" #include "sysemu/kvm.h" #include "qemu/range.h" -#include "qapi/qapi-commands-machine-target.h" #include "qapi/error.h" #include "qemu/guest-random.h" #ifdef CONFIG_TCG diff --git a/target/arm/monitor.c b/target/arm/monitor.c index ecdd5ee817..c8fa524002 100644 --- a/target/arm/monitor.c +++ b/target/arm/monitor.c @@ -227,3 +227,31 @@ CpuModelExpansionInfo *qmp_query_cpu_model_expansion(CpuModelExpansionType type, return expansion_info; } + +static void arm_cpu_add_definition(gpointer data, gpointer user_data) +{ + ObjectClass *oc = data; + CpuDefinitionInfoList **cpu_list = user_data; + CpuDefinitionInfo *info; + const char *typename; + + typename = object_class_get_name(oc); + info = g_malloc0(sizeof(*info)); + info->name = g_strndup(typename, + strlen(typename) - strlen("-" TYPE_ARM_CPU)); + info->q_typename = g_strdup(typename); + + QAPI_LIST_PREPEND(*cpu_list, info); +} + +CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp) +{ + CpuDefinitionInfoList *cpu_list = NULL; + GSList *list; + + list = object_class_get_list(TYPE_ARM_CPU, false); + g_slist_foreach(list, arm_cpu_add_definition, &cpu_list); + g_slist_free(list); + + return cpu_list; +} From patchwork Mon Dec 19 21:10:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 635127 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp2562880pvb; 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[209.51.188.17]) by mx.google.com with ESMTPS id y2-20020a05620a44c200b006ffdc3b9b81si4528062qkp.619.2022.12.19.13.11.45 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 19 Dec 2022 13:11:45 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=cl1IRxf2; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p7NPT-0002yn-DQ; Mon, 19 Dec 2022 16:10:55 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p7NPS-0002y7-D3 for qemu-devel@nongnu.org; Mon, 19 Dec 2022 16:10:54 -0500 Received: from mail-ej1-x62c.google.com ([2a00:1450:4864:20::62c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p7NPP-0003y0-II for qemu-devel@nongnu.org; Mon, 19 Dec 2022 16:10:54 -0500 Received: by mail-ej1-x62c.google.com with SMTP id t17so24691002eju.1 for ; Mon, 19 Dec 2022 13:10:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=NPkoqq4yf4wnku5ZZhretEonRdVE00oWaMYivRhv1Lc=; b=cl1IRxf2aZNF6cSKl6kq2ornlqku0N+On0HaoV6gdYdhBG4WCgbbSx1FQj6i8vXIr0 Fx23Mu+0qCXaaoHP9Xto80h523UKT+UJToSeqtqoCzH+fHdIvh5OWBSvB02z9cQSiRo4 OhS9ESIgDVVWGmq10qzuRRzWvX3VCJYY5dFrMO+yyWIKdQzZHrx0pFJj6cPUxfKg5SgR fJa+CsSlqprRs2QLfnLLuWBzVwxWl7D3zaipfE199FA8BKTXu56d+eLGn7fslWh/VkDb kyboVZxijyCbgAoD0cCTBZcsJflgUBntGEP56fe5YHY+BjLT0sCmCBGoGMR+ZtgoRXIp bq4w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=NPkoqq4yf4wnku5ZZhretEonRdVE00oWaMYivRhv1Lc=; b=5Sbqn91CJUpp9RKemhW1AuM+7ZnzRcdw12Yiirj6hra2EhS2N0K/sJ0sQkro8zINJp Wy8zDCHOgW1TwZIUUvnpxJKLYukKvFIRtjbMZ0HW/WneKYIYV/yzh69j11SV3jRQ4Tus 42sV8zwXAyVPKt+zR/+7JiP6MoHbKTHF++8TgVto5Yp4pnGWtYcNkwPJN18i3/nsoY3M 7HptgU32nja+yF7X98f1V5GXFeM0Ya/emTZ6i9qtd/3/aJrPdzr03B21zKSqBhJGOMeY WYiq3NWJGlBCZBcTwmgVxtZmV4PD8SkV8v8QaFdp2gUvi5xCtw4IY3/sRxN/2CoaTxtj DLEQ== X-Gm-Message-State: AFqh2kqAaTz+AiHDY3YVfD4WVdNe17DiXQhFMJQnZihTjmxrwdtV094R 9v7XwBEpi/p4dTyJ8SrM+GiTbHr21wXzFGa7Kp8= X-Received: by 2002:a17:906:49d2:b0:7b9:f9d8:9554 with SMTP id w18-20020a17090649d200b007b9f9d89554mr13333669ejv.40.1671484249785; Mon, 19 Dec 2022 13:10:49 -0800 (PST) Received: from localhost.localdomain ([185.126.107.38]) by smtp.gmail.com with ESMTPSA id 3-20020a170906318300b00782ee6b34f2sm4816535ejy.183.2022.12.19.13.10.47 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 19 Dec 2022 13:10:49 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Markus Armbruster , Huacai Chen , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , qemu-arm@nongnu.org, Xiaojuan Yang , Daniel Henrique Barboza , Aleksandar Rikalo , Aurelien Jarno , Peter Maydell , David Gibson , qemu-ppc@nongnu.org, =?utf-8?q?C=C3=A9dric_Le_Goater?= , Jiaxun Yang , Greg Kurz , Song Gao Subject: [PATCH 2/4] target/loongarch: Restrict 'qapi-commands-machine.h' to system emulation Date: Mon, 19 Dec 2022 22:10:32 +0100 Message-Id: <20221219211034.70491-3-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221219211034.70491-1-philmd@linaro.org> References: <20221219211034.70491-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62c; envelope-from=philmd@linaro.org; helo=mail-ej1-x62c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Since commit a0e61807a3 ("qapi: Remove QMP events and commands from user-mode builds") we don't generate the "qapi-commands-machine.h" header in a user-emulation-only build. Extract the QMP functions from cpu.c (which is always compiled) to the new 'cpu-monitor.c' unit (which is only compiled when system emulation is selected). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/loongarch/cpu-monitor.c | 37 ++++++++++++++++++++++++++++++++++ target/loongarch/cpu.c | 27 ------------------------- target/loongarch/meson.build | 1 + 3 files changed, 38 insertions(+), 27 deletions(-) create mode 100644 target/loongarch/cpu-monitor.c diff --git a/target/loongarch/cpu-monitor.c b/target/loongarch/cpu-monitor.c new file mode 100644 index 0000000000..6c25957881 --- /dev/null +++ b/target/loongarch/cpu-monitor.c @@ -0,0 +1,37 @@ +/* + * QEMU LoongArch CPU (monitor definitions) + * + * SPDX-FileCopyrightText: 2021 Loongson Technology Corporation Limited + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "qapi/qapi-commands-machine-target.h" +#include "cpu.h" + +static void loongarch_cpu_add_definition(gpointer data, gpointer user_data) +{ + ObjectClass *oc = data; + CpuDefinitionInfoList **cpu_list = user_data; + CpuDefinitionInfo *info = g_new0(CpuDefinitionInfo, 1); + const char *typename = object_class_get_name(oc); + + info->name = g_strndup(typename, + strlen(typename) - strlen("-" TYPE_LOONGARCH_CPU)); + info->q_typename = g_strdup(typename); + + QAPI_LIST_PREPEND(*cpu_list, info); +} + +CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp) +{ + CpuDefinitionInfoList *cpu_list = NULL; + GSList *list; + + list = object_class_get_list(TYPE_LOONGARCH_CPU, false); + g_slist_foreach(list, loongarch_cpu_add_definition, &cpu_list); + g_slist_free(list); + + return cpu_list; +} diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index e7b0e12be6..0fb853d915 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -12,7 +12,6 @@ #include "qemu/module.h" #include "sysemu/qtest.h" #include "exec/exec-all.h" -#include "qapi/qapi-commands-machine-target.h" #include "cpu.h" #include "internals.h" #include "fpu/softfloat-helpers.h" @@ -744,29 +743,3 @@ static const TypeInfo loongarch_cpu_type_infos[] = { }; DEFINE_TYPES(loongarch_cpu_type_infos) - -static void loongarch_cpu_add_definition(gpointer data, gpointer user_data) -{ - ObjectClass *oc = data; - CpuDefinitionInfoList **cpu_list = user_data; - CpuDefinitionInfo *info = g_new0(CpuDefinitionInfo, 1); - const char *typename = object_class_get_name(oc); - - info->name = g_strndup(typename, - strlen(typename) - strlen("-" TYPE_LOONGARCH_CPU)); - info->q_typename = g_strdup(typename); - - QAPI_LIST_PREPEND(*cpu_list, info); -} - -CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp) -{ - CpuDefinitionInfoList *cpu_list = NULL; - GSList *list; - - list = object_class_get_list(TYPE_LOONGARCH_CPU, false); - g_slist_foreach(list, loongarch_cpu_add_definition, &cpu_list); - g_slist_free(list); - - return cpu_list; -} diff --git a/target/loongarch/meson.build b/target/loongarch/meson.build index 6376f9e84b..dfd65ae742 100644 --- a/target/loongarch/meson.build +++ b/target/loongarch/meson.build @@ -17,6 +17,7 @@ loongarch_tcg_ss.add(zlib) loongarch_softmmu_ss = ss.source_set() loongarch_softmmu_ss.add(files( + 'cpu-monitor.c', 'machine.c', 'tlb_helper.c', 'constant_timer.c', From patchwork Mon Dec 19 21:10:33 2022 Content-Type: text/plain; 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[209.51.188.17]) by mx.google.com with ESMTPS id kf10-20020a056214524a00b004c7528af8b6si4072127qvb.517.2022.12.19.13.12.34 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 19 Dec 2022 13:12:34 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=bwWRwVNh; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p7NPZ-000305-6I; Mon, 19 Dec 2022 16:11:01 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p7NPX-0002zO-3l for qemu-devel@nongnu.org; Mon, 19 Dec 2022 16:10:59 -0500 Received: from mail-ed1-x533.google.com ([2a00:1450:4864:20::533]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p7NPV-0003sZ-CF for qemu-devel@nongnu.org; Mon, 19 Dec 2022 16:10:58 -0500 Received: by mail-ed1-x533.google.com with SMTP id d20so14836810edn.0 for ; Mon, 19 Dec 2022 13:10:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=fo8+Ahgs2QuUhudL1bZYU1hHDGowGkitN9gc7X0zF9w=; b=bwWRwVNh2H7W4miRdmLssxNZTL/y1dZLH6m5SYn9FpC44e28GsvLhRY1ssiC3mHCB+ ZPZI/qTcfD6joEfptKsF6ndj1LtzAfH5a2hg6sgk6YBU/f5OPfWFdDvRe5GE0+BhmiOz qhjI/mOnAKCiT8duygu4gtutG47OAoWhXqx+KzT3HYLsJk5VMn+iZ+oGYLEUJl9XkpVI +hU9oOEUNm2/4HvBv1R4VVpOLShNj//9LEoVUXx1sq6cYwoALaJXlHGd7/5KyVQJY8zt qBj9HPvoAyKNf61cnvy9bkqqjdSmtsOyu7TuxqpmKWcxZ6AGBOGNyxcd8qIEMFAqTnxl AFhw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=fo8+Ahgs2QuUhudL1bZYU1hHDGowGkitN9gc7X0zF9w=; b=x8WyRl451OvtZVHEPjIvkhb9f+j7BZsjpx/x/Tcrcg2d4TEyaUah9gNRzBK0Bv1UHn HH4DypcV6N/wFFB0YVvc7OjJd4c9169oTVNjn7L4B4TmD4Bk0IbB/F11wKXEeysU+1fY Pva5hCPD+fl2XQ4dXu49LLSTEXRYXZn3qk0cQa2+YQNKixBOJ7803Kj3FjWKdE5KiW+4 aWocuvCNh1NoGyY8pGaMYSQoAHsFDXrD8pcDfIwHjU5N4IKENHysGnYIBlYA0NnuxXyU p5VXnBwh9AOHbl2TkGvr5LVfmsT0Ee0O+kzBNOQo4ZSxwOG1iUALzlqOuWlpQ5l/6XU3 u1/A== X-Gm-Message-State: ANoB5pll8NLH2FcHWNEam9qNfMnNtBLuHQtlotXY65e8T29smqPIgkG5 vcloE5SzG87BdEO4yq0n74Zfd/sa3Lt/YXhRuCM= X-Received: by 2002:a05:6402:3895:b0:468:354a:4d6 with SMTP id fd21-20020a056402389500b00468354a04d6mr20912433edb.20.1671484256379; Mon, 19 Dec 2022 13:10:56 -0800 (PST) Received: from localhost.localdomain ([185.126.107.38]) by smtp.gmail.com with ESMTPSA id p6-20020a056402500600b0046ac017b007sm4769122eda.18.2022.12.19.13.10.54 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 19 Dec 2022 13:10:55 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Markus Armbruster , Huacai Chen , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , qemu-arm@nongnu.org, Xiaojuan Yang , Daniel Henrique Barboza , Aleksandar Rikalo , Aurelien Jarno , Peter Maydell , David Gibson , qemu-ppc@nongnu.org, =?utf-8?q?C=C3=A9dric_Le_Goater?= , Jiaxun Yang , Greg Kurz , Song Gao Subject: [PATCH 3/4] target/mips: Restrict 'qapi-commands-machine.h' to system emulation Date: Mon, 19 Dec 2022 22:10:33 +0100 Message-Id: <20221219211034.70491-4-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221219211034.70491-1-philmd@linaro.org> References: <20221219211034.70491-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::533; envelope-from=philmd@linaro.org; helo=mail-ed1-x533.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Since commit a0e61807a3 ("qapi: Remove QMP events and commands from user-mode builds") we don't generate the "qapi-commands-machine.h" header in a user-emulation-only build. Extract the QMP functions from cpu.c (which is always compiled) to the new 'sysemu/monitor.c' unit (which is only compiled when system emulation is selected). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/mips/cpu.c | 29 ------------------------- target/mips/sysemu/meson.build | 1 + target/mips/sysemu/monitor.c | 39 ++++++++++++++++++++++++++++++++++ 3 files changed, 40 insertions(+), 29 deletions(-) create mode 100644 target/mips/sysemu/monitor.c diff --git a/target/mips/cpu.c b/target/mips/cpu.c index 7a565466cb..7a37123419 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -32,7 +32,6 @@ #include "hw/qdev-properties.h" #include "hw/qdev-clock.h" #include "semihosting/semihost.h" -#include "qapi/qapi-commands-machine-target.h" #include "fpu_helper.h" const char regnames[32][3] = { @@ -627,34 +626,6 @@ static void mips_cpu_register_types(void) type_init(mips_cpu_register_types) -static void mips_cpu_add_definition(gpointer data, gpointer user_data) -{ - ObjectClass *oc = data; - CpuDefinitionInfoList **cpu_list = user_data; - CpuDefinitionInfo *info; - const char *typename; - - typename = object_class_get_name(oc); - info = g_malloc0(sizeof(*info)); - info->name = g_strndup(typename, - strlen(typename) - strlen("-" TYPE_MIPS_CPU)); - info->q_typename = g_strdup(typename); - - QAPI_LIST_PREPEND(*cpu_list, info); -} - -CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp) -{ - CpuDefinitionInfoList *cpu_list = NULL; - GSList *list; - - list = object_class_get_list(TYPE_MIPS_CPU, false); - g_slist_foreach(list, mips_cpu_add_definition, &cpu_list); - g_slist_free(list); - - return cpu_list; -} - /* Could be used by generic CPU object */ MIPSCPU *mips_cpu_create_with_clock(const char *cpu_type, Clock *cpu_refclk) { diff --git a/target/mips/sysemu/meson.build b/target/mips/sysemu/meson.build index cefc227582..0e424c9cc6 100644 --- a/target/mips/sysemu/meson.build +++ b/target/mips/sysemu/meson.build @@ -3,5 +3,6 @@ mips_softmmu_ss.add(files( 'cp0.c', 'cp0_timer.c', 'machine.c', + 'monitor.c', 'physaddr.c', )) diff --git a/target/mips/sysemu/monitor.c b/target/mips/sysemu/monitor.c new file mode 100644 index 0000000000..6db4626412 --- /dev/null +++ b/target/mips/sysemu/monitor.c @@ -0,0 +1,39 @@ +/* + * QEMU MIPS CPU (monitor definitions) + * + * SPDX-FileCopyrightText: 2012 SUSE LINUX Products GmbH + * + * SPDX-License-Identifier: LGPL-2.1-or-later + */ + +#include "qemu/osdep.h" +#include "qapi/qapi-commands-machine-target.h" +#include "cpu.h" + +static void mips_cpu_add_definition(gpointer data, gpointer user_data) +{ + ObjectClass *oc = data; + CpuDefinitionInfoList **cpu_list = user_data; + CpuDefinitionInfo *info; + const char *typename; + + typename = object_class_get_name(oc); + info = g_malloc0(sizeof(*info)); + info->name = g_strndup(typename, + strlen(typename) - strlen("-" TYPE_MIPS_CPU)); + info->q_typename = g_strdup(typename); + + QAPI_LIST_PREPEND(*cpu_list, info); +} + +CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp) +{ + CpuDefinitionInfoList *cpu_list = NULL; + GSList *list; + + list = object_class_get_list(TYPE_MIPS_CPU, false); + g_slist_foreach(list, mips_cpu_add_definition, &cpu_list); + g_slist_free(list); + + return cpu_list; +} From patchwork Mon Dec 19 21:10:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 635130 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp2563341pvb; Mon, 19 Dec 2022 13:12:38 -0800 (PST) X-Google-Smtp-Source: AA0mqf4yeychiVQLEcoePY44NGM3R+ZEoy7htTXrtm+1++DwgIuO91liupCPofGt5G4JRecPhaI/ X-Received: by 2002:ac8:5544:0:b0:3a8:b88:c1 with SMTP id o4-20020ac85544000000b003a80b8800c1mr54961051qtr.66.1671484358437; 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[209.51.188.17]) by mx.google.com with ESMTPS id cj22-20020a05622a259600b003a811f36272si3091966qtb.306.2022.12.19.13.12.38 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 19 Dec 2022 13:12:38 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=NwPtn25N; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p7NPh-00033r-7c; Mon, 19 Dec 2022 16:11:09 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p7NPf-00033R-L8 for qemu-devel@nongnu.org; Mon, 19 Dec 2022 16:11:07 -0500 Received: from mail-ed1-x531.google.com ([2a00:1450:4864:20::531]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p7NPc-000465-Ai for qemu-devel@nongnu.org; Mon, 19 Dec 2022 16:11:07 -0500 Received: by mail-ed1-x531.google.com with SMTP id b69so14752510edf.6 for ; Mon, 19 Dec 2022 13:11:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=kbljNJ/3DOB4iD5zOxe+2hDnk7LlNHAUOP/XHBmgK/g=; b=NwPtn25NjWoboOcMmng73uvvE9DcBxmFHRb0unSHsjI8gNlg5QFLvNqOA+FwX+hV6i BLTGPBLNWC9FbvhNIoUGZqSOjHzRUxzl0yrc4ekkZOhQzfgpIRxDnqv8HfoIamcvU8+9 4GispSWNDUrt0oDXpLAOr5oC4gzGkyearv9md9X0XoWQXB04W40ff3ZduCDRwHzGwJ9D VNSpcJERdghahtNk9ERuznoGYkoXYRMfV9dlRFH2N1fxnpsCNfaz4QQXTaWJ6KRGerH3 UEV/5ejJc53yK5k6Um87CvoiShOT7PlfYVSgaUcsOAqKeM4sZxfT3/ubsiQeOMxek9Zw ixtw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=kbljNJ/3DOB4iD5zOxe+2hDnk7LlNHAUOP/XHBmgK/g=; b=X0LGpU5/iE7Ua4BgTdm9eM74hK2svd7izYRPRdC+HOMLyK3HPkGxjyevRdusUxhgfv KRYbZ+Sp6355iEbf4t0VIxIQNOmo+KF3/EwKjr5cTh2KpM+yx2PjrSy7KVQoMa4xdB4c ZCzy864vj3Q6joQInE75y/7spVRdy0Fzl9ERfExBpnHYO2Y1093s+ATgkerRPdxZOQqJ QmCxfQiur+g3HMVCsVCaksVleIHcshXVo0HgYXR7L52hlm38gAy/k55VEnrwMPcPqDRc veDVcb5eYvfZSSXH4SQeiKF/Jm5it+AAjfRkb6XlxnMcXOeuq7PPe8/RSDoVVS9GvTFZ CNIQ== X-Gm-Message-State: ANoB5pn3geTlFEqCWsZCK+1P3UNwmrDG0BaBxFUJy1euhrIyK1Kel8ba golCUBavPNDi+z2CQuMCrVGjJk6EzVEuUK42u30= X-Received: by 2002:a05:6402:299b:b0:468:fd17:aeb9 with SMTP id eq27-20020a056402299b00b00468fd17aeb9mr34714874edb.0.1671484262753; Mon, 19 Dec 2022 13:11:02 -0800 (PST) Received: from localhost.localdomain ([185.126.107.38]) by smtp.gmail.com with ESMTPSA id n19-20020aa7d053000000b00463c5c32c6esm4793389edo.89.2022.12.19.13.11.01 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 19 Dec 2022 13:11:02 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Markus Armbruster , Huacai Chen , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , qemu-arm@nongnu.org, Xiaojuan Yang , Daniel Henrique Barboza , Aleksandar Rikalo , Aurelien Jarno , Peter Maydell , David Gibson , qemu-ppc@nongnu.org, =?utf-8?q?C=C3=A9dric_Le_Goater?= , Jiaxun Yang , Greg Kurz , Song Gao Subject: [PATCH 4/4] target/ppc: Restrict 'qapi-commands-machine.h' to system emulation Date: Mon, 19 Dec 2022 22:10:34 +0100 Message-Id: <20221219211034.70491-5-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221219211034.70491-1-philmd@linaro.org> References: <20221219211034.70491-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::531; envelope-from=philmd@linaro.org; helo=mail-ed1-x531.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Since commit a0e61807a3 ("qapi: Remove QMP events and commands from user-mode builds") we don't generate the "qapi-commands-machine.h" header in a user-emulation-only build. Move the QMP functions from cpu_init.c (which is always compiled) to monitor.c (which is only compiled when system-emulation is selected). Note ppc_cpu_class_by_name() is used by both file units, so we expose its prototype in "cpu-qom.h". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/ppc/cpu-qom.h | 2 ++ target/ppc/cpu_init.c | 48 +---------------------------------------- target/ppc/monitor.c | 50 ++++++++++++++++++++++++++++++++++++++++++- 3 files changed, 52 insertions(+), 48 deletions(-) diff --git a/target/ppc/cpu-qom.h b/target/ppc/cpu-qom.h index 89ff88f28c..6431c520c8 100644 --- a/target/ppc/cpu-qom.h +++ b/target/ppc/cpu-qom.h @@ -31,6 +31,8 @@ OBJECT_DECLARE_CPU_TYPE(PowerPCCPU, PowerPCCPUClass, POWERPC_CPU) +ObjectClass *ppc_cpu_class_by_name(const char *name); + typedef struct CPUArchState CPUPPCState; typedef struct ppc_tb_t ppc_tb_t; typedef struct ppc_dcr_t ppc_dcr_t; diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index cbf0081374..7858cc4c6c 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -40,7 +40,6 @@ #include "qemu/cutils.h" #include "disas/capstone.h" #include "fpu/softfloat.h" -#include "qapi/qapi-commands-machine-target.h" #include "helper_regs.h" #include "internal.h" @@ -6816,7 +6815,7 @@ static const char *ppc_cpu_lookup_alias(const char *alias) return NULL; } -static ObjectClass *ppc_cpu_class_by_name(const char *name) +ObjectClass *ppc_cpu_class_by_name(const char *name) { char *cpu_model, *typename; ObjectClass *oc; @@ -6956,51 +6955,6 @@ void ppc_cpu_list(void) #endif } -static void ppc_cpu_defs_entry(gpointer data, gpointer user_data) -{ - ObjectClass *oc = data; - CpuDefinitionInfoList **first = user_data; - const char *typename; - CpuDefinitionInfo *info; - - typename = object_class_get_name(oc); - info = g_malloc0(sizeof(*info)); - info->name = g_strndup(typename, - strlen(typename) - strlen(POWERPC_CPU_TYPE_SUFFIX)); - - QAPI_LIST_PREPEND(*first, info); -} - -CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp) -{ - CpuDefinitionInfoList *cpu_list = NULL; - GSList *list; - int i; - - list = object_class_get_list(TYPE_POWERPC_CPU, false); - g_slist_foreach(list, ppc_cpu_defs_entry, &cpu_list); - g_slist_free(list); - - for (i = 0; ppc_cpu_aliases[i].alias != NULL; i++) { - PowerPCCPUAlias *alias = &ppc_cpu_aliases[i]; - ObjectClass *oc; - CpuDefinitionInfo *info; - - oc = ppc_cpu_class_by_name(alias->model); - if (oc == NULL) { - continue; - } - - info = g_malloc0(sizeof(*info)); - info->name = g_strdup(alias->alias); - info->q_typename = g_strdup(object_class_get_name(oc)); - - QAPI_LIST_PREPEND(cpu_list, info); - } - - return cpu_list; -} - static void ppc_cpu_set_pc(CPUState *cs, vaddr value) { PowerPCCPU *cpu = POWERPC_CPU(cs); diff --git a/target/ppc/monitor.c b/target/ppc/monitor.c index 8250b1304e..36e5b5eff8 100644 --- a/target/ppc/monitor.c +++ b/target/ppc/monitor.c @@ -1,5 +1,5 @@ /* - * QEMU monitor + * QEMU PPC (monitor definitions) * * Copyright (c) 2003-2004 Fabrice Bellard * @@ -28,6 +28,9 @@ #include "qemu/ctype.h" #include "monitor/hmp-target.h" #include "monitor/hmp.h" +#include "qapi/qapi-commands-machine-target.h" +#include "cpu-models.h" +#include "cpu-qom.h" static target_long monitor_get_ccr(Monitor *mon, const struct MonitorDef *md, int val) @@ -172,3 +175,48 @@ int target_get_monitor_def(CPUState *cs, const char *name, uint64_t *pval) return -EINVAL; } + +static void ppc_cpu_defs_entry(gpointer data, gpointer user_data) +{ + ObjectClass *oc = data; + CpuDefinitionInfoList **first = user_data; + const char *typename; + CpuDefinitionInfo *info; + + typename = object_class_get_name(oc); + info = g_malloc0(sizeof(*info)); + info->name = g_strndup(typename, + strlen(typename) - strlen(POWERPC_CPU_TYPE_SUFFIX)); + + QAPI_LIST_PREPEND(*first, info); +} + +CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp) +{ + CpuDefinitionInfoList *cpu_list = NULL; + GSList *list; + int i; + + list = object_class_get_list(TYPE_POWERPC_CPU, false); + g_slist_foreach(list, ppc_cpu_defs_entry, &cpu_list); + g_slist_free(list); + + for (i = 0; ppc_cpu_aliases[i].alias != NULL; i++) { + PowerPCCPUAlias *alias = &ppc_cpu_aliases[i]; + ObjectClass *oc; + CpuDefinitionInfo *info; + + oc = ppc_cpu_class_by_name(alias->model); + if (oc == NULL) { + continue; + } + + info = g_malloc0(sizeof(*info)); + info->name = g_strdup(alias->alias); + info->q_typename = g_strdup(object_class_get_name(oc)); + + QAPI_LIST_PREPEND(cpu_list, info); + } + + return cpu_list; +} From patchwork Mon Dec 19 21:22:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 635131 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp2567666pvb; Mon, 19 Dec 2022 13:23:29 -0800 (PST) X-Google-Smtp-Source: AMrXdXv9gy3SR1RCDeuimKVcezFv5LY1HSC3i8FQhikvshqIKiJ225zhGTwMKyBRAngZdgrdifSM X-Received: by 2002:ac8:6bd7:0:b0:3a7:e4ad:5499 with SMTP id b23-20020ac86bd7000000b003a7e4ad5499mr91165qtt.32.1671485009125; Mon, 19 Dec 2022 13:23:29 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671485009; cv=none; d=google.com; s=arc-20160816; b=KqTBXtZ5gOBYAo0zxfiVvDexB7QPex4uM47MWbf6owTzWnepQGLaIkJneGv3SG1HEE LUEiz+35dP1Oz946dOpVYClejlSmlLwTZYk8HO6Zi1oF+0vuvfyOtxkTaGReIh477VrO PNtzqvbQbt+YOLLmPij3ir4WHnsNciA+3tcBzZYXwO8DQXrDI03leajnQIoBUbuoZjg3 FHcjW6Cm48I3z/d3KiZP/qWAmho6ne8h2j90+IaaJsLpTQQeYbEMDBGmYk8OAXpYNcza 477hLolHbZvHAUrR0aAVVZQ2gfbLTO8WtgP15C9YzbpQSil5yWD8S/MkmJ3DgfG/xrL4 MpWA== ARC-Message-Signature: i=1; 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Guard qmp_query_cpu_definitions() within CONFIG_USER_ONLY; move x86_cpu_class_check_missing_features() closer since it is only used by this QMP command handler. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/i386/cpu.c | 74 +++++++++++++++++++++++++---------------------- 1 file changed, 39 insertions(+), 35 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index ae502f0bfe..435980dd3a 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -31,11 +31,11 @@ #include "qapi/error.h" #include "qapi/qapi-visit-machine.h" #include "qapi/qmp/qerror.h" -#include "qapi/qapi-commands-machine-target.h" #include "standard-headers/asm-x86/kvm_para.h" #include "hw/qdev-properties.h" #include "hw/i386/topology.h" #ifndef CONFIG_USER_ONLY +#include "qapi/qapi-commands-machine-target.h" #include "exec/address-spaces.h" #include "hw/boards.h" #include "hw/i386/sgx-epc.h" @@ -4713,40 +4713,6 @@ static void x86_cpu_get_unavailable_features(Object *obj, Visitor *v, visit_type_strList(v, "unavailable-features", &result, errp); } -/* Check for missing features that may prevent the CPU class from - * running using the current machine and accelerator. - */ -static void x86_cpu_class_check_missing_features(X86CPUClass *xcc, - strList **list) -{ - strList **tail = list; - X86CPU *xc; - Error *err = NULL; - - if (xcc->host_cpuid_required && !accel_uses_host_cpuid()) { - QAPI_LIST_APPEND(tail, g_strdup("kvm")); - return; - } - - xc = X86_CPU(object_new_with_class(OBJECT_CLASS(xcc))); - - x86_cpu_expand_features(xc, &err); - if (err) { - /* Errors at x86_cpu_expand_features should never happen, - * but in case it does, just report the model as not - * runnable at all using the "type" property. - */ - QAPI_LIST_APPEND(tail, g_strdup("type")); - error_free(err); - } - - x86_cpu_filter_features(xc, false); - - x86_cpu_list_feature_names(xc->filtered_features, tail); - - object_unref(OBJECT(xc)); -} - /* Print all cpuid feature names in featureset */ static void listflags(GList *features) @@ -4875,6 +4841,42 @@ void x86_cpu_list(void) g_list_free(names); } +#ifndef CONFIG_USER_ONLY + +/* Check for missing features that may prevent the CPU class from + * running using the current machine and accelerator. + */ +static void x86_cpu_class_check_missing_features(X86CPUClass *xcc, + strList **list) +{ + strList **tail = list; + X86CPU *xc; + Error *err = NULL; + + if (xcc->host_cpuid_required && !accel_uses_host_cpuid()) { + QAPI_LIST_APPEND(tail, g_strdup("kvm")); + return; + } + + xc = X86_CPU(object_new_with_class(OBJECT_CLASS(xcc))); + + x86_cpu_expand_features(xc, &err); + if (err) { + /* Errors at x86_cpu_expand_features should never happen, + * but in case it does, just report the model as not + * runnable at all using the "type" property. + */ + QAPI_LIST_APPEND(tail, g_strdup("type")); + error_free(err); + } + + x86_cpu_filter_features(xc, false); + + x86_cpu_list_feature_names(xc->filtered_features, tail); + + object_unref(OBJECT(xc)); +} + static void x86_cpu_definition_entry(gpointer data, gpointer user_data) { ObjectClass *oc = data; @@ -4915,6 +4917,8 @@ CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp) return cpu_list; } +#endif /* !CONFIG_USER_ONLY */ + uint64_t x86_cpu_get_supported_feature_word(FeatureWord w, bool migratable_only) {