From patchwork Fri Dec 16 16:29:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quentin Schulz X-Patchwork-Id: 634801 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 796E8C4167B for ; Fri, 16 Dec 2022 16:30:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231297AbiLPQaU (ORCPT ); Fri, 16 Dec 2022 11:30:20 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:32804 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231315AbiLPQaL (ORCPT ); Fri, 16 Dec 2022 11:30:11 -0500 Received: from relay4-d.mail.gandi.net (relay4-d.mail.gandi.net [217.70.183.196]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 12B905D6AC; Fri, 16 Dec 2022 08:30:09 -0800 (PST) Received: (Authenticated sender: foss@0leil.net) by mail.gandi.net (Postfix) with ESMTPSA id 26CC0E000F; Fri, 16 Dec 2022 16:30:05 +0000 (UTC) From: Quentin Schulz To: Minas Harutyunyan , Greg Kroah-Hartman Cc: Quentin Schulz , linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, Bin Yang , Quentin Schulz Subject: [PATCH v2 1/2] usb: dwc2: allow platforms to prevent core phy initialisation Date: Fri, 16 Dec 2022 17:29:28 +0100 Message-Id: <20221206-dwc2-gadget-dual-role-v2-1-0de821615dd3@theobroma-systems.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221206-dwc2-gadget-dual-role-v2-0-0de821615dd3@theobroma-systems.com> References: <20221206-dwc2-gadget-dual-role-v2-0-0de821615dd3@theobroma-systems.com> MIME-Version: 1.0 X-Mailer: b4 0.11.0-dev-141d4 Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org From: Quentin Schulz Some USB PHYs need to be controlled dynamically on some platforms. Let's allow platforms to define whether they should prevent core PHY initialization by providing a "shadow" value to HCD's skip_phy_initialization flag before HCD is actually created (e.g. from a dwc2_set_*_params callback). Signed-off-by: Quentin Schulz --- drivers/usb/dwc2/core.h | 6 ++++++ drivers/usb/dwc2/hcd.c | 2 ++ 2 files changed, 8 insertions(+) diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h index 40cf2880d7e5..6aa9aeb374eb 100644 --- a/drivers/usb/dwc2/core.h +++ b/drivers/usb/dwc2/core.h @@ -423,6 +423,10 @@ enum dwc2_ep0_state { * 0 - No * 1 - Yes * + * @hcd_skip_phy_initialization: Shadow value of HCD skip_phy_initialization + * flag. + * See include/linux/usb/hcd.h for documentation. + * * The following parameters may be specified when starting the module. These * parameters define how the DWC_otg controller should be configured. A * value of -1 (or any other out of range value) for any parameter means @@ -499,6 +503,8 @@ struct dwc2_core_params { u32 g_tx_fifo_size[MAX_EPS_CHANNELS]; bool change_speed_quirk; + + unsigned hcd_skip_phy_initialization:1; }; /** diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c index 657f1f659ffa..e2fa9a491cab 100644 --- a/drivers/usb/dwc2/hcd.c +++ b/drivers/usb/dwc2/hcd.c @@ -5315,6 +5315,8 @@ int dwc2_hcd_init(struct dwc2_hsotg *hsotg) if (!IS_ERR_OR_NULL(hsotg->uphy)) otg_set_host(hsotg->uphy->otg, &hcd->self); + hcd->skip_phy_initialization = hsotg->params.hcd_skip_phy_initialization; + /* * Finish generic HCD initialization and start the HCD. This function * allocates the DMA buffer pool, registers the USB bus, requests the From patchwork Fri Dec 16 16:29:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quentin Schulz X-Patchwork-Id: 634951 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 90B70C4332F for ; Fri, 16 Dec 2022 16:30:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231449AbiLPQaY (ORCPT ); Fri, 16 Dec 2022 11:30:24 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60938 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231347AbiLPQaN (ORCPT ); Fri, 16 Dec 2022 11:30:13 -0500 Received: from relay4-d.mail.gandi.net (relay4-d.mail.gandi.net [217.70.183.196]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 788694D5FA; Fri, 16 Dec 2022 08:30:12 -0800 (PST) Received: (Authenticated sender: foss@0leil.net) by mail.gandi.net (Postfix) with ESMTPSA id 3328BE000A; Fri, 16 Dec 2022 16:30:08 +0000 (UTC) From: Quentin Schulz To: Minas Harutyunyan , Greg Kroah-Hartman Cc: Quentin Schulz , linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, Bin Yang , Quentin Schulz Subject: [PATCH v2 2/2] usb: dwc2: prevent core PHY initialization on Rockchip Date: Fri, 16 Dec 2022 17:29:29 +0100 Message-Id: <20221206-dwc2-gadget-dual-role-v2-2-0de821615dd3@theobroma-systems.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221206-dwc2-gadget-dual-role-v2-0-0de821615dd3@theobroma-systems.com> References: <20221206-dwc2-gadget-dual-role-v2-0-0de821615dd3@theobroma-systems.com> MIME-Version: 1.0 X-Mailer: b4 0.11.0-dev-141d4 Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org From: Quentin Schulz In Rockchip vendor kernel, the core PHY initialization is disabled with the following justification: The usb phys need to be controlled dynamically on some Rockchip SoCs. So set the new HCD flag which prevents USB core from trying to manage our phys. This is required to get USB gadget working in dual-role mode on Ringneck PX30 SoM on a Haikou Devkit. Cc: Bin Yang Signed-off-by: Quentin Schulz --- drivers/usb/dwc2/params.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c index 9ed9fd956940..9095437b3236 100644 --- a/drivers/usb/dwc2/params.c +++ b/drivers/usb/dwc2/params.c @@ -117,6 +117,7 @@ static void dwc2_set_rk_params(struct dwc2_hsotg *hsotg) p->lpm_clock_gating = false; p->besl = false; p->hird_threshold_en = false; + p->hcd_skip_phy_initialization = 1; } static void dwc2_set_ltq_params(struct dwc2_hsotg *hsotg)