From patchwork Wed Dec 14 20:31:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 633992 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 097CAC2D0CB for ; Wed, 14 Dec 2022 20:36:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230266AbiLNUgE (ORCPT ); Wed, 14 Dec 2022 15:36:04 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36318 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230002AbiLNUfn (ORCPT ); Wed, 14 Dec 2022 15:35:43 -0500 Received: from mail-pl1-x62f.google.com (mail-pl1-x62f.google.com [IPv6:2607:f8b0:4864:20::62f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E07A331378 for ; Wed, 14 Dec 2022 12:31:52 -0800 (PST) Received: by mail-pl1-x62f.google.com with SMTP id 17so4664284pll.0 for ; Wed, 14 Dec 2022 12:31:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=iXo7ON+W+HqSzfMLSf0nu5/9om0aVHW6nmyC6DVkBmI=; b=XMacLbFeRR4Jifz4+Q63pAto3sNGhGFs7D/C1Jtc9QQeGCWJRFI9tvaxikbQ2t/Dco G4gssaES0KuTv0xIEbouEsR5nQPUN12ph2mTl7f99Uj+lsVkI/5E7vYiBMxy95HKhXdC 4g20V7tkXglVZZRAL3X4miN88lXYqVjsHqTp+83qH2J4i0oVpcJR6jXyE4gclz3NfinW LQn4wBQ5M4Uj63PvZevVA5hRSggTsXftzAenddpZxNwfgW7p+Hez6dSAXeTTYDeoXjF/ PLX0+mxUxBiprC6yxUcGwXSIxO/DapOC27xIn07FyGShU/pveYYzB+vvAaN1qsUhHqhK VZ1w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=iXo7ON+W+HqSzfMLSf0nu5/9om0aVHW6nmyC6DVkBmI=; b=3r3VqhE4ssN7XMl/02yv2OpsyAN2xU5AEI2NgMraLBAd091GLVMINfwrFya9j8yUt6 1lCHU5d2PBWjqRDBgn8OwugP/HBbOKrLwbS+I90MgOzuKQjLtHu1kwsmQVIZ8s7wg6hk 05zWRbw//2Z9kjj2gQVOUB6/Qtkwp42ZhOpWQ2cIXe1exFaB3B2RgeMUEGTchvT2eo2l a509kDw9rqszGN1u7f1wZpokJRYMMLgY3LUDa7mMc+3GCHQQp0z8xSXangasDAxDMwgD b5UgPUCjarjUVMruerXoC8Qa+IitWyJS+PlWbzf+Hx6d7WpqGpFaniSZQSQh4zensfe9 OQmQ== X-Gm-Message-State: ANoB5pl/cg70v83c9cnmKmaGstS9CE310QAtZUEf+iaqW41NvToFcKoW jlcn3Bk77b646FDb8AkTOosG7tP44f+rkLraNqE= X-Google-Smtp-Source: AA0mqf7gbCnQyLrxJw4M6FcVDByhc7Y4y2bkdQGassD9WGwBwZ9ttLkWeVbsTZim+PqXUoslZyKT+w== X-Received: by 2002:a17:90b:378c:b0:21e:1282:af42 with SMTP id mz12-20020a17090b378c00b0021e1282af42mr23121685pjb.40.1671049912274; Wed, 14 Dec 2022 12:31:52 -0800 (PST) Received: from localhost.localdomain ([2401:4900:1c60:4bad:5c3:ab51:3d81:6264]) by smtp.gmail.com with ESMTPSA id gx13-20020a17090b124d00b00219e38b42f5sm1812238pjb.26.2022.12.14.12.31.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Dec 2022 12:31:51 -0800 (PST) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org Cc: agross@kernel.org, bhupesh.sharma@linaro.org, bhupesh.linux@gmail.com, linux-kernel@vger.kernel.org, robh+dt@kernel.org, krzysztof.kozlowski@linaro.org, konrad.dybcio@linaro.org, andersson@kernel.org Subject: [PATCH v2 2/3] arm64: dts: qcom: sm6115: Move USB node's 'maximum-speed' and 'dr_mode' properties to dts Date: Thu, 15 Dec 2022 02:01:23 +0530 Message-Id: <20221214203124.564537-3-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221214203124.564537-1-bhupesh.sharma@linaro.org> References: <20221214203124.564537-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Normally the 'maximum-speed' and 'dr_mode' properties of a USB controller + port is dependent on the type of the ports, regulators and mode change interrupt routing available on the board(s). So, move the same from the sm6115 dtsi file to respective board file(s). Reviewed-by: Konrad Dybcio Signed-off-by: Bhupesh Sharma --- arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts | 5 +++++ arch/arm64/boot/dts/qcom/sm6115.dtsi | 2 -- 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts b/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts index fa57f4bf58256..3f39f25e0721e 100644 --- a/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts +++ b/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts @@ -229,6 +229,11 @@ &usb { status = "okay"; }; +&usb_dwc3 { + maximum-speed = "high-speed"; + dr_mode = "peripheral"; +}; + &usb_hsphy { vdd-supply = <&vreg_l4a>; vdda-pll-supply = <&vreg_l12a>; diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi index b5f7480c2e713..e4ce135264f3d 100644 --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi @@ -1031,8 +1031,6 @@ usb_dwc3: usb@4e00000 { snps,has-lpm-erratum; snps,hird-threshold = /bits/ 8 <0x10>; snps,usb3_lpm_capable; - maximum-speed = "high-speed"; - dr_mode = "peripheral"; }; }; From patchwork Wed Dec 14 20:31:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 633991 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E8F88C2D0CD for ; Wed, 14 Dec 2022 20:36:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229914AbiLNUgG (ORCPT ); Wed, 14 Dec 2022 15:36:06 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38886 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230241AbiLNUfp (ORCPT ); Wed, 14 Dec 2022 15:35:45 -0500 Received: from mail-pj1-x1033.google.com (mail-pj1-x1033.google.com [IPv6:2607:f8b0:4864:20::1033]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 81B5EE7D for ; Wed, 14 Dec 2022 12:31:56 -0800 (PST) Received: by mail-pj1-x1033.google.com with SMTP id fy4so8258267pjb.0 for ; Wed, 14 Dec 2022 12:31:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=HPIAhqEAUFnaQX9FYqtKlCHsyyM8Y3BpxN8o+Dy0qmY=; b=U1+8X6QnTAv8LJbEQ5qFXSEdbpe4APhf2SYNK3m2nFrNtbn8nxtzlY7N9Si8dw+JSJ Y0wL/hPH/AnvIHGLSTsFLl6TfIBEBFRbH6T3VeuqvS2saU8IhRPBbGrwvaGRSAf+9UvP wSwKHpFlvqgHUkF3sZXLdHnoMNfWXcfYBoRpGbycuOLi/GJ2q8cECsOdBT5eWXqchA9d vBq9+mau2GFRyJNe8TgN3ZL0BdxQk9YB7ggFD8a39ixUZQ4q9ayL4X8jtGvZ69WxVwwD DZX4NDLn8xmYbXheVnRSb1L+Kx3LFzdWaD+tqolVtTYeJiHyQ4CD4GlSeHg9m07LpwJ9 Jb5Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=HPIAhqEAUFnaQX9FYqtKlCHsyyM8Y3BpxN8o+Dy0qmY=; b=D5+acUdedPe9Ti2NdQc54I+EvtWKwTwF3fp43U+Dd2mxf4iNDtxF8I5IZAKiG7kwVv 7QtlxAY0C/RIrpkbopT4FvhRcRxL8DqK5HwROHLjK038s8W/n11V9Pv8caP/ZX83Rg2/ 9dYn66sqvHnhIunrBMohOPdCLkVFFqt9d12dv/f+GFhjnH2y0hVvCppP84IjtGFxI8xp cwg3aIaD/8PRLSCWvM+kkaPSZBxwGYMPzUr/1DYwBhkG5Yz0hWPIemCAaU6vW55hH54F y1c/pqucU1aZ0PV4kIJA2MiGILW4thKZzgXbxya1OPJprDycdS19CfyJzS5AHD5C0yXQ Sn3Q== X-Gm-Message-State: ANoB5pk16B9zSmXldW+FkXtwj76MKQr8ZHSafoGSygGZeudmL+zBYWhz N13/uEp3HUrmx9VZn1c/PjWy1w== X-Google-Smtp-Source: AA0mqf4kKDPrcLvLDV+cKqx6gJIYkhue388PwYZrWAvT4JfEBcApaMKK8+6JllstPRE+MIgdgGR4jw== X-Received: by 2002:a17:90a:1b0b:b0:219:396c:9e32 with SMTP id q11-20020a17090a1b0b00b00219396c9e32mr27101974pjq.16.1671049915966; Wed, 14 Dec 2022 12:31:55 -0800 (PST) Received: from localhost.localdomain ([2401:4900:1c60:4bad:5c3:ab51:3d81:6264]) by smtp.gmail.com with ESMTPSA id gx13-20020a17090b124d00b00219e38b42f5sm1812238pjb.26.2022.12.14.12.31.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Dec 2022 12:31:55 -0800 (PST) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org Cc: agross@kernel.org, bhupesh.sharma@linaro.org, bhupesh.linux@gmail.com, linux-kernel@vger.kernel.org, robh+dt@kernel.org, krzysztof.kozlowski@linaro.org, konrad.dybcio@linaro.org, andersson@kernel.org Subject: [PATCH v2 3/3] arm64: dts: qcom: sm6115: Add USB SS qmp phy node Date: Thu, 15 Dec 2022 02:01:24 +0530 Message-Id: <20221214203124.564537-4-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221214203124.564537-1-bhupesh.sharma@linaro.org> References: <20221214203124.564537-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add USB superspeed qmp phy node to dtsi. Make sure that the oneplus board dts (which includes the sm4250.dtsi) continues to work as intended. Signed-off-by: Bhupesh Sharma --- .../boot/dts/qcom/sm4250-oneplus-billie2.dts | 3 ++ arch/arm64/boot/dts/qcom/sm6115.dtsi | 38 ++++++++++++++++++- 2 files changed, 39 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts b/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts index 3f39f25e0721e..4f0d65574448b 100644 --- a/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts +++ b/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts @@ -232,6 +232,9 @@ &usb { &usb_dwc3 { maximum-speed = "high-speed"; dr_mode = "peripheral"; + + phys = <&usb_hsphy>; + phy-names = "usb2-phy"; }; &usb_hsphy { diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi index e4ce135264f3d..15f311dcd289f 100644 --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi @@ -579,6 +579,40 @@ usb_hsphy: phy@1613000 { status = "disabled"; }; + usb_qmpphy: phy@1615000 { + compatible = "qcom,sm6115-qmp-usb3-phy"; + reg = <0x01615000 0x200>; + clocks = <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>, + <&gcc GCC_USB3_PRIM_CLKREF_CLK>, + <&gcc GCC_AHB2PHY_USB_CLK>; + clock-names = "com_aux", + "ref", + "cfg_ahb"; + resets = <&gcc GCC_USB3_PHY_PRIM_SP0_BCR>, + <&gcc GCC_USB3PHY_PHY_PRIM_SP0_BCR>; + reset-names = "phy", "phy_phy"; + status = "disabled"; + #clock-cells = <1>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + usb_ssphy: phy@1615200 { + reg = <0x01615200 0x200>, + <0x01615400 0x200>, + <0x01615c00 0x400>, + <0x01615600 0x200>, + <0x01615800 0x200>, + <0x01615a00 0x100>; + #phy-cells = <0>; + #clock-cells = <1>; + clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; + clock-names = "pipe0"; + clock-output-names = "usb3_phy_pipe_clk_src"; + }; + }; + + qfprom@1b40000 { compatible = "qcom,sm6115-qfprom", "qcom,qfprom"; reg = <0x01b40000 0x7000>; @@ -1023,8 +1057,8 @@ usb_dwc3: usb@4e00000 { compatible = "snps,dwc3"; reg = <0x04e00000 0xcd00>; interrupts = ; - phys = <&usb_hsphy>; - phy-names = "usb2-phy"; + phys = <&usb_hsphy>, <&usb_ssphy>; + phy-names = "usb2-phy", "usb3-phy"; iommus = <&apps_smmu 0x120 0x0>; snps,dis_u2_susphy_quirk; snps,dis_enblslpm_quirk;