From patchwork Mon Dec 12 18:07:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sudip Mukherjee X-Patchwork-Id: 633315 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 24D4FC4332F for ; Mon, 12 Dec 2022 18:08:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233266AbiLLSIf (ORCPT ); Mon, 12 Dec 2022 13:08:35 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33626 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233269AbiLLSIK (ORCPT ); Mon, 12 Dec 2022 13:08:10 -0500 Received: from mail-wm1-x32a.google.com (mail-wm1-x32a.google.com [IPv6:2a00:1450:4864:20::32a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E4154E72 for ; Mon, 12 Dec 2022 10:07:43 -0800 (PST) Received: by mail-wm1-x32a.google.com with SMTP id v124-20020a1cac82000000b003cf7a4ea2caso5904017wme.5 for ; Mon, 12 Dec 2022 10:07:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=X/E0yrCX/w68NetnkW1cEsRRs5XY/9DzIPnhuqKIJns=; b=OyvO0QzJj1fhziCAWdsYVx/UKbdbBA4bx3cDt9uIGpPMmdedpdt31DOtoeammzLoea MJHFt3njOaFOOeUELbZ842aNblDbokMI4RvBNRkbc5qj7w4gep0sp+vzAnVOqBZnQYIu 1N/LYxrLJXJXhrZNwbAXDmsP+xlnSfu8aZEZwFTKBElspvB0NyPKR4Hx1J1MUKVnqPML CeljWIj8fpFup/xt1GaK8CEXQ7e53MUv7wnTbo3eChXfo9LZ7nn8wZ2ciILLn6syxDxt wVbjBG5Is6qAE+oVIaJXAxzQPY9eWtWGmNkuivM7/+CLj3ByttgPD8BSV770u4X0IQ+n pbVQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=X/E0yrCX/w68NetnkW1cEsRRs5XY/9DzIPnhuqKIJns=; b=j5N4JnkyEzfkQv00OYhYrjUIkxqFnyWL1kC0Vkd4yA4OVTCkJyNlpojLkoLINifI+l rZFkS54yWOgPXFkKfGFoUxkYPVIARbtH/q115YL5WN59u4IcYplTbOjSTs6NdK/qw8LV pIZwrItS7goVl4ZmFe9RJLUJ34rwXDJXmMtpuDbZqx2rXE/qbstN5m3tzPKtQ0V28IZ+ wccta+1fBoelWaw49qdE+twwWmOLrqLLRFH9nQs7z7aQZty0IEOkFvCXCcI/tFzLQoHl 8kz3UOW6AhNwkf26GADXPlKcKeGrHD1xk9c02cme4XR4UrF5ESZ1rGyi69BlDQaJYDlp xiVQ== X-Gm-Message-State: ANoB5pmWZ68tIGiWrNPtCOeYPaiW2p+PpnKgZ1VWqexirK+2ZaPG25js hM/aKwGOWgAj3Z/5rO0vej1uvg== X-Google-Smtp-Source: AA0mqf71R8FCWfC8x8sqet7rycmRYXZKz3wn9O5O4w6CxCK/2v61XZyRVq4eLvrmv7PTC/CGlUpUqw== X-Received: by 2002:a05:600c:1e18:b0:3d2:26e1:bd45 with SMTP id ay24-20020a05600c1e1800b003d226e1bd45mr3859314wmb.29.1670868462552; Mon, 12 Dec 2022 10:07:42 -0800 (PST) Received: from localhost.localdomain (host-78-150-37-98.as13285.net. [78.150.37.98]) by smtp.gmail.com with ESMTPSA id t123-20020a1c4681000000b003a3170a7af9sm10156808wma.4.2022.12.12.10.07.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Dec 2022 10:07:41 -0800 (PST) From: Sudip Mukherjee To: Serge Semin , Mark Brown , Rob Herring , Krzysztof Kozlowski Cc: jude.onyenegecha@sifive.com, ben.dooks@sifive.com, jeegar.lakhani@sifive.com, linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sudip Mukherjee Subject: [PATCH v2 01/15] spi: dw: Introduce spi_frf and STD_SPI Date: Mon, 12 Dec 2022 18:07:18 +0000 Message-Id: <20221212180732.79167-2-sudip.mukherjee@sifive.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20221212180732.79167-1-sudip.mukherjee@sifive.com> References: <20221212180732.79167-1-sudip.mukherjee@sifive.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The DW APB SSI controllers of v4.x and newer and DW AHB SSI controllers supports enhanced SPI modes which can be defined from SPI_FRF of DW_SPI_CTRLR0 register. Without enhanced mode, these controllers will work in the standard spi mode. Signed-off-by: Sudip Mukherjee --- drivers/spi/spi-dw-core.c | 13 ++++++++++++- drivers/spi/spi-dw.h | 6 ++++++ 2 files changed, 18 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c index 99edddf9958b9..77c23772bb3d9 100644 --- a/drivers/spi/spi-dw-core.c +++ b/drivers/spi/spi-dw-core.c @@ -333,6 +333,16 @@ void dw_spi_update_config(struct dw_spi *dws, struct spi_device *spi, /* CTRLR0[11:10] Transfer Mode */ cr0 |= FIELD_PREP(DW_HSSI_CTRLR0_TMOD_MASK, cfg->tmode); + if (dw_spi_ver_is_ge(dws, HSSI, 103A)) { + cr0 &= ~DW_HSSI_CTRLR0_SPI_FRF_MASK; + cr0 |= FIELD_PREP(DW_HSSI_CTRLR0_SPI_FRF_MASK, + cfg->spi_frf); + } else if (dw_spi_ver_is_ge(dws, PSSI, 400A)) { + cr0 &= ~DW_PSSI_CTRLR0_SPI_FRF_MASK; + cr0 |= FIELD_PREP(DW_PSSI_CTRLR0_SPI_FRF_MASK, + cfg->spi_frf); + } + dw_writel(dws, DW_SPI_CTRLR0, cr0); if (cfg->tmode == DW_SPI_CTRLR0_TMOD_EPROMREAD || @@ -422,6 +432,7 @@ static int dw_spi_transfer_one(struct spi_controller *master, .tmode = DW_SPI_CTRLR0_TMOD_TR, .dfs = transfer->bits_per_word, .freq = transfer->speed_hz, + .spi_frf = DW_SPI_CTRLR0_SPI_FRF_STD_SPI, }; int ret; @@ -664,7 +675,7 @@ static void dw_spi_stop_mem_op(struct dw_spi *dws, struct spi_device *spi) static int dw_spi_exec_mem_op(struct spi_mem *mem, const struct spi_mem_op *op) { struct dw_spi *dws = spi_controller_get_devdata(mem->spi->controller); - struct dw_spi_cfg cfg; + struct dw_spi_cfg cfg = {0}; unsigned long flags; int ret; diff --git a/drivers/spi/spi-dw.h b/drivers/spi/spi-dw.h index 9e8eb2b52d5c7..414a415deb42a 100644 --- a/drivers/spi/spi-dw.h +++ b/drivers/spi/spi-dw.h @@ -17,6 +17,8 @@ /* Synopsys DW SSI component versions (FourCC sequence) */ #define DW_HSSI_102A 0x3130322a +#define DW_HSSI_103A 0x3130332a +#define DW_PSSI_400A 0x3430302a /* DW SSI IP-core ID and version check helpers */ #define dw_spi_ip_is(_dws, _ip) \ @@ -94,6 +96,9 @@ #define DW_HSSI_CTRLR0_TMOD_MASK GENMASK(11, 10) #define DW_HSSI_CTRLR0_SRL BIT(13) #define DW_HSSI_CTRLR0_MST BIT(31) +#define DW_HSSI_CTRLR0_SPI_FRF_MASK GENMASK(23, 22) +#define DW_PSSI_CTRLR0_SPI_FRF_MASK GENMASK(22, 21) +#define DW_SPI_CTRLR0_SPI_FRF_STD_SPI 0x0 /* Bit fields in CTRLR1 */ #define DW_SPI_NDF_MASK GENMASK(15, 0) @@ -135,6 +140,7 @@ struct dw_spi_cfg { u8 dfs; u32 ndf; u32 freq; + u8 spi_frf; }; struct dw_spi; From patchwork Mon Dec 12 18:07:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sudip Mukherjee X-Patchwork-Id: 633757 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DCBA8C4332F for ; Mon, 12 Dec 2022 18:08:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233268AbiLLSIk (ORCPT ); Mon, 12 Dec 2022 13:08:40 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34148 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232603AbiLLSIL (ORCPT ); Mon, 12 Dec 2022 13:08:11 -0500 Received: from mail-wm1-x32c.google.com (mail-wm1-x32c.google.com [IPv6:2a00:1450:4864:20::32c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2D8E25F79 for ; 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[78.150.37.98]) by smtp.gmail.com with ESMTPSA id t123-20020a1c4681000000b003a3170a7af9sm10156808wma.4.2022.12.12.10.07.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Dec 2022 10:07:43 -0800 (PST) From: Sudip Mukherjee To: Serge Semin , Mark Brown , Rob Herring , Krzysztof Kozlowski Cc: jude.onyenegecha@sifive.com, ben.dooks@sifive.com, jeegar.lakhani@sifive.com, linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sudip Mukherjee Subject: [PATCH v2 02/15] spi: dw: update NDF while using enhanced spi mode Date: Mon, 12 Dec 2022 18:07:19 +0000 Message-Id: <20221212180732.79167-3-sudip.mukherjee@sifive.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20221212180732.79167-1-sudip.mukherjee@sifive.com> References: <20221212180732.79167-1-sudip.mukherjee@sifive.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org If the transfer of Transmit only mode is using dual/quad/octal SPI then NDF needs to be updated with the number of data frames. If the Transmit FIFO goes empty in-between, DWC_ssi masks the serial clock and wait for rest of the data until the programmed amount of frames are transferred successfully. Signed-off-by: Sudip Mukherjee --- drivers/spi/spi-dw-core.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c index 77c23772bb3d9..8c47a4d14b666 100644 --- a/drivers/spi/spi-dw-core.c +++ b/drivers/spi/spi-dw-core.c @@ -346,7 +346,9 @@ void dw_spi_update_config(struct dw_spi *dws, struct spi_device *spi, dw_writel(dws, DW_SPI_CTRLR0, cr0); if (cfg->tmode == DW_SPI_CTRLR0_TMOD_EPROMREAD || - cfg->tmode == DW_SPI_CTRLR0_TMOD_RO) + cfg->tmode == DW_SPI_CTRLR0_TMOD_RO || + (cfg->tmode == DW_SPI_CTRLR0_TMOD_TO && + cfg->spi_frf != DW_SPI_CTRLR0_SPI_FRF_STD_SPI)) dw_writel(dws, DW_SPI_CTRLR1, cfg->ndf ? cfg->ndf - 1 : 0); /* Note DW APB SSI clock divider doesn't support odd numbers */ From patchwork Mon Dec 12 18:07:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sudip Mukherjee X-Patchwork-Id: 633756 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A76F5C2D0CD for ; Mon, 12 Dec 2022 18:08:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233274AbiLLSIm (ORCPT ); Mon, 12 Dec 2022 13:08:42 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33806 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233061AbiLLSIN (ORCPT ); Mon, 12 Dec 2022 13:08:13 -0500 Received: from mail-wm1-x336.google.com (mail-wm1-x336.google.com [IPv6:2a00:1450:4864:20::336]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 05A346152 for ; Mon, 12 Dec 2022 10:07:45 -0800 (PST) Received: by mail-wm1-x336.google.com with SMTP id i187-20020a1c3bc4000000b003d21f02fbaaso443478wma.4 for ; Mon, 12 Dec 2022 10:07:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=8xbJ67M7jKeuB1IJ5u3bcr0Za5IuyIS26G5fd5X0pUA=; b=fa/TInl4rJ2lDHUu5pDHgcAEOUC2/WYrg9+qcebp/lkZ8OeOls//4/jDHGVQjpKfpw TKtJY556TrXdt+grSc2oM5LoQj6rw7NMQyzgMH6NkJ/YdMn5RMzkCe3spTsJmW9tQOyH dnd8Ib5JaCvll3f8S7aIq+o3n7wvZdSEskaq0F7alC5SxLWzKI7/+0s0IPX8UW1dwaEM ajAU2Gmyn4XQ94AgicH9gDUpzt8BR9CoLURbRry74KWXsFZtQ41FyHNfQ8tu9B7BBsjU cxPQU6w3qsd7m6BhxWshl+2a1LZB1otDmO1qM/8N6U8m7dIaV9ap8NJBfBhGCgGa3XDh jzfQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=8xbJ67M7jKeuB1IJ5u3bcr0Za5IuyIS26G5fd5X0pUA=; b=Cl6nLowaWUTuGumi9kai8pkObc5OUoq8y1om94mf0vo3imj9Hwt9R82Fov6OjHqLih z8e0Mo43xFIur4M7Qt4pZDfwoPMTWn7HHMFMzjLXcxnKB2ZNdSpMgFD7Bx5uniVeNtfs AxhtRkyWxgtxkEyHung330Br6Yk1eTXh62b0DNWPxOHHvVLasp+DikYFJCOQDFuIzrBe d9TevqmVvpQX+KQEiOzqn/L2H/3MFScalKbR/C020ITdo2YT6Fc1aAYQYSKs1kgOr/1W EpL9iSBz+dd5LpDlILmpMM6DtX+Q1RdXOPB3Qf4DV5INUnwBkzfX4K80fLMudzkNPjXb dtCg== X-Gm-Message-State: ANoB5plHqMqkbm+o8/n2UWplj00aciD5eo1fc1c/myRzVlY9bhz3EF8q b9c0JoL3MbNAqywa+euXpqaAAQ== X-Google-Smtp-Source: AA0mqf6Bytvk/F6U22VWQx4z6V2kb2UXjONKxGpmi3o1oRmp2cGf8KUnDe8XAi0fsPVsM+XJjpHNlg== X-Received: by 2002:a05:600c:2215:b0:3cf:6d5b:875e with SMTP id z21-20020a05600c221500b003cf6d5b875emr13385139wml.12.1670868464393; Mon, 12 Dec 2022 10:07:44 -0800 (PST) Received: from localhost.localdomain (host-78-150-37-98.as13285.net. [78.150.37.98]) by smtp.gmail.com with ESMTPSA id t123-20020a1c4681000000b003a3170a7af9sm10156808wma.4.2022.12.12.10.07.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Dec 2022 10:07:44 -0800 (PST) From: Sudip Mukherjee To: Serge Semin , Mark Brown , Rob Herring , Krzysztof Kozlowski Cc: jude.onyenegecha@sifive.com, ben.dooks@sifive.com, jeegar.lakhani@sifive.com, linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sudip Mukherjee Subject: [PATCH v2 03/15] spi: dw: update SPI_CTRLR0 register Date: Mon, 12 Dec 2022 18:07:20 +0000 Message-Id: <20221212180732.79167-4-sudip.mukherjee@sifive.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20221212180732.79167-1-sudip.mukherjee@sifive.com> References: <20221212180732.79167-1-sudip.mukherjee@sifive.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org If the SPI transfer is being done in enhanced mode then SPI_CTRLR0 register needs to be updated to mention the instruction length, address length, address and instruction transfer format, wait cycles. And, we also need to enable clock stretching. Signed-off-by: Sudip Mukherjee --- drivers/spi/spi-dw-core.c | 14 +++++++++++++- drivers/spi/spi-dw.h | 11 +++++++++++ 2 files changed, 24 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c index 8c47a4d14b666..d59401f16c47a 100644 --- a/drivers/spi/spi-dw-core.c +++ b/drivers/spi/spi-dw-core.c @@ -320,7 +320,7 @@ void dw_spi_update_config(struct dw_spi *dws, struct spi_device *spi, { struct dw_spi_chip_data *chip = spi_get_ctldata(spi); u32 cr0 = chip->cr0; - u32 speed_hz; + u32 speed_hz, spi_ctrlr0; u16 clk_div; /* CTRLR0[ 4/3: 0] or CTRLR0[ 20: 16] Data Frame Size */ @@ -365,6 +365,18 @@ void dw_spi_update_config(struct dw_spi *dws, struct spi_device *spi, dw_writel(dws, DW_SPI_RX_SAMPLE_DLY, chip->rx_sample_dly); dws->cur_rx_sample_dly = chip->rx_sample_dly; } + + if (cfg->spi_frf != DW_SPI_CTRLR0_SPI_FRF_STD_SPI) { + spi_ctrlr0 = DW_SPI_SPI_CTRLR0_CLK_STRETCH_EN; + spi_ctrlr0 |= FIELD_PREP(DW_SPI_SPI_CTRLR0_WAIT_CYCLE_MASK, + cfg->wait_c); + spi_ctrlr0 |= FIELD_PREP(DW_SPI_SPI_CTRLR0_INST_L_MASK, + cfg->inst_l); + spi_ctrlr0 |= FIELD_PREP(DW_SPI_SPI_CTRLR0_ADDR_L_MASK, + cfg->addr_l); + spi_ctrlr0 |= cfg->trans_t; + dw_writel(dws, DW_SPI_SPI_CTRLR0, spi_ctrlr0); + } } EXPORT_SYMBOL_NS_GPL(dw_spi_update_config, SPI_DW_CORE); diff --git a/drivers/spi/spi-dw.h b/drivers/spi/spi-dw.h index 414a415deb42a..f29d89d05f34b 100644 --- a/drivers/spi/spi-dw.h +++ b/drivers/spi/spi-dw.h @@ -63,6 +63,7 @@ #define DW_SPI_DR 0x60 #define DW_SPI_RX_SAMPLE_DLY 0xf0 #define DW_SPI_CS_OVERRIDE 0xf4 +#define DW_SPI_SPI_CTRLR0 0xf4 /* Bit fields in CTRLR0 (DWC APB SSI) */ #define DW_PSSI_CTRLR0_DFS_MASK GENMASK(3, 0) @@ -126,6 +127,12 @@ #define DW_SPI_DMACR_RDMAE BIT(0) #define DW_SPI_DMACR_TDMAE BIT(1) +/* Bit fields in SPI_CTRLR0 */ +#define DW_SPI_SPI_CTRLR0_CLK_STRETCH_EN BIT(30) +#define DW_SPI_SPI_CTRLR0_WAIT_CYCLE_MASK GENMASK(15, 11) +#define DW_SPI_SPI_CTRLR0_INST_L_MASK GENMASK(9, 8) +#define DW_SPI_SPI_CTRLR0_ADDR_L_MASK GENMASK(5, 2) + /* Mem/DMA operations helpers */ #define DW_SPI_WAIT_RETRIES 5 #define DW_SPI_BUF_SIZE \ @@ -141,6 +148,10 @@ struct dw_spi_cfg { u32 ndf; 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[78.150.37.98]) by smtp.gmail.com with ESMTPSA id t123-20020a1c4681000000b003a3170a7af9sm10156808wma.4.2022.12.12.10.07.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Dec 2022 10:07:44 -0800 (PST) From: Sudip Mukherjee To: Serge Semin , Mark Brown , Rob Herring , Krzysztof Kozlowski Cc: jude.onyenegecha@sifive.com, ben.dooks@sifive.com, jeegar.lakhani@sifive.com, linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sudip Mukherjee Subject: [PATCH v2 04/15] spi: dw: add check for support of enhanced spi Date: Mon, 12 Dec 2022 18:07:21 +0000 Message-Id: <20221212180732.79167-5-sudip.mukherjee@sifive.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20221212180732.79167-1-sudip.mukherjee@sifive.com> References: <20221212180732.79167-1-sudip.mukherjee@sifive.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Before doing the mem op, spi controller will be queried about the buswidths it supports. Add the dual/quad/octal if the controller has the DW_SPI_CAP_EMODE capability. The DW_SPI_CAP_EMODE capability will be enabled in a later patch. Signed-off-by: Sudip Mukherjee --- drivers/spi/spi-dw-core.c | 25 ++++++++++++++++++++++++- drivers/spi/spi-dw.h | 1 + 2 files changed, 25 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c index d59401f16c47a..49fad58ceb94a 100644 --- a/drivers/spi/spi-dw-core.c +++ b/drivers/spi/spi-dw-core.c @@ -510,6 +510,26 @@ static int dw_spi_adjust_mem_op_size(struct spi_mem *mem, struct spi_mem_op *op) return 0; } +static bool dw_spi_supports_enh_mem_op(struct spi_mem *mem, + const struct spi_mem_op *op) +{ + if (op->addr.nbytes != 0 && op->addr.buswidth != 1 && + op->addr.buswidth != op->data.buswidth) + return false; + + if (op->cmd.buswidth != 1 && op->cmd.buswidth != op->addr.buswidth && + op->cmd.buswidth != op->data.buswidth) + return false; + + if (op->dummy.nbytes != 0 && op->data.dir == SPI_MEM_DATA_OUT) + return false; + + if (op->dummy.nbytes != 0 && op->dummy.nbytes / op->dummy.buswidth > 4) + return false; + + return spi_mem_default_supports_op(mem, op); +} + static bool dw_spi_supports_mem_op(struct spi_mem *mem, const struct spi_mem_op *op) { @@ -792,7 +812,10 @@ static void dw_spi_init_mem_ops(struct dw_spi *dws) if (!dws->mem_ops.exec_op && !(dws->caps & DW_SPI_CAP_CS_OVERRIDE) && !dws->set_cs) { dws->mem_ops.adjust_op_size = dw_spi_adjust_mem_op_size; - dws->mem_ops.supports_op = dw_spi_supports_mem_op; + if (dws->caps & DW_SPI_CAP_EMODE) + dws->mem_ops.supports_op = dw_spi_supports_enh_mem_op; + else + dws->mem_ops.supports_op = dw_spi_supports_mem_op; dws->mem_ops.exec_op = dw_spi_exec_mem_op; if (!dws->max_mem_freq) dws->max_mem_freq = dws->max_freq; diff --git a/drivers/spi/spi-dw.h b/drivers/spi/spi-dw.h index f29d89d05f34b..327d037bdb10e 100644 --- a/drivers/spi/spi-dw.h +++ b/drivers/spi/spi-dw.h @@ -34,6 +34,7 @@ /* DW SPI controller capabilities */ #define DW_SPI_CAP_CS_OVERRIDE BIT(0) #define DW_SPI_CAP_DFS32 BIT(1) +#define DW_SPI_CAP_EMODE BIT(2) /* Register offsets (Generic for both DWC APB SSI and DWC SSI IP-cores) */ #define DW_SPI_CTRLR0 0x00 From patchwork Mon Dec 12 18:07:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sudip Mukherjee X-Patchwork-Id: 633755 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9E82CC4167B for ; Mon, 12 Dec 2022 18:08:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232280AbiLLSIv (ORCPT ); Mon, 12 Dec 2022 13:08:51 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33580 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233212AbiLLSIQ (ORCPT ); Mon, 12 Dec 2022 13:08:16 -0500 Received: from mail-wm1-x329.google.com (mail-wm1-x329.google.com [IPv6:2a00:1450:4864:20::329]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4138F6339 for ; Mon, 12 Dec 2022 10:07:47 -0800 (PST) Received: by mail-wm1-x329.google.com with SMTP id b24-20020a05600c4a9800b003d21efdd61dso4400536wmp.3 for ; Mon, 12 Dec 2022 10:07:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=MsoM+2FQBABifbzzxTm/pfwezHeQcE6N/+8ll5MsoOw=; b=Md4f76Y0GJL7Vusa6Dqcb75nScdp9KXiro9C6IUfaV5m/P2cv0FNSMcyKuhcRr9moJ RKXVyj6Hga4nhoIZG59Dtp5eKMln5OP8+USKZMHuyNledotanueS+ZWKILZAhsj/CCdL 5WYRPvL4/mJ0CvhHGl1xk/5snCv/sMCEhprJflSP47TnRgbSPRMqxT9NbsMc0O2igNen esg7TeKa5T6GqfZvtqwbE359U4TGNMSb6l3StEnxQOQxu2B7YOyT5EiU9lJsQCj4nDhQ YFWvQ3t1dcwlmLXT9/+476ETjI/b84lPxPOpS8EZriHQWkwOZqTh2UXMiouAce0ox7Mj E09Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=MsoM+2FQBABifbzzxTm/pfwezHeQcE6N/+8ll5MsoOw=; b=gTI73Lg2rDnm+4TpqiJSYYyywt5pwoWHU9/4tvo+Dd00H6jHSBDk/40E9N0fIqyeyQ pSSA6xl+lT4Gwp9U5PokfZDJMpKLucF/YfHMNjgxqj0R3Np32Fpsz+suX6x5Q4IOf1Ih IlBZCLpYdKP+nUbzGOTTF8IveTuwMEieqVeDNz3Jk+WqIo4MIkVPb/xr8o4sWkKd/bBj ccsui+L6fwLN6BtTc+1oV1eCLsh9Awo5y5WW0C3L9A6lwW/GSC0XzwGSCEZXnSE0/wDP w+YBJQA+jODvFUe8O4YVyCJXj5EPxBgTPPcwigxVytJSA2KY1dGkpMkhY8C8CURPrr/l RchQ== X-Gm-Message-State: ANoB5pner5xLobxQr21ubGRLZlItpu/XiFhEMkcGNTF9D6UvGkUipCNn laCgEFeFXgcDt4abwdBPejrVng== X-Google-Smtp-Source: AA0mqf58t5AAEzi2mt41RHcVRzC+q6XS9ky+fMUt4rgRNTY0Dq23Pd0YT8xJH5fSQPmdLlJ73IBW4g== X-Received: by 2002:a05:600c:3c95:b0:3d0:4af1:a36e with SMTP id bg21-20020a05600c3c9500b003d04af1a36emr13112831wmb.26.1670868466182; Mon, 12 Dec 2022 10:07:46 -0800 (PST) Received: from localhost.localdomain (host-78-150-37-98.as13285.net. [78.150.37.98]) by smtp.gmail.com with ESMTPSA id t123-20020a1c4681000000b003a3170a7af9sm10156808wma.4.2022.12.12.10.07.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Dec 2022 10:07:45 -0800 (PST) From: Sudip Mukherjee To: Serge Semin , Mark Brown , Rob Herring , Krzysztof Kozlowski Cc: jude.onyenegecha@sifive.com, ben.dooks@sifive.com, jeegar.lakhani@sifive.com, linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sudip Mukherjee Subject: [PATCH v2 05/15] spi: dw: Introduce enhanced mem_op Date: Mon, 12 Dec 2022 18:07:22 +0000 Message-Id: <20221212180732.79167-6-sudip.mukherjee@sifive.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20221212180732.79167-1-sudip.mukherjee@sifive.com> References: <20221212180732.79167-1-sudip.mukherjee@sifive.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org If the DW_SPI_CAP_EMODE capability is enabled then dw_spi_exec_enh_mem_op() will be used as the new enhanced mem_op. Lets initialize the buffer and get the pointers to receive and transmit data buffers. The DW_SPI_CAP_EMODE capability will be enabled in a later patch. Signed-off-by: Sudip Mukherjee --- drivers/spi/spi-dw-core.c | 53 ++++++++++++++++++++++++++++++++++++--- 1 file changed, 50 insertions(+), 3 deletions(-) diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c index 49fad58ceb94a..89438ae2df17d 100644 --- a/drivers/spi/spi-dw-core.c +++ b/drivers/spi/spi-dw-core.c @@ -798,6 +798,51 @@ static int dw_spi_exec_mem_op(struct spi_mem *mem, const struct spi_mem_op *op) return ret; } +static void dw_spi_init_enh_mem_buf(struct dw_spi *dws, const struct spi_mem_op *op) +{ + unsigned int i, j; + u8 *out; + + out = dws->buf; + for (i = 0; i < DW_SPI_BUF_SIZE; ++i) + out[i] = 0; + + for (i = 0, j = op->cmd.nbytes; i < op->cmd.nbytes; ++i, --j) + out[i] = DW_SPI_GET_BYTE(op->cmd.opcode, op->cmd.nbytes - j); + + for (j = op->addr.nbytes, i = dws->reg_io_width; j > 0; ++i, --j) + out[i] = DW_SPI_GET_BYTE(op->addr.val, op->addr.nbytes - j); + + dws->n_bytes = 1; + if (op->data.dir == SPI_MEM_DATA_IN) { + dws->rx = op->data.buf.in; + dws->rx_len = op->data.nbytes; + dws->tx = NULL; + dws->tx_len = 0; + } else if (op->data.dir == SPI_MEM_DATA_OUT) { + dws->tx_len = op->data.nbytes; + dws->tx = (void *)op->data.buf.out; + dws->rx = NULL; + dws->rx_len = 0; + } else { + dws->rx = NULL; + dws->rx_len = 0; + dws->tx = NULL; + dws->tx_len = 0; + } +} + +static int dw_spi_exec_enh_mem_op(struct spi_mem *mem, const struct spi_mem_op *op) +{ + struct spi_controller *ctlr = mem->spi->controller; + struct dw_spi *dws = spi_controller_get_devdata(ctlr); + + /* Collect cmd and addr into a single buffer */ + dw_spi_init_enh_mem_buf(dws, op); + + return 0; +} + /* * Initialize the default memory operations if a glue layer hasn't specified * custom ones. Direct mapping operations will be preserved anyway since DW SPI @@ -812,11 +857,13 @@ static void dw_spi_init_mem_ops(struct dw_spi *dws) if (!dws->mem_ops.exec_op && !(dws->caps & DW_SPI_CAP_CS_OVERRIDE) && !dws->set_cs) { dws->mem_ops.adjust_op_size = dw_spi_adjust_mem_op_size; - if (dws->caps & DW_SPI_CAP_EMODE) + if (dws->caps & DW_SPI_CAP_EMODE) { + dws->mem_ops.exec_op = dw_spi_exec_enh_mem_op; dws->mem_ops.supports_op = dw_spi_supports_enh_mem_op; - else + } else { + dws->mem_ops.exec_op = dw_spi_exec_mem_op; dws->mem_ops.supports_op = dw_spi_supports_mem_op; - dws->mem_ops.exec_op = dw_spi_exec_mem_op; + } if (!dws->max_mem_freq) dws->max_mem_freq = dws->max_freq; } From patchwork Mon Dec 12 18:07:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sudip Mukherjee X-Patchwork-Id: 633754 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C0877C4708D for ; Mon, 12 Dec 2022 18:09:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233410AbiLLSJE (ORCPT ); Mon, 12 Dec 2022 13:09:04 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33582 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233030AbiLLSIS (ORCPT ); Mon, 12 Dec 2022 13:08:18 -0500 Received: from mail-wm1-x32c.google.com (mail-wm1-x32c.google.com [IPv6:2a00:1450:4864:20::32c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8BBCB3880 for ; Mon, 12 Dec 2022 10:07:48 -0800 (PST) Received: by mail-wm1-x32c.google.com with SMTP id i187-20020a1c3bc4000000b003d21f02fbaaso443602wma.4 for ; Mon, 12 Dec 2022 10:07:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=7rbzmysLo8UW53GKP6EF+15VfNqhz3A+mC6FctnQIOA=; b=gI2UE7AismxqoIKynMFVv4fJQTIarPf1JhZ2jt3s+S8eY2SboNYAkPEtv5xZM/hLMp RT2hjAWlFKl8SmBbkImJgUalzAdDnu6Ygzwaw2KLTqgi7O5NzRbiVWsnrl2NkAKeo94D Z2fG4eKLJsBeJ5U3DZWrEgs+rmvVmKQ8yMnvtVIpCeR/vMZA7afzxpBis/mm0DyLJH/5 hivFHl/yLjHdKuOxOh8TpFBCj++NcXwWo9IqFc9Ovcvi4uSt1JuHq5L1/5/hrY/9j5wK 4Po4rJKbT6vvANrzNQ5SvcapGFVLVK72tooGeoEL/+Uk+szlAfvd/5YYesICfsc1j0fu Wt9A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=7rbzmysLo8UW53GKP6EF+15VfNqhz3A+mC6FctnQIOA=; b=MdBQFrpvhFNG/GURtT+EgJF1rszjGO17n3JAS+9cBtfai+FWXNHdV19WuVnM3UCUW+ ppYfYiT6HGagnXmwb3b35v3YdJX7M0xNpJUFI+GyFl7IgzAL0D0hjgsgauG7SlEIod9H BGR605eFOclo0qZXeQ0ijAhJv7mzR/v794jXDYYvozdRpBKzoZtsPC1WC73MlyXdNFXK T+MVd0LSzaiShxD8iIZv8Au5w8G3k2k3Id4SidAS/I9KmgzJXBYtet3TNB0ijy92Px27 DT3yqTrx3XYcszyo5YQTK8kr2YJwIrJk//pS4a7yS0WvGYOM+pxwE0JiqwJZIjub+Eh5 0S8g== X-Gm-Message-State: ANoB5pmNh8Fy9isLttCzgD/0I/MQ+gHssRNwY6TzALEbzB5lYGnzDYpc 66+cNlfVA1ArewxSmR0BlVrxKg== X-Google-Smtp-Source: AA0mqf69G02dnbEggUXKEcvznXMXC3hHUQQD/NllSrd1eNaagBS4QYElw7nwJkrsHdJNx/3L8eo+fw== X-Received: by 2002:a05:600c:5386:b0:3c6:e63d:b893 with SMTP id hg6-20020a05600c538600b003c6e63db893mr13164832wmb.2.1670868467143; Mon, 12 Dec 2022 10:07:47 -0800 (PST) Received: from localhost.localdomain (host-78-150-37-98.as13285.net. [78.150.37.98]) by smtp.gmail.com with ESMTPSA id t123-20020a1c4681000000b003a3170a7af9sm10156808wma.4.2022.12.12.10.07.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Dec 2022 10:07:46 -0800 (PST) From: Sudip Mukherjee To: Serge Semin , Mark Brown , Rob Herring , Krzysztof Kozlowski Cc: jude.onyenegecha@sifive.com, ben.dooks@sifive.com, jeegar.lakhani@sifive.com, linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sudip Mukherjee Subject: [PATCH v2 06/15] spi: dw: Introduce dual/quad/octal spi Date: Mon, 12 Dec 2022 18:07:23 +0000 Message-Id: <20221212180732.79167-7-sudip.mukherjee@sifive.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20221212180732.79167-1-sudip.mukherjee@sifive.com> References: <20221212180732.79167-1-sudip.mukherjee@sifive.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org If the spi transfer is using dual/quad/octal spi mode, then we need to update the SPI_CTRLR0 register. The SPI_CTRLR0 register will be updated in dw_spi_update_config() via the values in dw_spi_cfg. Signed-off-by: Sudip Mukherjee --- Note: DW_SPI_SPI_CTRLR0_INST_L_INST_L16 will not work yet as spi_mem_default_supports_op() checks for op->cmd.nbytes != 1. drivers/spi/spi-dw-core.c | 46 +++++++++++++++++++++++++++++++++++++++ drivers/spi/spi-dw.h | 9 ++++++++ 2 files changed, 55 insertions(+) diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c index 89438ae2df17d..06169aa3f37bf 100644 --- a/drivers/spi/spi-dw-core.c +++ b/drivers/spi/spi-dw-core.c @@ -836,10 +836,56 @@ static int dw_spi_exec_enh_mem_op(struct spi_mem *mem, const struct spi_mem_op * { struct spi_controller *ctlr = mem->spi->controller; struct dw_spi *dws = spi_controller_get_devdata(ctlr); + struct dw_spi_cfg cfg; + + switch (op->data.buswidth) { + case 2: + cfg.spi_frf = DW_SPI_CTRLR0_SPI_FRF_DUAL_SPI; + break; + case 4: + cfg.spi_frf = DW_SPI_CTRLR0_SPI_FRF_QUAD_SPI; + break; + case 8: + cfg.spi_frf = DW_SPI_CTRLR0_SPI_FRF_OCT_SPI; + break; + default: + return dw_spi_exec_mem_op(mem, op); + } /* Collect cmd and addr into a single buffer */ dw_spi_init_enh_mem_buf(dws, op); + cfg.dfs = 8; + cfg.freq = clamp(mem->spi->max_speed_hz, 0U, dws->max_mem_freq); + cfg.ndf = op->data.nbytes; + if (op->data.dir == SPI_MEM_DATA_IN) + cfg.tmode = DW_SPI_CTRLR0_TMOD_RO; + else + cfg.tmode = DW_SPI_CTRLR0_TMOD_TO; + if (op->data.buswidth == op->addr.buswidth && + op->data.buswidth == op->cmd.buswidth) + cfg.trans_t = DW_SPI_SPI_CTRLR0_TRANS_TYPE_TT2; + else if (op->data.buswidth == op->addr.buswidth) + cfg.trans_t = DW_SPI_SPI_CTRLR0_TRANS_TYPE_TT1; + else + cfg.trans_t = DW_SPI_SPI_CTRLR0_TRANS_TYPE_TT0; + + cfg.addr_l = clamp(op->addr.nbytes * 2, 0, 0xf); + if (op->cmd.nbytes > 1) + cfg.inst_l = DW_SPI_SPI_CTRLR0_INST_L_INST_L16; + else if (op->cmd.nbytes == 1) + cfg.inst_l = DW_SPI_SPI_CTRLR0_INST_L_INST_L8; + else + cfg.inst_l = DW_SPI_SPI_CTRLR0_INST_L_INST_L0; + + cfg.wait_c = (op->dummy.nbytes * (BITS_PER_BYTE / op->dummy.buswidth)); + + dw_spi_enable_chip(dws, 0); + + dw_spi_update_config(dws, mem->spi, &cfg); + + dw_spi_enable_chip(dws, 1); + return 0; } diff --git a/drivers/spi/spi-dw.h b/drivers/spi/spi-dw.h index 327d037bdb10e..494b830ad1026 100644 --- a/drivers/spi/spi-dw.h +++ b/drivers/spi/spi-dw.h @@ -101,6 +101,9 @@ #define DW_HSSI_CTRLR0_SPI_FRF_MASK GENMASK(23, 22) #define DW_PSSI_CTRLR0_SPI_FRF_MASK GENMASK(22, 21) #define DW_SPI_CTRLR0_SPI_FRF_STD_SPI 0x0 +#define DW_SPI_CTRLR0_SPI_FRF_DUAL_SPI 0x1 +#define DW_SPI_CTRLR0_SPI_FRF_QUAD_SPI 0x2 +#define DW_SPI_CTRLR0_SPI_FRF_OCT_SPI 0x3 /* Bit fields in CTRLR1 */ #define DW_SPI_NDF_MASK GENMASK(15, 0) @@ -132,7 +135,13 @@ #define DW_SPI_SPI_CTRLR0_CLK_STRETCH_EN BIT(30) #define DW_SPI_SPI_CTRLR0_WAIT_CYCLE_MASK GENMASK(15, 11) #define DW_SPI_SPI_CTRLR0_INST_L_MASK GENMASK(9, 8) +#define DW_SPI_SPI_CTRLR0_INST_L_INST_L0 0x0 +#define DW_SPI_SPI_CTRLR0_INST_L_INST_L8 0x2 +#define DW_SPI_SPI_CTRLR0_INST_L_INST_L16 0x3 #define DW_SPI_SPI_CTRLR0_ADDR_L_MASK GENMASK(5, 2) +#define DW_SPI_SPI_CTRLR0_TRANS_TYPE_TT0 0x0 +#define DW_SPI_SPI_CTRLR0_TRANS_TYPE_TT1 0x1 +#define DW_SPI_SPI_CTRLR0_TRANS_TYPE_TT2 0x2 /* Mem/DMA operations helpers */ #define DW_SPI_WAIT_RETRIES 5 From patchwork Mon Dec 12 18:07:24 2022 Content-Type: text/plain; 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[78.150.37.98]) by smtp.gmail.com with ESMTPSA id t123-20020a1c4681000000b003a3170a7af9sm10156808wma.4.2022.12.12.10.07.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Dec 2022 10:07:47 -0800 (PST) From: Sudip Mukherjee To: Serge Semin , Mark Brown , Rob Herring , Krzysztof Kozlowski Cc: jude.onyenegecha@sifive.com, ben.dooks@sifive.com, jeegar.lakhani@sifive.com, linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sudip Mukherjee Subject: [PATCH v2 07/15] spi: dw: send cmd and addr to start the spi transfer Date: Mon, 12 Dec 2022 18:07:24 +0000 Message-Id: <20221212180732.79167-8-sudip.mukherjee@sifive.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20221212180732.79167-1-sudip.mukherjee@sifive.com> References: <20221212180732.79167-1-sudip.mukherjee@sifive.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org In enhanced spi mode, read or write will start by sending the cmd and address (if present). Signed-off-by: Sudip Mukherjee --- drivers/spi/spi-dw-core.c | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c index 06169aa3f37bf..ecab0fbc847c7 100644 --- a/drivers/spi/spi-dw-core.c +++ b/drivers/spi/spi-dw-core.c @@ -832,6 +832,29 @@ static void dw_spi_init_enh_mem_buf(struct dw_spi *dws, const struct spi_mem_op } } +static void dw_spi_enh_write_cmd_addr(struct dw_spi *dws, const struct spi_mem_op *op) +{ + void *buf = dws->buf; + u32 txw; + + /* Send cmd as 32 bit value */ + if (buf) { + txw = *(u32 *)(buf); + dw_write_io_reg(dws, DW_SPI_DR, txw); + buf += dws->reg_io_width; + if (op->addr.nbytes) { + txw = *(u32 *)(buf); + dw_write_io_reg(dws, DW_SPI_DR, txw); + if (op->addr.nbytes > 4) { + /* address more than 32bit */ + buf += dws->reg_io_width; + txw = *(u32 *)(buf); + dw_write_io_reg(dws, DW_SPI_DR, txw); + } + } + } +} + static int dw_spi_exec_enh_mem_op(struct spi_mem *mem, const struct spi_mem_op *op) { struct spi_controller *ctlr = mem->spi->controller; @@ -886,6 +909,8 @@ static int dw_spi_exec_enh_mem_op(struct spi_mem *mem, const struct spi_mem_op * dw_spi_enable_chip(dws, 1); + dw_spi_enh_write_cmd_addr(dws, op); + return 0; } From patchwork Mon Dec 12 18:07:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sudip Mukherjee X-Patchwork-Id: 633753 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 54281C4167B for ; Mon, 12 Dec 2022 18:09:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233139AbiLLSJS (ORCPT ); Mon, 12 Dec 2022 13:09:18 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33530 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233296AbiLLSIV (ORCPT ); Mon, 12 Dec 2022 13:08:21 -0500 Received: from mail-wm1-x32c.google.com (mail-wm1-x32c.google.com [IPv6:2a00:1450:4864:20::32c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3420A6351 for ; Mon, 12 Dec 2022 10:07:50 -0800 (PST) Received: by mail-wm1-x32c.google.com with SMTP id ay40so6225733wmb.2 for ; Mon, 12 Dec 2022 10:07:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=d24laJpjlPXsikI4gRgK9kB14hlb2fbIBw6BPSu32y0=; b=S/NpoBGjfN26KWhKFia2yEWVXzcCGLKl3iPvRqG6nMr/HeB28cb7p17Tl2Pfwe2NgI A49T3jsjMZClY95HnDiYC2cu9DbbHtPz2gSQAanBFThW4w+6s1IaveRwGToG+tv/OwUe XvwFZA7vrjpAnTPKLpwa8aJYCniJwReC5tU417cjsD4PXI8C1j0NlwQeOJyb93436odr gneCb8V857iG4FhAR6x2Gr1wS9kwFeK4NeqvjGBohg8TKQbBKkfTHzh2wQmUHV+oQd/c 7knMzk+ZxQ6YxdwUUg6yVlqG77VS2pMBe8mttWMWteGvpjbDGdmBQOlWRenLOXLCiQ5/ X/QQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=d24laJpjlPXsikI4gRgK9kB14hlb2fbIBw6BPSu32y0=; b=YEavLVe0cDsi3D+p/JMNHUk2kfshOpglW06WcMsNDXsNqEpMpkhkBC9fXUcQyEsthJ ITSQCrX3D/bVB0W9XjsYoqh1bvn/NEmJmbb1agY8UT1WyiUrxBxdtprEXJMQNa1n9SL/ imXaVAOprN/k3XzqhwhWusMgTD+4o3OcJ0D2PzSU/iOC4j3Qk9IeytQVZItd8i4uYFik d9FM7b98HkmGHxDdB7mXeepe29neXFBL7pQdb2g9Gct6JOnOhta5XtETvLftyoaIjaGo jT4wlVApeYWQYO6o7L/q5oFQavosAK42R99v6G1FEs9yjX2f1U4qKdXPh8lt9y/RDC0s wrlA== X-Gm-Message-State: ANoB5pkIQyYGzNKJG/iuBTlcfYhZ2ME53EKUvKVXXMMdaCBp8WSxeKHD z8n+Ux1wxhXQ+DSMzJe/A73LUAhUjZxuvAJw X-Google-Smtp-Source: AA0mqf6Dwf6Ne2EGgBeVcKwYXluX5/3fmaGwz3tWfp8OG+Nmq2rXNCgTg9HSsNihd2RM2lA+MDStmw== X-Received: by 2002:a05:600c:17d5:b0:3d1:f2de:195a with SMTP id y21-20020a05600c17d500b003d1f2de195amr12809656wmo.32.1670868468901; Mon, 12 Dec 2022 10:07:48 -0800 (PST) Received: from localhost.localdomain (host-78-150-37-98.as13285.net. [78.150.37.98]) by smtp.gmail.com with ESMTPSA id t123-20020a1c4681000000b003a3170a7af9sm10156808wma.4.2022.12.12.10.07.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Dec 2022 10:07:48 -0800 (PST) From: Sudip Mukherjee To: Serge Semin , Mark Brown , Rob Herring , Krzysztof Kozlowski Cc: jude.onyenegecha@sifive.com, ben.dooks@sifive.com, jeegar.lakhani@sifive.com, linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sudip Mukherjee Subject: [PATCH v2 08/15] spi: dw: update irq setup to use multiple handler Date: Mon, 12 Dec 2022 18:07:25 +0000 Message-Id: <20221212180732.79167-9-sudip.mukherjee@sifive.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20221212180732.79167-1-sudip.mukherjee@sifive.com> References: <20221212180732.79167-1-sudip.mukherjee@sifive.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The current mem_ops is not using interrupt based transfer so dw_spi_irq_setup() only has one interrput handler to handle the non mem_ops transfers. We will use interrupt based transfers in enhanced spi and so we need a way to specify which irq handler to use. Signed-off-by: Sudip Mukherjee --- drivers/spi/spi-dw-core.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c index ecab0fbc847c7..f540165245a89 100644 --- a/drivers/spi/spi-dw-core.c +++ b/drivers/spi/spi-dw-core.c @@ -260,7 +260,8 @@ static irqreturn_t dw_spi_irq(int irq, void *dev_id) if (!irq_status) return IRQ_NONE; - if (!master->cur_msg) { + if (!master->cur_msg && dws->transfer_handler == + dw_spi_transfer_handler) { dw_spi_mask_intr(dws, 0xff); return IRQ_HANDLED; } @@ -380,7 +381,8 @@ void dw_spi_update_config(struct dw_spi *dws, struct spi_device *spi, } EXPORT_SYMBOL_NS_GPL(dw_spi_update_config, SPI_DW_CORE); -static void dw_spi_irq_setup(struct dw_spi *dws) +static void dw_spi_irq_setup(struct dw_spi *dws, + irqreturn_t (*t_handler)(struct dw_spi *)) { u16 level; u8 imask; @@ -394,7 +396,7 @@ static void dw_spi_irq_setup(struct dw_spi *dws) dw_writel(dws, DW_SPI_TXFTLR, level); dw_writel(dws, DW_SPI_RXFTLR, level - 1); - dws->transfer_handler = dw_spi_transfer_handler; + dws->transfer_handler = t_handler; imask = DW_SPI_INT_TXEI | DW_SPI_INT_TXOI | DW_SPI_INT_RXUI | DW_SPI_INT_RXOI | DW_SPI_INT_RXFI; @@ -486,7 +488,7 @@ static int dw_spi_transfer_one(struct spi_controller *master, else if (dws->irq == IRQ_NOTCONNECTED) return dw_spi_poll_transfer(dws, transfer); - dw_spi_irq_setup(dws); + dw_spi_irq_setup(dws, dw_spi_transfer_handler); return 1; } From patchwork Mon Dec 12 18:07:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sudip Mukherjee X-Patchwork-Id: 633311 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EF463C4332F for ; Mon, 12 Dec 2022 18:09:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233424AbiLLSJR (ORCPT ); Mon, 12 Dec 2022 13:09:17 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33674 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232974AbiLLSIU (ORCPT ); Mon, 12 Dec 2022 13:08:20 -0500 Received: from mail-wm1-x336.google.com (mail-wm1-x336.google.com [IPv6:2a00:1450:4864:20::336]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 340FA5F8A for ; Mon, 12 Dec 2022 10:07:50 -0800 (PST) Received: by mail-wm1-x336.google.com with SMTP id i187-20020a1c3bc4000000b003d21f02fbaaso443726wma.4 for ; Mon, 12 Dec 2022 10:07:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=U8uXFQDQkqLQIMCCxoCS+6jURPh07ZY2kozA9MFfN3M=; b=WyMYo3JOmKqR6l1OTjzSAVzd/O6pzzj38Z8131LC916E6Bjpk6YUmO/UGsza5Qfu/N WF1eGeJubEX7OWJu1Buj8ONi3vtB//zq+MFRrmPjPhCw9sHj2Q+2xIqp0gS8pX6x9CgW 2FM/3QzPb1B8BgDFwRJ6Dia2koBzZQv8rBROfQ+sQcUHs1we2jAzhrSL0AEb9QgBZ0eJ jmWs2mG13FYebAS3JQ043Vl6lqRmadTWurytHmlopBV/HKJpcsilZxFMxbRwLzfduc2l 3s319UftBuIDMk6mAFewnSLQyMtZ2tr4WC3o9Tm3bbbRm0y12EBQ8ryJwxrWgrbtlueF KRkA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=U8uXFQDQkqLQIMCCxoCS+6jURPh07ZY2kozA9MFfN3M=; b=rsTxnaYX9zGNyu8URRyDhu631cqTRKdtqRqWnlihRL+UIIll/Q7kMNVRiLJDl1d2Jb 5eqHqanHa2aQ/MEkS5I1/1C2+gmOfLNMPDdQgHezEz2gBXqjw+6QIX9XZSfZc96QzAvR C6dNvJd9qqmoS7Kl+Zs5772bvv+/AyWYQCB4RryLP5CwaHpauIIsBfCKfaZHPqeVNxZ+ bPJRf3o+BJbBlt8EkcPq2BSlQ3k+Qumh9r16vuL15jk6V+6PwGnBLyL07p2k1QrJQXdY jnwpo1G7dA63IKQiULZZc0heVZQnjFAvhTjPcfyrEaakQCeAPKzkuEbMJRAlvCYQ+dbb rFeA== X-Gm-Message-State: ANoB5pkdSzez5bKFwMtklS1bEuwX1JiImhozjph8zSIG/DxVGBzodmBe G+b5NrgjyL+AWItMLU+U+4ktKQ== X-Google-Smtp-Source: AA0mqf6b79xT/oO0cekZ5BaCDQCbXRdsCcbTP9RoWft1JiWLKKW8AR/nkgvIL2DzS5OU8fjYcZsWbA== X-Received: by 2002:a05:600c:4fd0:b0:3d1:c0a1:4804 with SMTP id o16-20020a05600c4fd000b003d1c0a14804mr13434541wmq.17.1670868469792; Mon, 12 Dec 2022 10:07:49 -0800 (PST) Received: from localhost.localdomain (host-78-150-37-98.as13285.net. [78.150.37.98]) by smtp.gmail.com with ESMTPSA id t123-20020a1c4681000000b003a3170a7af9sm10156808wma.4.2022.12.12.10.07.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Dec 2022 10:07:49 -0800 (PST) From: Sudip Mukherjee To: Serge Semin , Mark Brown , Rob Herring , Krzysztof Kozlowski Cc: jude.onyenegecha@sifive.com, ben.dooks@sifive.com, jeegar.lakhani@sifive.com, linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sudip Mukherjee Subject: [PATCH v2 09/15] spi: dw: use irq handler for enhanced spi Date: Mon, 12 Dec 2022 18:07:26 +0000 Message-Id: <20221212180732.79167-10-sudip.mukherjee@sifive.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20221212180732.79167-1-sudip.mukherjee@sifive.com> References: <20221212180732.79167-1-sudip.mukherjee@sifive.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Introduce the interrupt handler for enhanced spi to read or write based on the generated irq. Also, use the xfer_completion from spi_controller to wait for a timeout or completion from irq handler. Signed-off-by: Sudip Mukherjee --- drivers/spi/spi-dw-core.c | 62 ++++++++++++++++++++++++++++++++++++++- 1 file changed, 61 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c index f540165245a89..10d453228368f 100644 --- a/drivers/spi/spi-dw-core.c +++ b/drivers/spi/spi-dw-core.c @@ -251,6 +251,34 @@ static irqreturn_t dw_spi_transfer_handler(struct dw_spi *dws) return IRQ_HANDLED; } +static irqreturn_t dw_spi_enh_handler(struct dw_spi *dws) +{ + u16 irq_status = dw_readl(dws, DW_SPI_ISR); + + if (dw_spi_check_status(dws, false)) { + spi_finalize_current_transfer(dws->master); + return IRQ_HANDLED; + } + + if (irq_status & DW_SPI_INT_RXFI) { + dw_reader(dws); + if (dws->rx_len <= dw_readl(dws, DW_SPI_RXFTLR)) + dw_writel(dws, DW_SPI_RXFTLR, dws->rx_len - 1); + } + + if (irq_status & DW_SPI_INT_TXEI) + dw_writer(dws); + + if (!dws->tx_len && dws->rx_len) { + dw_spi_mask_intr(dws, DW_SPI_INT_TXEI); + } else if (!dws->rx_len && !dws->tx_len) { + dw_spi_mask_intr(dws, 0xff); + spi_finalize_current_transfer(dws->master); + } + + return IRQ_HANDLED; +} + static irqreturn_t dw_spi_irq(int irq, void *dev_id) { struct spi_controller *master = dev_id; @@ -265,6 +293,12 @@ static irqreturn_t dw_spi_irq(int irq, void *dev_id) dw_spi_mask_intr(dws, 0xff); return IRQ_HANDLED; } + if ((dws->transfer_handler == dw_spi_enh_handler && + !dws->rx_len && !dws->tx_len)) { + dw_spi_mask_intr(dws, 0xff); + spi_finalize_current_transfer(master); + return IRQ_HANDLED; + } return dws->transfer_handler(dws); } @@ -862,6 +896,8 @@ static int dw_spi_exec_enh_mem_op(struct spi_mem *mem, const struct spi_mem_op * struct spi_controller *ctlr = mem->spi->controller; struct dw_spi *dws = spi_controller_get_devdata(ctlr); struct dw_spi_cfg cfg; + int ret = 0; + unsigned long long ms; switch (op->data.buswidth) { case 2: @@ -909,11 +945,35 @@ static int dw_spi_exec_enh_mem_op(struct spi_mem *mem, const struct spi_mem_op * dw_spi_update_config(dws, mem->spi, &cfg); + dw_spi_mask_intr(dws, 0xff); + reinit_completion(&ctlr->xfer_completion); dw_spi_enable_chip(dws, 1); dw_spi_enh_write_cmd_addr(dws, op); + dw_spi_set_cs(mem->spi, false); + dw_spi_irq_setup(dws, dw_spi_enh_handler); - return 0; + /* Use timeout calculation from spi_transfer_wait() */ + ms = 8LL * MSEC_PER_SEC * (dws->rx_len ? dws->rx_len : dws->tx_len); + do_div(ms, dws->current_freq); + + /* + * Increase it twice and add 200 ms tolerance, use + * predefined maximum in case of overflow. + */ + ms += ms + 200; + if (ms > UINT_MAX) + ms = UINT_MAX; + + ms = wait_for_completion_timeout(&ctlr->xfer_completion, + msecs_to_jiffies(ms)); + + dw_spi_stop_mem_op(dws, mem->spi); + + if (ms == 0) + ret = -EIO; + + return ret; } /* From patchwork Mon Dec 12 18:07:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sudip Mukherjee X-Patchwork-Id: 633752 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1DB11C10F1D for ; Mon, 12 Dec 2022 18:09:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233295AbiLLSJb (ORCPT ); Mon, 12 Dec 2022 13:09:31 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34376 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233300AbiLLSIW (ORCPT ); Mon, 12 Dec 2022 13:08:22 -0500 Received: from mail-wm1-x32b.google.com (mail-wm1-x32b.google.com [IPv6:2a00:1450:4864:20::32b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 93EF5638D for ; Mon, 12 Dec 2022 10:07:52 -0800 (PST) Received: by mail-wm1-x32b.google.com with SMTP id m19so6207893wms.5 for ; Mon, 12 Dec 2022 10:07:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=pQuE2K78uUlvCMGWFDZZHN9GOwoDWtlsbedBiWwRDfg=; b=jaHLnsIYEZXfnaU6a2ldMiE275sZuX9Wbq117I2Jw43JPyMxu5yo68Uj7Yy4ycmJYq PUU+LkMNy+SF81zAOHaS+BQhLkjgH+f+SfO+9q8ueaaMTUl1GJqJBJ3NhM8qojWlSrp7 MVoQtDGxSPWSWS30rW5bo4HsLRBgFJySBBdN/m9tNI/rX8f81dhAYmXSAh0rVY9wIwzY eil7uJupKi3DZb/is/7NEAJhn3eHqL9jQEutvZ9PBfwjzd2XQlpQTLCJmCgZlvsCwhZ1 v71KA5thTpBdW0xq+yO5YvO+xAuZR9nkEFA+djLJjQXonSxzmxygnS//vyON6nsl62Vp 298g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=pQuE2K78uUlvCMGWFDZZHN9GOwoDWtlsbedBiWwRDfg=; b=mQ7gHE1bYxuhvTn+JtibXtYEe+KVAZ8bbQ0kbU0vRu4RXas21CZdxC+OiMmwvslzU4 hkcKGVTFXQRZmZVN/U5jdK0p+JUsXZ16a8EoRQxfuZdUF+MMSi5IfW8YuHkK7HgFyS61 DaeBFBofcOoxI/t0LgLaAE5D6CLavpLu0OyJdoqh6U+y57vm+qRTn73UkwgAi1X+vQwr 6cnByDEBn6QCVkY4EoLpXkRo+05eiMCgRHf22mZZTIrS3zmzwQgCGha5IKsSowxlJ954 HkZwc0QwSX+0Ypp4CnvX63ZNmshfdhKJ5Pm5Z4OT6/zTsRu4SMs2aPEKinEtAEM/EfIs Y91g== X-Gm-Message-State: ANoB5pk4WLxZe7vNHaEN+3ZtAw8iCUiljRyBHXohcsgHxOevj1RrFgjQ V9ffzZGNAb/b2dnFqtw6c6A88Q== X-Google-Smtp-Source: AA0mqf4YkjQSyvUPzCW5WFKTMeX06dUxr3FM0c1i93DR0EFe1wd0BuRBczuZcAm/hzFgM0p3opDFWg== X-Received: by 2002:a05:600c:1c90:b0:3d2:274d:be7c with SMTP id k16-20020a05600c1c9000b003d2274dbe7cmr3040697wms.19.1670868470682; Mon, 12 Dec 2022 10:07:50 -0800 (PST) Received: from localhost.localdomain (host-78-150-37-98.as13285.net. [78.150.37.98]) by smtp.gmail.com with ESMTPSA id t123-20020a1c4681000000b003a3170a7af9sm10156808wma.4.2022.12.12.10.07.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Dec 2022 10:07:50 -0800 (PST) From: Sudip Mukherjee To: Serge Semin , Mark Brown , Rob Herring , Krzysztof Kozlowski Cc: jude.onyenegecha@sifive.com, ben.dooks@sifive.com, jeegar.lakhani@sifive.com, linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sudip Mukherjee Subject: [PATCH v2 10/15] spi: dw: Calculate Receive FIFO Threshold Level Date: Mon, 12 Dec 2022 18:07:27 +0000 Message-Id: <20221212180732.79167-11-sudip.mukherjee@sifive.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20221212180732.79167-1-sudip.mukherjee@sifive.com> References: <20221212180732.79167-1-sudip.mukherjee@sifive.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org In enhanced mode we need to calculate RXFTLR based on the length of data we are expecting to receive or the fifo length. Signed-off-by: Sudip Mukherjee --- drivers/spi/spi-dw-core.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c index 10d453228368f..75f5ce5f377ca 100644 --- a/drivers/spi/spi-dw-core.c +++ b/drivers/spi/spi-dw-core.c @@ -428,6 +428,14 @@ static void dw_spi_irq_setup(struct dw_spi *dws, */ level = min_t(u16, dws->fifo_len / 2, dws->tx_len); dw_writel(dws, DW_SPI_TXFTLR, level); + + /* + * In enhanced mode if we are reading then tx_len is 0 as we + * have nothing to transmit. Calculate DW_SPI_RXFTLR with + * rx_len. + */ + if (t_handler == dw_spi_enh_handler) + level = min_t(u16, dws->fifo_len / 2, dws->rx_len); dw_writel(dws, DW_SPI_RXFTLR, level - 1); dws->transfer_handler = t_handler; From patchwork Mon Dec 12 18:07:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sudip Mukherjee X-Patchwork-Id: 633309 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8D789C10F31 for ; Mon, 12 Dec 2022 18:09:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233015AbiLLSJ3 (ORCPT ); Mon, 12 Dec 2022 13:09:29 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34372 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233303AbiLLSIX (ORCPT ); Mon, 12 Dec 2022 13:08:23 -0500 Received: from mail-wm1-x32c.google.com (mail-wm1-x32c.google.com [IPv6:2a00:1450:4864:20::32c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 93BD42676 for ; Mon, 12 Dec 2022 10:07:51 -0800 (PST) Received: by mail-wm1-x32c.google.com with SMTP id c65-20020a1c3544000000b003cfffd00fc0so5927189wma.1 for ; Mon, 12 Dec 2022 10:07:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=mtPRqcnGnMJu3Lhjzyyt2cKQspWuIhSj33OJnrwCIF0=; b=dic+olsWhbv9Bdud+svAQHzZHug2lLj+vz7hVn19EyP7/8WryNdN+/Ac8gMCuGBZkU uYZwRo2TdqRr2c8T+9GTVOsdjr0TIK2krifSwPPBfojcXy38wrxCPtFgvLg/NfY76g7t 8e/XIrRELDolos2n0GIeUN65WLoTfz2BkcpPlxs4fH3aWc+6fg+1UfhgDt9k/sQzXX/3 qDcadSlnFCH7ygbGyjKNYFi0sxiqgIedHIgUjC5yA/Lw30AVOO8CAwWFHHIdo+IZigWT xbofJbDupAmmm8nls29Ol+1RZQDApqRklwcZZfKdp63b9my0f4ojm9npEEgof4KOHjHi lwzg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=mtPRqcnGnMJu3Lhjzyyt2cKQspWuIhSj33OJnrwCIF0=; b=y1X1gG3mVgEMBRouIg9v/tz933CFUizM/XMXpb+Doez8bSCfawL72WJuGWTxFi2pUZ lGdnIAvT7nNBJnvZLhiU4E+zKsYHLP+MAPYx90xGHRAz9z1aNJ1ZSBcTe2+ZpshHVpLa FsmiJTgzGTH95inFai1m1wZqZQW5CcdGlkFVhQ1fzHxyffDgFXctDye4HUD108fdcGnw 7XUAH95NO3EbhSWSOkQ8I+7An2f6taDBq4MfuqyaujgIVzoMW3x8xPmK7BMMnA0aAHBc RHMLGWCBLDkZDcIQx6+mPR9es6B90Giujl4VyLdYPbm2T2CbNBpIH0t74K/sfA5glEZh XgUA== X-Gm-Message-State: ANoB5pkpYEGBi7FRSvhYAtJvRZO/AkwfpOYJGVeDSZz//kE8f8Z2lc1O NrIltZx7HZEZtwMoxL0YQ2mMhzSgq+Dr7PKg X-Google-Smtp-Source: AA0mqf6hJ3IGjFjKWW73Q+nkmeBNJDk+Q5JFDed1oLgVWBz52c2xQhXA5zTJWbzF7FiPmgqIn8pC9w== X-Received: by 2002:a05:600c:4147:b0:3d2:2904:dfe9 with SMTP id h7-20020a05600c414700b003d22904dfe9mr2396260wmm.21.1670868471634; Mon, 12 Dec 2022 10:07:51 -0800 (PST) Received: from localhost.localdomain (host-78-150-37-98.as13285.net. [78.150.37.98]) by smtp.gmail.com with ESMTPSA id t123-20020a1c4681000000b003a3170a7af9sm10156808wma.4.2022.12.12.10.07.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Dec 2022 10:07:51 -0800 (PST) From: Sudip Mukherjee To: Serge Semin , Mark Brown , Rob Herring , Krzysztof Kozlowski Cc: jude.onyenegecha@sifive.com, ben.dooks@sifive.com, jeegar.lakhani@sifive.com, linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sudip Mukherjee Subject: [PATCH v2 11/15] spi: dw: adjust size of mem_op Date: Mon, 12 Dec 2022 18:07:28 +0000 Message-Id: <20221212180732.79167-12-sudip.mukherjee@sifive.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20221212180732.79167-1-sudip.mukherjee@sifive.com> References: <20221212180732.79167-1-sudip.mukherjee@sifive.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org In enhanced mode adjust the size of the data that can be sent or received as this will then be used to set the NDF. Signed-off-by: Sudip Mukherjee --- drivers/spi/spi-dw-core.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c index 75f5ce5f377ca..dff7b419af304 100644 --- a/drivers/spi/spi-dw-core.c +++ b/drivers/spi/spi-dw-core.c @@ -546,6 +546,13 @@ static void dw_spi_handle_err(struct spi_controller *master, dw_spi_reset_chip(dws); } +static int dw_spi_adjust_enh_mem_op_size(struct spi_mem *mem, struct spi_mem_op *op) +{ + op->data.nbytes = clamp_val(op->data.nbytes, 0, DW_SPI_NDF_MASK + 1); + + return 0; +} + static int dw_spi_adjust_mem_op_size(struct spi_mem *mem, struct spi_mem_op *op) { if (op->data.dir == SPI_MEM_DATA_IN) @@ -997,13 +1004,14 @@ static void dw_spi_init_mem_ops(struct dw_spi *dws) { if (!dws->mem_ops.exec_op && !(dws->caps & DW_SPI_CAP_CS_OVERRIDE) && !dws->set_cs) { - dws->mem_ops.adjust_op_size = dw_spi_adjust_mem_op_size; if (dws->caps & DW_SPI_CAP_EMODE) { dws->mem_ops.exec_op = dw_spi_exec_enh_mem_op; dws->mem_ops.supports_op = dw_spi_supports_enh_mem_op; + dws->mem_ops.adjust_op_size = dw_spi_adjust_enh_mem_op_size; } else { dws->mem_ops.exec_op = dw_spi_exec_mem_op; dws->mem_ops.supports_op = dw_spi_supports_mem_op; + dws->mem_ops.adjust_op_size = dw_spi_adjust_mem_op_size; } if (!dws->max_mem_freq) dws->max_mem_freq = dws->max_freq; From patchwork Mon Dec 12 18:07:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sudip Mukherjee X-Patchwork-Id: 633310 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F3362C4167B for ; Mon, 12 Dec 2022 18:09:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232926AbiLLSJ1 (ORCPT ); Mon, 12 Dec 2022 13:09:27 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33926 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233231AbiLLSIW (ORCPT ); Mon, 12 Dec 2022 13:08:22 -0500 Received: from mail-wm1-x330.google.com (mail-wm1-x330.google.com [IPv6:2a00:1450:4864:20::330]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EAB2E63A0 for ; Mon, 12 Dec 2022 10:07:52 -0800 (PST) Received: by mail-wm1-x330.google.com with SMTP id h8-20020a1c2108000000b003d1efd60b65so5946049wmh.0 for ; Mon, 12 Dec 2022 10:07:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=1PouWW9hJEcBYWxPnr69aXYCEVweHPkB0XRBnvDzgi8=; b=hJkN3oUoHsJGYB6mkIx6Fb/Ziw+PnIzJMRXqveDSUGoW4Qe88FEqNgv8X4Sumt2D8X zNo5iEI6lcKh7/8fV3Ljs5yOEudvyH0YLhMMDK6bk4wPRwuUvrIcRBnZHyXnHt0iydtl dY3FDCnzxyxHe48B6rAFV72pFRR1b+EkqInEEukRfTuqs8+vR0kZHxxFGGaBgIIUsSzp sYemv3inoKIZOS/+fwqnXQdZyP+ndDxc2aRYzvls7+GHBt5ZBxDGgTobD9Y1bLGrAE7h LeyV5W6jyvKVHlF5T/bgFltIAD4sRHeJpChBwcwKPSlkkpVPEk8ocTjQnsu/gzlXaA7h at9A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=1PouWW9hJEcBYWxPnr69aXYCEVweHPkB0XRBnvDzgi8=; b=Tg185QWrej54yv664Vj5QDgJSqJV/CeBdM2ubRjmVZU5n7b/BRC0QhKgymkWwYVgRV zHdOE6GO88RkisLanIxWX2Z7ny/xAlKj1zMUEhxYRx1pknb7Fv9Lltz1ZlrCU9dRSL4k 2uTxiZiXkNMrRUbYMUGCb2D7Eo5E2t5K/WV9QBbIfPPTQisJE+puBvQyN3RvTEUV4xbm JyMVz0vx9KRIGHNDMhOK2O3ptgX5n/QS+XEh0thHMgA4e5rzX7vwBG/3/c3JpsA/SYoy zQYVh/iuB+IxIueTxCUDAPyHBCJVhaijGhC+yfNki5oAHG5PYJVS5ncK7iPPt5BMYSbl D/gQ== X-Gm-Message-State: ANoB5plQjLkmxXLQBs3avj85NCjW8DWUeUPyCBUMl26qDN5Y917yMJ/g uIOejVrdMIK8Jimsjui9y0bAYA== X-Google-Smtp-Source: AA0mqf6KuqKuwKMEwSFXB8pvf+HvVTEihfH4JWO5hjhU1Jcfgqd81BUXqa0E90oL+N7afvvLGkNRZw== X-Received: by 2002:a05:600c:2215:b0:3cf:6d5b:875e with SMTP id z21-20020a05600c221500b003cf6d5b875emr13385573wml.12.1670868472465; Mon, 12 Dec 2022 10:07:52 -0800 (PST) Received: from localhost.localdomain (host-78-150-37-98.as13285.net. [78.150.37.98]) by smtp.gmail.com with ESMTPSA id t123-20020a1c4681000000b003a3170a7af9sm10156808wma.4.2022.12.12.10.07.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Dec 2022 10:07:52 -0800 (PST) From: Sudip Mukherjee To: Serge Semin , Mark Brown , Rob Herring , Krzysztof Kozlowski Cc: jude.onyenegecha@sifive.com, ben.dooks@sifive.com, jeegar.lakhani@sifive.com, linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sudip Mukherjee Subject: [PATCH v2 12/15] spi: dw: Add retry for enhanced spi mode Date: Mon, 12 Dec 2022 18:07:29 +0000 Message-Id: <20221212180732.79167-13-sudip.mukherjee@sifive.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20221212180732.79167-1-sudip.mukherjee@sifive.com> References: <20221212180732.79167-1-sudip.mukherjee@sifive.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org If the connection to the spi device is not stable then the transfer can fail. Add retry for DW_SPI_WAIT_RETRIES times and print error if it still fails. Signed-off-by: Sudip Mukherjee --- drivers/spi/spi-dw-core.c | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c index dff7b419af304..cef56acd8d8fd 100644 --- a/drivers/spi/spi-dw-core.c +++ b/drivers/spi/spi-dw-core.c @@ -906,7 +906,7 @@ static void dw_spi_enh_write_cmd_addr(struct dw_spi *dws, const struct spi_mem_o } } -static int dw_spi_exec_enh_mem_op(struct spi_mem *mem, const struct spi_mem_op *op) +static int dw_spi_try_enh_mem_op(struct spi_mem *mem, const struct spi_mem_op *op) { struct spi_controller *ctlr = mem->spi->controller; struct dw_spi *dws = spi_controller_get_devdata(ctlr); @@ -991,6 +991,21 @@ static int dw_spi_exec_enh_mem_op(struct spi_mem *mem, const struct spi_mem_op * return ret; } +static int dw_spi_exec_enh_mem_op(struct spi_mem *mem, const struct spi_mem_op *op) +{ + struct spi_controller *ctlr = mem->spi->controller; + struct dw_spi *dws = spi_controller_get_devdata(ctlr); + int retry, ret = -EIO; + + for (retry = 0; retry < DW_SPI_WAIT_RETRIES && ret != 0; retry++) + ret = dw_spi_try_enh_mem_op(mem, op); + + if (retry == DW_SPI_WAIT_RETRIES) + dev_err(&dws->master->dev, "Retry of enh_mem_op failed\n"); + + return ret; +} + /* * Initialize the default memory operations if a glue layer hasn't specified * custom ones. Direct mapping operations will be preserved anyway since DW SPI From patchwork Mon Dec 12 18:07:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sudip Mukherjee X-Patchwork-Id: 633751 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2CF58C4332F for ; Mon, 12 Dec 2022 18:09:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233263AbiLLSJi (ORCPT ); Mon, 12 Dec 2022 13:09:38 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33938 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233312AbiLLSI0 (ORCPT ); Mon, 12 Dec 2022 13:08:26 -0500 Received: from mail-wm1-x32f.google.com (mail-wm1-x32f.google.com [IPv6:2a00:1450:4864:20::32f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C0512644C for ; Mon, 12 Dec 2022 10:07:54 -0800 (PST) Received: by mail-wm1-x32f.google.com with SMTP id m19so6208003wms.5 for ; Mon, 12 Dec 2022 10:07:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=yV6+oiSdPjciFRPPCXlaaf05DYc0wxneaaODGSgK2uE=; b=Y22bKRAfcHnmzs2KZUi6jIstXPxhHBZWZQH5o5L6ddrFcZLMEHUAdwjRJytIKvwvf0 3juKw7qaULaSH9BmLJJzWklC1rQP1dNXnzyCResSGkYz1io1zyQiBiUZDJCCoC4b4V1e BReayyJGtxjvP7ykcbjzzl1x33zjDHl1nfqybysn2Bi8Qfrr4kLnZoTp+8yb++Y28ONd MsJ9YW3nKTUTKr8llNSNoR4EhT8sUUhuOAmH+9U8CxFxH8oY/99G6qsORDUUfXtAAVQt WT6ZZS8CnZv4V5NHWb3atkwBsW7sbnLR8H3LqZLOOF1NDmSvcDR3tBRUVtDp2xLcGyKh FBcA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=yV6+oiSdPjciFRPPCXlaaf05DYc0wxneaaODGSgK2uE=; b=jOjVv5ZSBR7zfvnFxvR1ZJ89ZNfu4ePOGbzTphX4e/MPjNk7NznS0rYbjq0uM5BXY0 0KVBlUxwUPr3NcB1owf2nHSdpYchk1JAyM8Sg/gUjsMMUX++XkhDmI610M4zQYESPG5R 0JjPPB4og8TF4BMku+j4JqB2Djy+yhrnsW/prgqGiD7SlGHUuC7eVsIoFfdQP4dOu5FR IdRgug/nOk01YmJPhLSY38Y0DUvZqzmb2YUf8Xrvj/jgrXeMvYYnUixRjEkJAeTBYuoP t8aX+SQ6GxDG8RHIPTxfq7uNtkkqd+flyeERy1GIe/zVFDrUtRhIRFMC99vxsKuwc8++ nBNQ== X-Gm-Message-State: ANoB5pl0sxnKat7Xtlrt9D1gmFsDHdG6n0n1ghoOrPJMGusOIC5cTPXZ S0gW5iqs+pCxhPNX2sND2PaUOw== X-Google-Smtp-Source: AA0mqf63xZP9eTl0bysLtgyG3g0nG0GhxM23IddzbnhHOhlvfVKIYf4FEI66D1D0svRZXgN1mXFdcg== X-Received: by 2002:a05:600c:3508:b0:3cf:b73f:bf8f with SMTP id h8-20020a05600c350800b003cfb73fbf8fmr13614720wmq.7.1670868473356; Mon, 12 Dec 2022 10:07:53 -0800 (PST) Received: from localhost.localdomain (host-78-150-37-98.as13285.net. [78.150.37.98]) by smtp.gmail.com with ESMTPSA id t123-20020a1c4681000000b003a3170a7af9sm10156808wma.4.2022.12.12.10.07.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Dec 2022 10:07:53 -0800 (PST) From: Sudip Mukherjee To: Serge Semin , Mark Brown , Rob Herring , Krzysztof Kozlowski Cc: jude.onyenegecha@sifive.com, ben.dooks@sifive.com, jeegar.lakhani@sifive.com, linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sudip Mukherjee Subject: [PATCH v2 13/15] spi: dw: detect enhanced spi mode Date: Mon, 12 Dec 2022 18:07:30 +0000 Message-Id: <20221212180732.79167-14-sudip.mukherjee@sifive.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20221212180732.79167-1-sudip.mukherjee@sifive.com> References: <20221212180732.79167-1-sudip.mukherjee@sifive.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org All the SSI controllers supporting enhanced spi modes might not support all the three dual or quad or octal modes. Detect the modes that are supported and finally enable the DW_SPI_CAP_EMODE capability which will start using all the enhanced spi functions that has been added. Signed-off-by: Sudip Mukherjee --- drivers/spi/spi-dw-core.c | 68 +++++++++++++++++++++++++++++++++++++-- 1 file changed, 66 insertions(+), 2 deletions(-) diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c index cef56acd8d8fd..9e806d5878beb 100644 --- a/drivers/spi/spi-dw-core.c +++ b/drivers/spi/spi-dw-core.c @@ -1143,6 +1143,69 @@ static void dw_spi_hw_init(struct device *dev, struct dw_spi *dws) dw_writel(dws, DW_SPI_CS_OVERRIDE, 0xF); } +static u16 detect_enh_mode(struct dw_spi *dws) +{ + u16 mode = 0; + u32 tmp_spi_ctrlr0, tmp_ctrlr0, tmpdual, tmpquad, tmpoct; + + if (dw_spi_ver_is_ge(dws, HSSI, 103A)) { + tmpdual = FIELD_PREP(DW_HSSI_CTRLR0_SPI_FRF_MASK, + DW_SPI_CTRLR0_SPI_FRF_DUAL_SPI); + tmpquad = FIELD_PREP(DW_HSSI_CTRLR0_SPI_FRF_MASK, + DW_SPI_CTRLR0_SPI_FRF_QUAD_SPI); + tmpoct = FIELD_PREP(DW_HSSI_CTRLR0_SPI_FRF_MASK, + DW_SPI_CTRLR0_SPI_FRF_OCT_SPI); + } else if (dw_spi_ver_is_ge(dws, PSSI, 400A)) { + tmpdual = FIELD_PREP(DW_PSSI_CTRLR0_SPI_FRF_MASK, + DW_SPI_CTRLR0_SPI_FRF_DUAL_SPI); + tmpquad = FIELD_PREP(DW_PSSI_CTRLR0_SPI_FRF_MASK, + DW_SPI_CTRLR0_SPI_FRF_QUAD_SPI); + tmpoct = FIELD_PREP(DW_PSSI_CTRLR0_SPI_FRF_MASK, + DW_SPI_CTRLR0_SPI_FRF_OCT_SPI); + } else { + return DW_SPI_CTRLR0_SPI_FRF_STD_SPI; + } + + tmp_ctrlr0 = dw_readl(dws, DW_SPI_CTRLR0); + tmp_spi_ctrlr0 = dw_readl(dws, DW_SPI_SPI_CTRLR0); + dw_spi_enable_chip(dws, 0); + + /* test clock stretching */ + dw_writel(dws, DW_SPI_SPI_CTRLR0, DW_SPI_SPI_CTRLR0_CLK_STRETCH_EN); + if ((DW_SPI_SPI_CTRLR0_CLK_STRETCH_EN & dw_readl(dws, DW_SPI_SPI_CTRLR0)) != + DW_SPI_SPI_CTRLR0_CLK_STRETCH_EN) + /* + * If clock stretching is not enabled then do not use + * enhanced mode. + */ + goto disable_enh; + + /* test dual mode */ + dw_writel(dws, DW_SPI_CTRLR0, tmpdual); + if ((tmpdual & dw_readl(dws, DW_SPI_CTRLR0)) == tmpdual) + mode |= SPI_TX_DUAL | SPI_RX_DUAL; + + /* test quad mode */ + dw_writel(dws, DW_SPI_CTRLR0, tmpquad); + if ((tmpquad & dw_readl(dws, DW_SPI_CTRLR0)) == tmpquad) + mode |= SPI_TX_QUAD | SPI_RX_QUAD; + + /* test octal mode */ + dw_writel(dws, DW_SPI_CTRLR0, tmpoct); + if ((tmpoct & dw_readl(dws, DW_SPI_CTRLR0)) == tmpoct) + mode |= SPI_TX_OCTAL | SPI_RX_OCTAL; + + if (mode) + dws->caps |= DW_SPI_CAP_EMODE; + +disable_enh: + dw_writel(dws, DW_SPI_CTRLR0, tmp_ctrlr0); + dw_writel(dws, DW_SPI_SPI_CTRLR0, tmp_spi_ctrlr0); + dw_spi_enable_chip(dws, 1); + + return mode; +} + int dw_spi_add_host(struct device *dev, struct dw_spi *dws) { struct spi_controller *master; @@ -1172,10 +1235,11 @@ int dw_spi_add_host(struct device *dev, struct dw_spi *dws) goto err_free_master; } - dw_spi_init_mem_ops(dws); - master->use_gpio_descriptors = true; master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LOOP; + master->mode_bits |= detect_enh_mode(dws); + dw_spi_init_mem_ops(dws); + if (dws->caps & DW_SPI_CAP_DFS32) master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32); else From patchwork Mon Dec 12 18:07:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sudip Mukherjee X-Patchwork-Id: 633308 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 339B8C10F1D for ; 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[78.150.37.98]) by smtp.gmail.com with ESMTPSA id t123-20020a1c4681000000b003a3170a7af9sm10156808wma.4.2022.12.12.10.07.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Dec 2022 10:07:53 -0800 (PST) From: Sudip Mukherjee To: Serge Semin , Mark Brown , Rob Herring , Krzysztof Kozlowski Cc: jude.onyenegecha@sifive.com, ben.dooks@sifive.com, jeegar.lakhani@sifive.com, linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sudip Mukherjee Subject: [PATCH v2 14/15] spi: dt-bindings: snps,dw-ahb-ssi: Add generic dw-ahb-ssi version Date: Mon, 12 Dec 2022 18:07:31 +0000 Message-Id: <20221212180732.79167-15-sudip.mukherjee@sifive.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20221212180732.79167-1-sudip.mukherjee@sifive.com> References: <20221212180732.79167-1-sudip.mukherjee@sifive.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add new snps,dw-ahb-ssi version to the bindings. Signed-off-by: Sudip Mukherjee --- Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml index d33b72fabc5d8..af36df67a4c0e 100644 --- a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml +++ b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml @@ -45,6 +45,7 @@ properties: enum: - snps,dw-apb-ssi - snps,dwc-ssi-1.01a + - snps,dw-ahb-ssi - description: Microsemi Ocelot/Jaguar2 SoC SPI Controller items: - enum: From patchwork Mon Dec 12 18:07:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sudip Mukherjee X-Patchwork-Id: 633750 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B0B93C4167B for ; Mon, 12 Dec 2022 18:09:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233316AbiLLSJt (ORCPT ); Mon, 12 Dec 2022 13:09:49 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34464 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233196AbiLLSI2 (ORCPT ); Mon, 12 Dec 2022 13:08:28 -0500 Received: from mail-wm1-x335.google.com (mail-wm1-x335.google.com [IPv6:2a00:1450:4864:20::335]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 33CA964C5 for ; Mon, 12 Dec 2022 10:07:55 -0800 (PST) Received: by mail-wm1-x335.google.com with SMTP id v7so6249253wmn.0 for ; Mon, 12 Dec 2022 10:07:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=vxcMgepI8oVEM9TqV5Jw/8Ls56KCQWpTpg2XQ851Vyo=; b=ihIo87o/eW0m0yNdwDPZYK+DwBvApOUgbohqKB5uvxZomOsA7v/sIVscW3U7MU40Vn oZvjCKLwi7XnZlTbhTAM1iefFfkNbcmzhaR1hWInKHbCO53Z6NJ71yKW4uCjdXX1pLmU gbSbXVkBRmwf9k4nutNA9DDRLRSrKqyzVdDdGCmiepNlB69wP5ysyD+gWqC8MZHrLY1n 4FvDcYZA79H8FOQDnSK0i1wZCxfE9qBsG5n/6f8lwx4DQOqWyt2kbjuHOZr+KNYh8Uxa 4NSYJlsDKN0EKzCbH5oc29wuirYwZMkFKgoHGTbpd83LA+sXtN/jMMb0K6Aj43CL6ZXq ygsg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=vxcMgepI8oVEM9TqV5Jw/8Ls56KCQWpTpg2XQ851Vyo=; b=5iOXjxG72L8Wn7FjXjb7Lxt6a2VhkQZWkQG+hhgGoSX//DEXLq+kmR6P8t7fUus7Mu JglnUy0dx4wN6rnvAgFV0W0MNwiYWSbUQY7ensfPZnsfbizCifm9HSbCOsTZQSELP2Ft KBsbRONDvV/1mMMu79zc/eFFSc5xpddr9Ko0HgnR4S7r1ndJsDMQ/Jl+3setyxT7d65O yCbCqaX203RLq+nIWyX6jmZmJVVldM7a2ztC+W0Pgj5kuVyKRiAQoijkW1VQ49mjmo/N YcFSHliH1A0KfB6OswlN5IfsRpgu5H3khubdxiEoWVmmAcZOYGPeA42uENH6RU6OPIS7 LGDA== X-Gm-Message-State: ANoB5plGt87FKRPTWGLsyzlyNmNKAl5Im7tViHr2jX1Z665UlthBhdkT R57W94mEVeABJn2L3us8mNM0dw== X-Google-Smtp-Source: AA0mqf5WAwhv7CN65oqrRHJ56WnHd0r1iLiZBzcHbxlqTDYQ/i3lCLb42boTqKHrJxh0Z2TfH+O25Q== X-Received: by 2002:a1c:4c06:0:b0:3cf:88c3:d008 with SMTP id z6-20020a1c4c06000000b003cf88c3d008mr13028681wmf.28.1670868475158; Mon, 12 Dec 2022 10:07:55 -0800 (PST) Received: from localhost.localdomain (host-78-150-37-98.as13285.net. [78.150.37.98]) by smtp.gmail.com with ESMTPSA id t123-20020a1c4681000000b003a3170a7af9sm10156808wma.4.2022.12.12.10.07.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Dec 2022 10:07:54 -0800 (PST) From: Sudip Mukherjee To: Serge Semin , Mark Brown , Rob Herring , Krzysztof Kozlowski Cc: jude.onyenegecha@sifive.com, ben.dooks@sifive.com, jeegar.lakhani@sifive.com, linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sudip Mukherjee Subject: [PATCH v2 15/15] spi: dw: initialize dwc-ssi controller Date: Mon, 12 Dec 2022 18:07:32 +0000 Message-Id: <20221212180732.79167-16-sudip.mukherjee@sifive.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20221212180732.79167-1-sudip.mukherjee@sifive.com> References: <20221212180732.79167-1-sudip.mukherjee@sifive.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Use the generic snps,dw-ahb-ssi version to initialize the controller. Signed-off-by: Sudip Mukherjee --- drivers/spi/spi-dw-mmio.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/spi/spi-dw-mmio.c b/drivers/spi/spi-dw-mmio.c index 26c40ea6dd129..431ba768ea861 100644 --- a/drivers/spi/spi-dw-mmio.c +++ b/drivers/spi/spi-dw-mmio.c @@ -352,6 +352,7 @@ static const struct of_device_id dw_spi_mmio_of_match[] = { { .compatible = "intel,thunderbay-ssi", .data = dw_spi_intel_init}, { .compatible = "microchip,sparx5-spi", dw_spi_mscc_sparx5_init}, { .compatible = "canaan,k210-spi", dw_spi_canaan_k210_init}, + { .compatible = "snps,dw-ahb-ssi", .data = dw_spi_hssi_init}, { /* end of table */} }; MODULE_DEVICE_TABLE(of, dw_spi_mmio_of_match);