From patchwork Sat Dec 10 22:05:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 632993 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 05216C4167B for ; Sat, 10 Dec 2022 22:05:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229908AbiLJWFz (ORCPT ); Sat, 10 Dec 2022 17:05:55 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38656 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229847AbiLJWFk (ORCPT ); Sat, 10 Dec 2022 17:05:40 -0500 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1599613D4F; Sat, 10 Dec 2022 14:05:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1670709940; x=1702245940; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=vkrxbHg3Pwn+h3sN0NMmjjLRRztZhfqgXCcqyghgbqc=; b=Mcd3mho+wz+ydv/W/CsTnxSVtDLUSfQA5Tb8F+QNAcRF9pw8e5fKGXne OVTxQO7eDL9zBLWHMjpRfYj3xvZkrWG05brxzdOSAHx2DUjISf5qeT6b7 FbrlZhjI9jQBuI6gStl5g14q3rXQof/ER/J2qz9mLuRYcy9nMz6pHzsky vhafIpcKq5tKIUIeuX3SeTHBtbmG4IPiPm96tRQxuWf37ekzIlYu3lsz3 PJFWq1p8n7/MiQS/DMnS6aFHyUkf6koTGZHOzhe1nLVW+n9NT6pIkrejW f3F73N4cs04ZnGsYPjtaFjOWYaZGC+OlKQe1krWv8V7mhPT9jqXipji3D A==; X-IronPort-AV: E=McAfee;i="6500,9779,10557"; a="403907181" X-IronPort-AV: E=Sophos;i="5.96,235,1665471600"; d="scan'208";a="403907181" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Dec 2022 14:05:39 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10557"; a="625470514" X-IronPort-AV: E=Sophos;i="5.96,235,1665471600"; d="scan'208";a="625470514" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga006.jf.intel.com with ESMTP; 10 Dec 2022 14:05:36 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id 4FB9BF7; Sun, 11 Dec 2022 00:06:05 +0200 (EET) From: Andy Shevchenko To: Bartosz Golaszewski , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Linus Walleij , Bartosz Golaszewski , Haibo Chen , Andy Shevchenko Subject: [PATCH v2 2/4] gpio: pca953x: avoid logically dead code Date: Sun, 11 Dec 2022 00:05:59 +0200 Message-Id: <20221210220601.77648-2-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221210220601.77648-1-andriy.shevchenko@linux.intel.com> References: <20221210220601.77648-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org From: Haibo Chen The current code logic make the condition "else if (reg >= 0x54)" can't be true, cause the dead code. So fix it to match the coder expectation. This is reported by Coverity. Fixes: 13c5d4ce8060 ("gpio: pca953x: Add support for PCAL6534") Signed-off-by: Haibo Chen Signed-off-by: Andy Shevchenko --- v2: shuffled code to check bigger value first (Andy) drivers/gpio/gpio-pca953x.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index 5299e5bb76d6..2c8586b3191f 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -309,26 +309,26 @@ static bool pcal6534_check_register(struct pca953x_chip *chip, unsigned int reg, int bank; int offset; - if (reg >= 0x30) { + if (reg >= 0x54) { /* - * Reserved block between 14h and 2Fh does not align on - * expected bank boundaries like other devices. + * Handle lack of reserved registers after output port + * configuration register to form a bank. */ - int temp = reg - 0x30; + int temp = reg - 0x54; bank = temp / NBANK(chip); offset = temp - (bank * NBANK(chip)); - bank += 8; - } else if (reg >= 0x54) { + bank += 16; + } else if (reg >= 0x30) { /* - * Handle lack of reserved registers after output port - * configuration register to form a bank. + * Reserved block between 14h and 2Fh does not align on + * expected bank boundaries like other devices. */ - int temp = reg - 0x54; + int temp = reg - 0x30; bank = temp / NBANK(chip); offset = temp - (bank * NBANK(chip)); - bank += 16; + bank += 8; } else { bank = reg / NBANK(chip); offset = reg - (bank * NBANK(chip)); From patchwork Sat Dec 10 22:06:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 632994 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6BBB2C4332F for ; Sat, 10 Dec 2022 22:05:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229849AbiLJWFw (ORCPT ); Sat, 10 Dec 2022 17:05:52 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38634 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229844AbiLJWFj (ORCPT ); Sat, 10 Dec 2022 17:05:39 -0500 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2883513CEB; Sat, 10 Dec 2022 14:05:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1670709939; x=1702245939; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=N9GIhe+43+8kbtpf4SUGwC07xNhkTl9g7PMWCO7shEk=; b=DkaVK3Dy19fby5rI0Chy5g0tBZjq9GIA6u/6KMyOD206QsnwMudF8H7n Q1NDJPxnLT03QZOwEM5BD+ugLhp94A3C+nKB8HiSRCx8N5/UZrfwXPx4a goHIHIb5ki3nvw2wYRnYh/D6475mBp8pFtuWur37mRXx3yMGWg+OB2niO ZC4OiS0FxSglLvoQNFEbGXx3KtDcQvq0i+Xf9VAPzi2wjbnOB5GF3yHk3 Pg2xre4QssOcVKxpnuVrOu9jjXliJ9r/rZc92SfOpltGlonBjOu1txsbc chh0gROadD904qt6C0xwb6yg6NI4Ou5uowKV8XX7qYdmGCZGxBCAJRsd1 Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10557"; a="403907178" X-IronPort-AV: E=Sophos;i="5.96,235,1665471600"; d="scan'208";a="403907178" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Dec 2022 14:05:38 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10557"; a="625470513" X-IronPort-AV: E=Sophos;i="5.96,235,1665471600"; d="scan'208";a="625470513" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga006.jf.intel.com with ESMTP; 10 Dec 2022 14:05:36 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id 5D9946B1; Sun, 11 Dec 2022 00:06:05 +0200 (EET) From: Andy Shevchenko To: Bartosz Golaszewski , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Linus Walleij , Bartosz Golaszewski , Andy Shevchenko Subject: [PATCH v2 3/4] gpio: pca953x: Clean up pcal6534_check_register() Date: Sun, 11 Dec 2022 00:06:00 +0200 Message-Id: <20221210220601.77648-3-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221210220601.77648-1-andriy.shevchenko@linux.intel.com> References: <20221210220601.77648-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The pcal6534_check_register() is a bit too verbose. Clean up it, by deduplicating some operations and switching to the modulo operation as on some architectures / and % can become a single assembly instruction. Signed-off-by: Andy Shevchenko --- v2: new patch drivers/gpio/gpio-pca953x.c | 21 +++++++++------------ 1 file changed, 9 insertions(+), 12 deletions(-) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index 2c8586b3191f..8aba8df393bd 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -306,6 +306,7 @@ static bool pca953x_check_register(struct pca953x_chip *chip, unsigned int reg, static bool pcal6534_check_register(struct pca953x_chip *chip, unsigned int reg, u32 checkbank) { + int bank_shift; int bank; int offset; @@ -314,26 +315,22 @@ static bool pcal6534_check_register(struct pca953x_chip *chip, unsigned int reg, * Handle lack of reserved registers after output port * configuration register to form a bank. */ - int temp = reg - 0x54; - - bank = temp / NBANK(chip); - offset = temp - (bank * NBANK(chip)); - bank += 16; + reg -= 0x54; + bank_shift = 16; } else if (reg >= 0x30) { /* * Reserved block between 14h and 2Fh does not align on * expected bank boundaries like other devices. */ - int temp = reg - 0x30; - - bank = temp / NBANK(chip); - offset = temp - (bank * NBANK(chip)); - bank += 8; + reg -= 0x30; + bank_shift = 8; } else { - bank = reg / NBANK(chip); - offset = reg - (bank * NBANK(chip)); + bank_shift = 0; } + bank = bank_shift + reg / NBANK(chip); + offset = reg % NBANK(chip); + /* Register is not in the matching bank. */ if (!(BIT(bank) & checkbank)) return false;