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Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alex Bennée --- accel/tcg/internal.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/accel/tcg/internal.h b/accel/tcg/internal.h index e1429a53ac..35419f3fe1 100644 --- a/accel/tcg/internal.h +++ b/accel/tcg/internal.h @@ -43,12 +43,12 @@ void tb_invalidate_phys_page_fast(struct page_collection *pages, struct page_collection *page_collection_lock(tb_page_addr_t start, tb_page_addr_t end); void page_collection_unlock(struct page_collection *set); +G_NORETURN void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr); #endif /* CONFIG_SOFTMMU */ TranslationBlock *tb_gen_code(CPUState *cpu, target_ulong pc, target_ulong cs_base, uint32_t flags, int cflags); -G_NORETURN void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr); void page_init(void); void tb_htable_init(void); void tb_reset_jump(TranslationBlock *tb, int n); From patchwork Fri Dec 9 09:36:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 632247 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp738687pvb; Fri, 9 Dec 2022 01:38:14 -0800 (PST) X-Google-Smtp-Source: AA0mqf4LkYnOB2iUgZJsn3VPL0qjuK8B/rps1b4wrvBDUFVUOrIZ4g/KriKsjmnPJCgGg+gfHkw0 X-Received: by 2002:a05:622a:4a0a:b0:3a7:f091:bfe with SMTP id fv10-20020a05622a4a0a00b003a7f0910bfemr8237456qtb.7.1670578693885; Fri, 09 Dec 2022 01:38:13 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1670578693; cv=none; d=google.com; s=arc-20160816; b=MeaxQeJrU6TTbHu1bNTaDvFJH+yw4A6PS79detilTe1dT2QXgxQyZeL0ALYI4QBHfD BjVihS1n8QU19rvcOKq8WPTQrRAakAv22m/Xj4ICRq8SU2wOE05HublTxfBHG8t3s/Z5 qieJCKpJeOX8zQwfnHDKmpEMGBNOS6cusAVyi3Q7CSyPILsWhT5NUa1vY3bKwnag8tCb D5iACxdByLheA+yFZx4TVWzDjf900PdDCT/evG0tw5ST5Q5wD0W1ZSKVCnwYaikRr2X+ AMYQall1z1cmPeSWrKSbZ4ICsk0CM4gTEcBiPBcuEB/V3j0taQK7GfXa0UrDLJu+Iwwf S8Nw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=Xs8hKJC3drTwU6EvGSY8CbqIQfqKG7hGtbB4kWHTpkY=; b=tNe+04YeWjUaG2vcKJe6kdHt/wlexYuuUuZQwE59BoKdD2QIPbLpROrO5wibS/l517 1J3Gws1IQ9kp4Q4bTEjW2ls7s1b4iNmq7Xc+Hi8R5ZL/0rOlbMcv5kjaUFNU0wM6qcNP p9mTbhKmagk6sXuKBHcOfpp1gTuuXqqUJH+lu6sllgU+6XS3K6FkAYe5tWGn4WhS2hZ5 SVniJ7OcEfwwnZWrcz1jtjjD446JSet7xSgF7JD8wY8Kng+Kgu2bUDUhQ961voPibV/N OASOykkHucraPPD+H83KS1Lno8NoFDkAQT3e7prQG7U01ykHjZ87w0s/TQrM/f3j425D eSmQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="Vq9UhN1/"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id f8-20020ac84648000000b003a6c4e80c59si416388qto.341.2022.12.09.01.38.13 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 09 Dec 2022 01:38:13 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="Vq9UhN1/"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p3ZoY-0004EK-Ma; Fri, 09 Dec 2022 04:37:06 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p3ZoW-0004Dl-LN for qemu-devel@nongnu.org; Fri, 09 Dec 2022 04:37:05 -0500 Received: from mail-wm1-x32f.google.com ([2a00:1450:4864:20::32f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p3ZoV-0003nM-0C for qemu-devel@nongnu.org; Fri, 09 Dec 2022 04:37:04 -0500 Received: by mail-wm1-x32f.google.com with SMTP id ja4-20020a05600c556400b003cf6e77f89cso5591126wmb.0 for ; Fri, 09 Dec 2022 01:37:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Xs8hKJC3drTwU6EvGSY8CbqIQfqKG7hGtbB4kWHTpkY=; b=Vq9UhN1/mvI2U3OxbFDD1kizwea0Bt9Nm0XSImQwl8PNMjmMEzj0p4Bsj4WIJEpFT6 eL8wQDtUY6pnEA9x1srfq3GlDj5YKdTa6iGt1Kkfhd9tfgx0NSNK7AGrHG2b9H0s/x+o tEd7URJgDQc2BTeZdx3ZD2fhq2GEf/5y8WfdZhp5C02t9SLIwpqqs2Ch7JmLLeGwFzIj oC2Awn8/axRBjpgkE5pCwlTr72Ujg85fd+DMhmIu4eDMXbraestTYuKSbumE4xKJEhHF gyOV1ywpN9Yg8gYyZ4ZKhkdrk184kpN4IMahaeqfo1pEyToFy6rMni7yRSpg1eRth9X2 U9jA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Xs8hKJC3drTwU6EvGSY8CbqIQfqKG7hGtbB4kWHTpkY=; b=xME7L+JVhMVJVt21+/zJxjNIwfaY8kNu+A5SAdJkvkuu23+5fooDdWOLryV0CuqMz/ VsDWtFvIy7soXlIWK4Ki5bay1mC6/TSUf8pWMu21cf6j1+H6JafdQoyY7gI5Myy6ObQ1 vFGuUetJxErRb4Haf8onUMa+eElBkNBpPSs3ruPi8+HK7pWlz7iQuAvPieOm1MjzNGNT KNLumRVrrufDo20VCGCb2YTA1yM/PLQChD9E3yaXi/HO7jj41b8Ti/zZO7y0dGhq1hWw YiXqk7bXcMJ/hsjJc5jzS/NxMJ+vwKcYm0JRFh/IiEFLLSyKbFYkPftCb/zDAGRzZWmN kdIg== X-Gm-Message-State: ANoB5pn5Z7Ugfa4DSzq2/UVS5T/qWJloC7gWlal7WiZxt8M5K10OhsZy owgKdimqDIgMRVj/XbFLM7ckwiJfNS4xD5elkAU= X-Received: by 2002:a05:600c:20a:b0:3d2:7e0:3d51 with SMTP id 10-20020a05600c020a00b003d207e03d51mr2275795wmi.17.1670578621411; Fri, 09 Dec 2022 01:37:01 -0800 (PST) Received: from localhost.localdomain ([81.0.6.76]) by smtp.gmail.com with ESMTPSA id g6-20020a05600c4ec600b003cf57329221sm8899073wmq.14.2022.12.09.01.37.00 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 09 Dec 2022 01:37:01 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , =?utf-8?q?Alex_Benn?= =?utf-8?q?=C3=A9e?= , Paolo Bonzini , Stefan Hajnoczi , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH-for-8.0 2/5] accel/tcg: Remove trace events from trace-root.h Date: Fri, 9 Dec 2022 10:36:46 +0100 Message-Id: <20221209093649.43738-3-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221209093649.43738-1-philmd@linaro.org> References: <20221209093649.43738-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=philmd@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Commit d9bb58e510 ("tcg: move tcg related files into accel/tcg/ subdirectory") introduced accel/tcg/trace-events, so we don't need to use the root trace-events anymore. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alex Bennée --- accel/tcg/cputlb.c | 2 +- accel/tcg/trace-events | 4 ++++ trace-events | 4 ---- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index 6f1c00682b..ac459478f4 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -33,7 +33,7 @@ #include "qemu/atomic.h" #include "qemu/atomic128.h" #include "exec/translate-all.h" -#include "trace/trace-root.h" +#include "trace.h" #include "tb-hash.h" #include "internal.h" #ifdef CONFIG_PLUGIN diff --git a/accel/tcg/trace-events b/accel/tcg/trace-events index 59eab96f26..4e9b450520 100644 --- a/accel/tcg/trace-events +++ b/accel/tcg/trace-events @@ -6,5 +6,9 @@ exec_tb(void *tb, uintptr_t pc) "tb:%p pc=0x%"PRIxPTR exec_tb_nocache(void *tb, uintptr_t pc) "tb:%p pc=0x%"PRIxPTR exec_tb_exit(void *last_tb, unsigned int flags) "tb:%p flags=0x%x" +# cputlb.c +memory_notdirty_write_access(uint64_t vaddr, uint64_t ram_addr, unsigned size) "0x%" PRIx64 " ram_addr 0x%" PRIx64 " size %u" +memory_notdirty_set_dirty(uint64_t vaddr) "0x%" PRIx64 + # translate-all.c translate_block(void *tb, uintptr_t pc, const void *tb_code) "tb:%p, pc:0x%"PRIxPTR", tb_code:%p" diff --git a/trace-events b/trace-events index 035f3d570d..b6b84b175e 100644 --- a/trace-events +++ b/trace-events @@ -42,10 +42,6 @@ find_ram_offset(uint64_t size, uint64_t offset) "size: 0x%" PRIx64 " @ 0x%" PRIx find_ram_offset_loop(uint64_t size, uint64_t candidate, uint64_t offset, uint64_t next, uint64_t mingap) "trying size: 0x%" PRIx64 " @ 0x%" PRIx64 ", offset: 0x%" PRIx64" next: 0x%" PRIx64 " mingap: 0x%" PRIx64 ram_block_discard_range(const char *rbname, void *hva, size_t length, bool need_madvise, bool need_fallocate, int ret) "%s@%p + 0x%zx: madvise: %d fallocate: %d ret: %d" -# accel/tcg/cputlb.c -memory_notdirty_write_access(uint64_t vaddr, uint64_t ram_addr, unsigned size) "0x%" PRIx64 " ram_addr 0x%" PRIx64 " size %u" -memory_notdirty_set_dirty(uint64_t vaddr) "0x%" PRIx64 - # job.c job_state_transition(void *job, int ret, const char *legal, const char *s0, const char *s1) "job %p (ret: %d) attempting %s transition (%s-->%s)" job_apply_verb(void *job, const char *state, const char *verb, const char *legal) "job %p in state %s; applying verb %s (%s)" From patchwork Fri Dec 9 09:36:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 632248 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp738793pvb; Fri, 9 Dec 2022 01:38:35 -0800 (PST) X-Google-Smtp-Source: AA0mqf7YR/Si0B7THHdeRbDGsa/Et4YJyUF2jjeNhOQBj/4uYNIZJSUIoSmVzdrnGQqOfFe+GNGY X-Received: by 2002:ac8:5508:0:b0:39c:da20:688 with SMTP id j8-20020ac85508000000b0039cda200688mr8127726qtq.43.1670578714971; Fri, 09 Dec 2022 01:38:34 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1670578714; cv=none; d=google.com; s=arc-20160816; b=pNU6+ZLWEOTiAfxR33BWPR4KIKgRWnLQVvFTyDpjROAVQWBDQL/szCAZqlxb2+XrKo uN6RgBGOO3Ydlm4GRz1OmvFs8gcPOMyuYRRj65h8RPbO8Ya2ePjEIesc9dfycZyyN0lB WzEO7HaaQtt9i86roT3J+o+5x6UTS4JO1qBftKRyJFhiJi3BflyyHV9zfwzCYd6pAt0O 7EJsgMUT/CvREHluURz8/Q/bXAanvGoI0n9O8CvRo4TievtH5fmzMBhstLRT7i9XHlZp zPFoFvrys9Xh10WQp28ftBR/jftLVbSfx49ff7Tjeus638YyM9E1AqMGj92KZodBuE0R ykBw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=jtD3cpuCTB6yMKA5ClAo1diuH6m3+hdvzhmmIRgg5HE=; b=gUOz4UKjdR1InQ0IsTzFtUOuYd7uDvWShUdii1PxiQuChBANKDdKRrFuzfLYnBQpo5 Bc/ttx0lj6bNcq2sxwm+QCJLLkWepU5Y46KYWRNSLW4hbGUuumtmRa7GuKNMrFCpM+MT lJM1U4bsTpPREQzaQWybp1iU1A9pVu8CcCY7nUznNdPKaDqYrwdUlf+On2430OpfmFNi Qzdn6WtnV/XvGiYdLtpHB7iZRieEL1yrdLne7teuzE1dI2B2/L4faMhkDy7YnIFdIa7Y 2w8A9ywRETy9OQ821hofHiYS7Bq3YpBIj02rW3bZrZct9jMWitz5UF0EzNAq0Oqqz2Ot tGqw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=lOlFCqBy; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alex Bennée --- accel/tcg/cputlb.c | 2 +- accel/tcg/internal.h | 6 +++--- accel/tcg/tb-maint.c | 6 +++--- 3 files changed, 7 insertions(+), 7 deletions(-) diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index ac459478f4..6402fe11c1 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -1510,7 +1510,7 @@ static void notdirty_write(CPUState *cpu, vaddr mem_vaddr, unsigned size, if (!cpu_physical_memory_get_dirty_flag(ram_addr, DIRTY_MEMORY_CODE)) { struct page_collection *pages = page_collection_lock(ram_addr, ram_addr + size); - tb_invalidate_phys_page_fast(pages, ram_addr, size, retaddr); + tb_invalidate_phys_page_locked_fast(pages, ram_addr, size, retaddr); page_collection_unlock(pages); } diff --git a/accel/tcg/internal.h b/accel/tcg/internal.h index 35419f3fe1..d8b58c1e70 100644 --- a/accel/tcg/internal.h +++ b/accel/tcg/internal.h @@ -37,9 +37,9 @@ void page_table_config_init(void); #ifdef CONFIG_SOFTMMU struct page_collection; -void tb_invalidate_phys_page_fast(struct page_collection *pages, - tb_page_addr_t start, int len, - uintptr_t retaddr); +void tb_invalidate_phys_page_locked_fast(struct page_collection *pages, + tb_page_addr_t start, int len, + uintptr_t retaddr); struct page_collection *page_collection_lock(tb_page_addr_t start, tb_page_addr_t end); void page_collection_unlock(struct page_collection *set); diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb-maint.c index 0c56e81d8c..bf84728910 100644 --- a/accel/tcg/tb-maint.c +++ b/accel/tcg/tb-maint.c @@ -1200,9 +1200,9 @@ void tb_invalidate_phys_range(tb_page_addr_t start, tb_page_addr_t end) * * Call with all @pages in the range [@start, @start + len[ locked. */ -void tb_invalidate_phys_page_fast(struct page_collection *pages, - tb_page_addr_t start, int len, - uintptr_t retaddr) +void tb_invalidate_phys_page_locked_fast(struct page_collection *pages, + tb_page_addr_t start, int len, + uintptr_t retaddr) { PageDesc *p; From patchwork Fri Dec 9 09:36:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 632246 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp738579pvb; Fri, 9 Dec 2022 01:37:53 -0800 (PST) X-Google-Smtp-Source: AA0mqf4fYAJ60dptj4nuMRQ6fW7ZEaX96fe9oYNKjBfDfoy6SJ4OlbD28jZPt3QIT7fcCIq0Pj8F X-Received: by 2002:ac8:1194:0:b0:3a5:c6ad:7cd7 with SMTP id d20-20020ac81194000000b003a5c6ad7cd7mr7195848qtj.24.1670578672970; Fri, 09 Dec 2022 01:37:52 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1670578672; cv=none; d=google.com; s=arc-20160816; b=CgE8wiAock/hWVXXl6anEejtD/uvzW9RKGGPaW+zVGF7GyFvyepoqe3AckFkMzgc/B 5tXXTYS7yWcVQEDFFlL3404vsNklPKEfAb4JxbQmlLYp+rN5iIJvQ2WhzLP1JjbVjQ6X uBDFjNdD4M6WgYSuNaYMM4b11oX6XLscgVbd8dLbLeZ9TqNyhKAl0+vo3fq6FFSxOkGH /CwGQ87OLCH47DQozoomcVC7sMRNcwoYGVbxegYHf60favcZUxnW/g4r2KZAidqQD9Vt 11e8gJES6Kg5izz7zBdicT3kNAUY4YVg0Ft9t0yHcZ5dnU+qsNE8vRAbHrg0CqgnRuWc sRqw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=le0MHQk9HQYTwazHbeRMYTj7OI4RdAPESdb8VrJM2D8=; b=laIRIN+uR43YLbun1YjHvlbC5k2ZfnOMCPvqqnEd/Lh3CiQ+su5QDAF4OzEixmZvb3 +KKsjja+iFAcyoakxZdAt91sI8a0F06Vq5VHZVkEzuw7gla+rSfnOaRp8VYi6wrQeoJa xt0cLHK1NnACfEN6LDBW2Si/hHZZMREpw+VSMjYDAlqFbNmf+Uv2pUlsPnOHiar9CbTn arvqaZ+bnk/g4PtpUM6esp81UtP2kt++j0KZaJeJpCnkZK43rfEI1jJU0zFnMIX5l7bL /kapcrNp72Kb8YTFUPsSuuHgfZk6F1DQRcTd2px8rxP7bdbP21NpiDQq5hKje2BXlq6l AfSA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=JwhW9f+h; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Fri, 09 Dec 2022 01:37:10 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , =?utf-8?q?Alex_Benn?= =?utf-8?q?=C3=A9e?= , Paolo Bonzini , Stefan Hajnoczi , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH-for-8.0 4/5] accel/tcg: Factor tb_invalidate_phys_range_fast() out Date: Fri, 9 Dec 2022 10:36:48 +0100 Message-Id: <20221209093649.43738-5-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221209093649.43738-1-philmd@linaro.org> References: <20221209093649.43738-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=philmd@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alex Bennée --- accel/tcg/cputlb.c | 5 +---- accel/tcg/internal.h | 3 +++ accel/tcg/tb-maint.c | 21 +++++++++++++++++---- 3 files changed, 21 insertions(+), 8 deletions(-) diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index 6402fe11c1..03674d598f 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -1508,10 +1508,7 @@ static void notdirty_write(CPUState *cpu, vaddr mem_vaddr, unsigned size, trace_memory_notdirty_write_access(mem_vaddr, ram_addr, size); if (!cpu_physical_memory_get_dirty_flag(ram_addr, DIRTY_MEMORY_CODE)) { - struct page_collection *pages - = page_collection_lock(ram_addr, ram_addr + size); - tb_invalidate_phys_page_locked_fast(pages, ram_addr, size, retaddr); - page_collection_unlock(pages); + tb_invalidate_phys_range_fast(ram_addr, size, retaddr); } /* diff --git a/accel/tcg/internal.h b/accel/tcg/internal.h index d8b58c1e70..db078390b1 100644 --- a/accel/tcg/internal.h +++ b/accel/tcg/internal.h @@ -42,6 +42,9 @@ void tb_invalidate_phys_page_locked_fast(struct page_collection *pages, uintptr_t retaddr); struct page_collection *page_collection_lock(tb_page_addr_t start, tb_page_addr_t end); +void tb_invalidate_phys_range_fast(ram_addr_t ram_addr, + unsigned size, + uintptr_t retaddr); void page_collection_unlock(struct page_collection *set); G_NORETURN void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr); #endif /* CONFIG_SOFTMMU */ diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb-maint.c index bf84728910..4dc2fa1060 100644 --- a/accel/tcg/tb-maint.c +++ b/accel/tcg/tb-maint.c @@ -1194,10 +1194,6 @@ void tb_invalidate_phys_range(tb_page_addr_t start, tb_page_addr_t end) } /* - * len must be <= 8 and start must be a multiple of len. - * Called via softmmu_template.h when code areas are written to with - * iothread mutex not held. - * * Call with all @pages in the range [@start, @start + len[ locked. */ void tb_invalidate_phys_page_locked_fast(struct page_collection *pages, @@ -1215,4 +1211,21 @@ void tb_invalidate_phys_page_locked_fast(struct page_collection *pages, tb_invalidate_phys_page_range__locked(pages, p, start, start + len, retaddr); } + +/* + * len must be <= 8 and start must be a multiple of len. + * Called via softmmu_template.h when code areas are written to with + * iothread mutex not held. + */ +void tb_invalidate_phys_range_fast(ram_addr_t ram_addr, + unsigned size, + uintptr_t retaddr) +{ + struct page_collection *pages; + + pages = page_collection_lock(ram_addr, ram_addr + size); + tb_invalidate_phys_page_locked_fast(pages, ram_addr, size, retaddr); + page_collection_unlock(pages); +} + #endif /* CONFIG_USER_ONLY */ From patchwork Fri Dec 9 09:36:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 632249 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp738892pvb; Fri, 9 Dec 2022 01:38:54 -0800 (PST) X-Google-Smtp-Source: AA0mqf6zCdAfwLSd8e8wa/hrJ9v1hh+LIFpH2JBPjIEKUeUWbehYj46yoSbrCnsmeA5VT4asGqoH X-Received: by 2002:a05:6214:190a:b0:4c7:1ebf:717c with SMTP id er10-20020a056214190a00b004c71ebf717cmr7160332qvb.7.1670578733878; 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Restrict its declaration (and the functions requiring it) to tb-maint.c. Convert the 'len' argument of tb_invalidate_phys_page_locked_fast() from signed to unsigned. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alex Bennée --- accel/tcg/internal.h | 7 ------- accel/tcg/tb-maint.c | 12 ++++++------ 2 files changed, 6 insertions(+), 13 deletions(-) diff --git a/accel/tcg/internal.h b/accel/tcg/internal.h index db078390b1..6edff16fb0 100644 --- a/accel/tcg/internal.h +++ b/accel/tcg/internal.h @@ -36,16 +36,9 @@ void page_table_config_init(void); #endif #ifdef CONFIG_SOFTMMU -struct page_collection; -void tb_invalidate_phys_page_locked_fast(struct page_collection *pages, - tb_page_addr_t start, int len, - uintptr_t retaddr); -struct page_collection *page_collection_lock(tb_page_addr_t start, - tb_page_addr_t end); void tb_invalidate_phys_range_fast(ram_addr_t ram_addr, unsigned size, uintptr_t retaddr); -void page_collection_unlock(struct page_collection *set); G_NORETURN void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr); #endif /* CONFIG_SOFTMMU */ diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb-maint.c index 4dc2fa1060..10d7e4b7a8 100644 --- a/accel/tcg/tb-maint.c +++ b/accel/tcg/tb-maint.c @@ -523,8 +523,8 @@ static gint tb_page_addr_cmp(gconstpointer ap, gconstpointer bp, gpointer udata) * intersecting TBs. * Locking order: acquire locks in ascending order of page index. */ -struct page_collection * -page_collection_lock(tb_page_addr_t start, tb_page_addr_t end) +static struct page_collection *page_collection_lock(tb_page_addr_t start, + tb_page_addr_t end) { struct page_collection *set = g_malloc(sizeof(*set)); tb_page_addr_t index; @@ -568,7 +568,7 @@ page_collection_lock(tb_page_addr_t start, tb_page_addr_t end) return set; } -void page_collection_unlock(struct page_collection *set) +static void page_collection_unlock(struct page_collection *set) { /* entries are unlocked and freed via page_entry_destroy */ g_tree_destroy(set->tree); @@ -1196,9 +1196,9 @@ void tb_invalidate_phys_range(tb_page_addr_t start, tb_page_addr_t end) /* * Call with all @pages in the range [@start, @start + len[ locked. */ -void tb_invalidate_phys_page_locked_fast(struct page_collection *pages, - tb_page_addr_t start, int len, - uintptr_t retaddr) +static void tb_invalidate_phys_page_locked_fast(struct page_collection *pages, + tb_page_addr_t start, + unsigned len, uintptr_t retaddr) { PageDesc *p;