From patchwork Thu Dec 8 00:54:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 632327 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BD51CC4708D for ; Thu, 8 Dec 2022 00:55:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229809AbiLHAzE (ORCPT ); Wed, 7 Dec 2022 19:55:04 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33558 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229651AbiLHAzD (ORCPT ); Wed, 7 Dec 2022 19:55:03 -0500 Received: from mail-lj1-x230.google.com (mail-lj1-x230.google.com [IPv6:2a00:1450:4864:20::230]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 131F289338 for ; Wed, 7 Dec 2022 16:55:02 -0800 (PST) Received: by mail-lj1-x230.google.com with SMTP id s10so8770347ljg.1 for ; Wed, 07 Dec 2022 16:55:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=hk44k0FDuMcNNu7FDXOo+ReVAmrj+N3cTqyLPpdbwe4=; b=aaMOTlwHN6SDq8Iyxqq9B72nLwItYFm4XfzFGFkgLPgLa64XZwOJ3pvQ5aPoHerB+q RmgtQXAJo/CmBrtF1QEbbcxkKXh3YnVfTSD2nF1VGfBR4+0wWC6Hgij74mw+pemIrsyq DnmVf6rsBn9LGFs6ed96YqrMgHqUWl9ZmxeKdxJauXSL915vHVt2J0EflxLmtwl1ilko nHhY6N04GGx7Gom2KorSI6q4aYkT1kCMGo74RL1xRZYv6kGPmMLoWBSDgsKJjca8tiLS 1/bHj1zGkSw7ZbPYjIkO5L3EpxKVA2rUewChm4WeDq2p6VNcAQ0ddhiU/DllpjElqJqG GdMw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=hk44k0FDuMcNNu7FDXOo+ReVAmrj+N3cTqyLPpdbwe4=; b=8Oab+RbGqr/BaJ4b/bejTZtWwJYuWmrPb9j+WjUW7hfeXPQftsTRP0gNQw/Bq1REel vKo0/rkTTsw9ElRWaR8hkj+pSNv5fP0awZMuXockYzAdDYfqjNkCn3cAKLMMEpVQR0HU llsntP7rgwhSnr97FYU14ToLIDLEtAyBZNJeXOBzm/VHs4YLYEWbpON6adVPSDeLaIr2 4TTkSNoIvijGzrwOBkNykz/T+MBLTl+i9MuV/O1MRlF9EAlugASnXwKFAbwaVsAOiSht iR4pWqC7btsJ9DAG0CDhrB3hpmepT6ra0f4DjUkpzDxmgEwFUO7hy+vhHW/sc6aFEZxI ySHA== X-Gm-Message-State: ANoB5pnqX95LZqPr+G/h6F5ERw5XnAZqvw5HiIiKLfWfswXzm4ZRLJrq esrFdCL+X0ko9LIdQrv77DVjzg== X-Google-Smtp-Source: AA0mqf72ZgUvNNq7TTPBjpVpkNXlwy5iWQe0Tfe2j7lbbE1fZcRt5p2sQaVN1XnctucIvENln1iELQ== X-Received: by 2002:a2e:bd88:0:b0:279:86e:7a09 with SMTP id o8-20020a2ebd88000000b00279086e7a09mr29724346ljq.277.1670460900296; Wed, 07 Dec 2022 16:55:00 -0800 (PST) Received: from eriador.lan (dzccz6yyyyyyyyyyybcwt-3.rev.dnainternet.fi. [2001:14ba:a085:4d00::8a5]) by smtp.gmail.com with ESMTPSA id f27-20020a19381b000000b0049fff3f645esm3064159lfa.70.2022.12.07.16.54.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 07 Dec 2022 16:54:59 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Clark , Sean Paul , Abhinav Kumar , Rob Herring , Krzysztof Kozlowski Cc: Stephen Boyd , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH v2 1/4] dt-bindings: display/msm: convert MDP5 schema to YAML format Date: Thu, 8 Dec 2022 02:54:55 +0200 Message-Id: <20221208005458.328196-2-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221208005458.328196-1-dmitry.baryshkov@linaro.org> References: <20221208005458.328196-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Convert the mdp5.txt into the yaml format. Changes to the existing (txt) schema: - MSM8996 has additional "iommu" clock, define it separately - Add new properties used on some of platforms: - interconnects, interconnect-names - iommus - power-domains - operating-points-v2, opp-table Signed-off-by: Dmitry Baryshkov Reviewed-by: Krzysztof Kozlowski --- .../devicetree/bindings/display/msm/mdp5.txt | 132 ----------------- .../bindings/display/msm/qcom,mdp5.yaml | 138 ++++++++++++++++++ 2 files changed, 138 insertions(+), 132 deletions(-) delete mode 100644 Documentation/devicetree/bindings/display/msm/mdp5.txt create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,mdp5.yaml diff --git a/Documentation/devicetree/bindings/display/msm/mdp5.txt b/Documentation/devicetree/bindings/display/msm/mdp5.txt deleted file mode 100644 index 65d03c58dee6..000000000000 --- a/Documentation/devicetree/bindings/display/msm/mdp5.txt +++ /dev/null @@ -1,132 +0,0 @@ -Qualcomm adreno/snapdragon MDP5 display controller - -Description: - -This is the bindings documentation for the MDP5 display -controller found in SoCs like MSM8974, APQ8084, MSM8916, MSM8994 and MSM8996. - -MDP5: -Required properties: -- compatible: - * "qcom,mdp5" - MDP5 -- reg: Physical base address and length of the controller's registers. -- reg-names: The names of register regions. The following regions are required: - * "mdp_phys" -- interrupts: Interrupt line from MDP5 to MDSS interrupt controller. -- clocks: device clocks. See ../clocks/clock-bindings.txt for details. -- clock-names: the following clocks are required. -- * "bus" -- * "iface" -- * "core" -- * "vsync" -- ports: contains the list of output ports from MDP. These connect to interfaces - that are external to the MDP hardware, such as HDMI, DSI, EDP etc (LVDS is a - special case since it is a part of the MDP block itself). - - Each output port contains an endpoint that describes how it is connected to an - external interface. These are described by the standard properties documented - here: - Documentation/devicetree/bindings/graph.txt - Documentation/devicetree/bindings/media/video-interfaces.txt - - The availability of output ports can vary across SoC revisions: - - For MSM8974 and APQ8084: - Port 0 -> MDP_INTF0 (eDP) - Port 1 -> MDP_INTF1 (DSI1) - Port 2 -> MDP_INTF2 (DSI2) - Port 3 -> MDP_INTF3 (HDMI) - - For MSM8916: - Port 0 -> MDP_INTF1 (DSI1) - - For MSM8994 and MSM8996: - Port 0 -> MDP_INTF1 (DSI1) - Port 1 -> MDP_INTF2 (DSI2) - Port 2 -> MDP_INTF3 (HDMI) - -Optional properties: -- clock-names: the following clocks are optional: - * "lut" - * "tbu" - * "tbu_rt" - -Example: - -/ { - ... - - mdss: mdss@1a00000 { - compatible = "qcom,mdss"; - reg = <0x1a00000 0x1000>, - <0x1ac8000 0x3000>; - reg-names = "mdss_phys", "vbif_phys"; - - power-domains = <&gcc MDSS_GDSC>; - - clocks = <&gcc GCC_MDSS_AHB_CLK>, - <&gcc GCC_MDSS_AXI_CLK>, - <&gcc GCC_MDSS_VSYNC_CLK>; - clock-names = "iface", - "bus", - "vsync" - - interrupts = <0 72 0>; - - interrupt-controller; - #interrupt-cells = <1>; - - #address-cells = <1>; - #size-cells = <1>; - ranges; - - mdp: mdp@1a01000 { - compatible = "qcom,mdp5"; - reg = <0x1a01000 0x90000>; - reg-names = "mdp_phys"; - - interrupt-parent = <&mdss>; - interrupts = <0 0>; - - clocks = <&gcc GCC_MDSS_AHB_CLK>, - <&gcc GCC_MDSS_AXI_CLK>, - <&gcc GCC_MDSS_MDP_CLK>, - <&gcc GCC_MDSS_VSYNC_CLK>; - clock-names = "iface", - "bus", - "core", - "vsync"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - mdp5_intf1_out: endpoint { - remote-endpoint = <&dsi0_in>; - }; - }; - }; - }; - - dsi0: dsi@1a98000 { - ... - ports { - ... - port@0 { - reg = <0>; - dsi0_in: endpoint { - remote-endpoint = <&mdp5_intf1_out>; - }; - }; - ... - }; - ... - }; - - dsi_phy0: dsi-phy@1a98300 { - ... - }; - }; -}; diff --git a/Documentation/devicetree/bindings/display/msm/qcom,mdp5.yaml b/Documentation/devicetree/bindings/display/msm/qcom,mdp5.yaml new file mode 100644 index 000000000000..cbcbe8b47e9b --- /dev/null +++ b/Documentation/devicetree/bindings/display/msm/qcom,mdp5.yaml @@ -0,0 +1,138 @@ +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/msm/qcom,mdp5.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Adreno/Snapdragon Mobile Display controller (MDP5) + +description: > + MDP5 display controller found in SoCs like MSM8974, APQ8084, MSM8916, MSM8994 + and MSM8996. + +maintainers: + - Dmitry Baryshkov + - Rob Clark + +properties: + compatible: + const: qcom,mdp5 + + reg: + maxItems: 1 + + reg-names: + items: + - const: mdp_phys + + interrupts: + maxItems: 1 + + clocks: + minItems: 4 + maxItems: 7 + + clock-names: + oneOf: + - minItems: 4 + items: + - const: iface + - const: bus + - const: core + - const: vsync + - const: lut + - const: tbu + - const: tbu_rt + #MSM8996 has additional iommu clock + - items: + - const: iface + - const: bus + - const: core + - const: iommu + - const: vsync + + interconnects: + minItems: 1 + items: + - description: Interconnect path from mdp0 (or a single mdp) port to the data bus + - description: Interconnect path from mdp1 port to the data bus + - description: Interconnect path from rotator port to the data bus + + interconnect-names: + minItems: 1 + items: + - const: mdp0-mem + - const: mdp1-mem + - const: rotator-mem + + iommus: + items: + - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0 + + power-domains: + maxItems: 1 + + operating-points-v2: true + opp-table: + type: object + + ports: + $ref: /schemas/graph.yaml#/properties/ports + description: | + Contains the list of output ports from DPU device. These ports + connect to interfaces that are external to the DPU hardware, + such as DSI, DP etc. MDP5 devices support up to 4 ports:: + one or two DSI ports, HDMI and eDP. + + patternProperties: + "^port@[0-3]+$": + $ref: /schemas/graph.yaml#/properties/port + + # at least one port is required + required: + - port@0 + +required: + - compatible + - reg + - reg-names + - clocks + - clock-names + - ports + +additionalProperties: false + +examples: + - | + #include + #include + display-controller@1a01000 { + compatible = "qcom,mdp5"; + reg = <0x1a01000 0x90000>; + reg-names = "mdp_phys"; + + interrupt-parent = <&mdss>; + interrupts = <0>; + + clocks = <&gcc GCC_MDSS_AHB_CLK>, + <&gcc GCC_MDSS_AXI_CLK>, + <&gcc GCC_MDSS_MDP_CLK>, + <&gcc GCC_MDSS_VSYNC_CLK>; + clock-names = "iface", + "bus", + "core", + "vsync"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + endpoint { + remote-endpoint = <&dsi0_in>; + }; + }; + }; + }; +... From patchwork Thu Dec 8 00:54:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 631980 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D9B64C4708E for ; Thu, 8 Dec 2022 00:55:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229543AbiLHAzF (ORCPT ); Wed, 7 Dec 2022 19:55:05 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33560 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229783AbiLHAzD (ORCPT ); Wed, 7 Dec 2022 19:55:03 -0500 Received: from mail-lf1-x12c.google.com (mail-lf1-x12c.google.com [IPv6:2a00:1450:4864:20::12c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A59A484DF1 for ; Wed, 7 Dec 2022 16:55:02 -0800 (PST) Received: by mail-lf1-x12c.google.com with SMTP id j4so31401289lfk.0 for ; Wed, 07 Dec 2022 16:55:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=L/RmycL1Mv6ZSS27FwVTDu6/m14EDrtLYu+O7wuXKfc=; b=dcXN8CrIwWj+WhiIr+k4CEInsAx52ZiTtEKU5oKIVxc2m0Oy6WhpOehgibHctHVcPe DYzdhAhDj5JG6Qg3RYEy8W6T06IQC3MOwAirjDcicnZMSdlZojzybp1sFvBvsX/RdT9a A7uxfuWg3nPriYSn+ZPCOxX+caIWkvto4J4zkM2EKiyVOs7yB1lYRHCtzlVGJvjSboWb ezWCnD1Ndo/Y17pW/Nc7PwMx8DEpxFXCwxQTtzg6eAZduWU789oiH6wsD7uHVwy6ClJz TViLnME8x6O6dkVyqGMETlcrK6fTc/vM/sObQ7hK9iB0nI90etAaLOTMGThqmYiTqZj4 9QJg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=L/RmycL1Mv6ZSS27FwVTDu6/m14EDrtLYu+O7wuXKfc=; b=X+Hk75CzY8YpcC/zngFKY2+dQCPXhq/WOfoUCzODuzuQ8Tit7wqV2FKm/NbSb2ehZh AaoQqUnDsdJntSe3d/LWnjotpoUEsi8dVbeenSuHvtgV/cwywPoSawP373f8foxLShqs JZxSl0qcr+I4bdNxv57RSz3k+CzVxXQzs9BywpqXCZ42+wXfhXHY9RpPt2+YjlSoNxmB B2IyygWjkhRnhxB8kSIQsSLMWc2YJhgfWJhr/ptoo403tFPTnw/cuNKqygD9xdDWIoD0 1IuJR9EmsiY+t4dX6AfICh/vokLbXvC+Dv+J5IYnZJjkKsq55D3r5zmP/XRQD8K+90ET Zrag== X-Gm-Message-State: ANoB5pkz39DY4ZkiClllAwNujjJ/b3oIkWYbf59ympKOBkRzU6KkwysE rTKgA1dYOQUEu5dK79H05SOuOQ== X-Google-Smtp-Source: AA0mqf69gi2tQR9aBLCUz9azAEFIH0hbuGn9WAjHGko/R2B+a4Gqgt2JoRfRWtg7+JlcT2aKX43k2w== X-Received: by 2002:a05:6512:12d1:b0:4b5:869f:420a with SMTP id p17-20020a05651212d100b004b5869f420amr3049175lfg.353.1670460901051; Wed, 07 Dec 2022 16:55:01 -0800 (PST) Received: from eriador.lan (dzccz6yyyyyyyyyyybcwt-3.rev.dnainternet.fi. [2001:14ba:a085:4d00::8a5]) by smtp.gmail.com with ESMTPSA id f27-20020a19381b000000b0049fff3f645esm3064159lfa.70.2022.12.07.16.55.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 07 Dec 2022 16:55:00 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Clark , Sean Paul , Abhinav Kumar , Rob Herring , Krzysztof Kozlowski Cc: Stephen Boyd , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH v2 2/4] dt-bindings: display/msm: add SoC-specific compats to qcom,mdp5.yaml Date: Thu, 8 Dec 2022 02:54:56 +0200 Message-Id: <20221208005458.328196-3-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221208005458.328196-1-dmitry.baryshkov@linaro.org> References: <20221208005458.328196-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add platform-specific compatible entries to the qcom,mdp5.yaml to allow distinguishing between various platforms. Signed-off-by: Dmitry Baryshkov --- .../bindings/display/msm/qcom,mdp5.yaml | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/msm/qcom,mdp5.yaml b/Documentation/devicetree/bindings/display/msm/qcom,mdp5.yaml index cbcbe8b47e9b..a7a97a4c46b4 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,mdp5.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,mdp5.yaml @@ -16,7 +16,24 @@ maintainers: properties: compatible: - const: qcom,mdp5 + oneOf: + - const: qcom,mdp5 + deprecated: true + - items: + - enum: + # msm8998 should either use old single-string compat or new + # qcom,msm8998-dpu + - qcom,apq8084-mdp5 + - qcom,msm8916-mdp5 + - qcom,msm8917-mdp5 + - qcom,msm8953-mdp5 + - qcom,msm8974-mdp5 + - qcom,msm8976-mdp5 + - qcom,msm8994-mdp5 + - qcom,msm8996-mdp5 + - qcom,sdm630-mdp5 + - qcom,sdm660-mdp5 + - const: qcom,mdp5 reg: maxItems: 1 From patchwork Thu Dec 8 00:54:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 632326 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BAAD2C6370B for ; Thu, 8 Dec 2022 00:55:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229651AbiLHAzH (ORCPT ); Wed, 7 Dec 2022 19:55:07 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33584 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229821AbiLHAzE (ORCPT ); Wed, 7 Dec 2022 19:55:04 -0500 Received: from mail-lj1-x231.google.com (mail-lj1-x231.google.com [IPv6:2a00:1450:4864:20::231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 769B089AE7 for ; Wed, 7 Dec 2022 16:55:03 -0800 (PST) Received: by mail-lj1-x231.google.com with SMTP id a7so22741792ljq.12 for ; Wed, 07 Dec 2022 16:55:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=qZPnPCur3ovFUOH0LYhAuqFKoVf/x2ysNxNnklkbflE=; b=Z0n6nWKpFQW/U3hRqkkWGv/Jb0DbHroQAvTC/kUChu/mZvqVpmao4hqnZUEstRDnar jFyyH2TPR3cH1RLq/2o4c4TCgTrYZwOJaw5OZxWvsC9tCWL6BGI+94EYdu507Vppm1NL SuKztwVjHMSpFB4FuD3UvvL4Gwj/jHnbJhciHElDwCMG2KfDmEI8FrgNAhd5FMLURQ+5 CE0RWcJ8ux4Xrq5d1oiGTIpxxVWE3nQJEPd+dtpvRjDvSfIRt1409B4gu6TVKz5fhVTg Cr4940woTLVdGDKDR1LupLDIm3xmlNbZXGbOKmc6bpLuC0bsC6mfAIx7l4HKUGcWFxOJ qahQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=qZPnPCur3ovFUOH0LYhAuqFKoVf/x2ysNxNnklkbflE=; b=DHfizEw0C3gM8yOYXnY0AzxAJQqOjVcc/Ml1lyhLGFQoIbFqjY+fAmtMqCbbLPeToX f+sd0HEVMPVcEN1bTLOKUwIp8zv+F819LK6NLZ+htm3qllUBTv1JVebLGJLmNeL+C0be PbA+MjQMlh29njNU9h5+jeQQ9HjuTbnTVm7EuM4g4vRCmpYJW/PFWBz5MMV5vOiwfE03 PVc1UvHhITOtNBxf3zCWWVpL4qdE74ionoXbOEXRmYkGUmDK/cIo7Jwg1xvTVLWYSFYo j8sNImZ91E8szikxSUTe20JLI0sgMuk2OeCOT4m82SZeUX9DYkGH7OtsqzVDC936Vw1s Ukwg== X-Gm-Message-State: ANoB5plBu0PnUtL/BlA7iXitdcbMXswC+tZieXbd3NXNBqg/Gayu4aZB N5WOfBb2JG0PRpH6+bV9mdbNRw== X-Google-Smtp-Source: AA0mqf7gr4D6xoe4jHfMdSszRKt/ebLETLphZftpO3yonssF15zrpEQCAd1CIHbl/lXZjCwUEqiigA== X-Received: by 2002:a05:651c:c85:b0:278:f572:c9ac with SMTP id bz5-20020a05651c0c8500b00278f572c9acmr31528058ljb.73.1670460901823; Wed, 07 Dec 2022 16:55:01 -0800 (PST) Received: from eriador.lan (dzccz6yyyyyyyyyyybcwt-3.rev.dnainternet.fi. [2001:14ba:a085:4d00::8a5]) by smtp.gmail.com with ESMTPSA id f27-20020a19381b000000b0049fff3f645esm3064159lfa.70.2022.12.07.16.55.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 07 Dec 2022 16:55:01 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Clark , Sean Paul , Abhinav Kumar , Rob Herring , Krzysztof Kozlowski Cc: Stephen Boyd , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH v2 3/4] ARM: dts: qcom-msm8974: add SoC specific compat string to mdp5 node Date: Thu, 8 Dec 2022 02:54:57 +0200 Message-Id: <20221208005458.328196-4-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221208005458.328196-1-dmitry.baryshkov@linaro.org> References: <20221208005458.328196-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add SoC-specific compat string to the MDP5 device node to ease distinguishing between various platforms. Signed-off-by: Dmitry Baryshkov --- arch/arm/boot/dts/qcom-msm8974.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index 8d216a3c0851..0cd59088f9c7 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -1549,7 +1549,7 @@ mdss: mdss@fd900000 { ranges; mdp: mdp@fd900000 { - compatible = "qcom,mdp5"; + compatible = "qcom,msm8974-mdp5", "qcom,mdp5"; reg = <0xfd900100 0x22000>; reg-names = "mdp_phys"; From patchwork Thu Dec 8 00:54:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 631979 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5B739C6370C for ; Thu, 8 Dec 2022 00:55:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229821AbiLHAzH (ORCPT ); Wed, 7 Dec 2022 19:55:07 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33588 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229848AbiLHAzE (ORCPT ); Wed, 7 Dec 2022 19:55:04 -0500 Received: from mail-lf1-x131.google.com (mail-lf1-x131.google.com [IPv6:2a00:1450:4864:20::131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1A6FC8DBC1 for ; Wed, 7 Dec 2022 16:55:04 -0800 (PST) Received: by mail-lf1-x131.google.com with SMTP id c1so31362972lfi.7 for ; Wed, 07 Dec 2022 16:55:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=qdPmvvZXSRXEgFCUhOrLI3O1LCoqsr5bQT79OYES7MA=; b=bZeWsgjSdtb1EfFEhdB3DnwLB5u6mzHuCkIQDNxYA7Ar57IKdpfvCL5sVdua/eGgZY XGzloWvKPu2aIz1a+SpZXzzOdkTpFZ9BME4lfc1/pAEW9TKpDz3ql91zQZzJ5AWhuQJb 7BgRy3qsymgVho4YXMAakC7CC3j6MDWezr64gHzZM5r5rDu0NRtAEa9hd0+L76IZMop/ 0Xn8G78GxByGFFmr+n1eBmW6LIRSIStlMKr68J61MWouCTFV8J2Dc1V7V67bp+z3EI/f DpJN1/lM4KLfCCiggd41WL7MAG7cf0SGwzbtjFLLD3dt2Hi/AU70ddYr17EnWCS3ryFH Us0A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=qdPmvvZXSRXEgFCUhOrLI3O1LCoqsr5bQT79OYES7MA=; b=QfjB841NTtMSw7PUD8AJogkZhoWfSWDIRCQ9XY6H+Bym2pG9rvP+tdlPdBppY6KmyK bPwYQkqqRb6BMjNXaqQ6GJEM0wu8388FMSMZ6pTI5IlEwL7o7r3pDRX+BvouMb3wGioW zg/NO7YgKfHYnctk8iAU32QYFV+Uq7rndNRMUJpNxUDYEFjUMcNtRXe8cXd8Vs7zsiQr tYj021AMMc7JfI8I1NiYaBLG8IKzq+tC+WUq3OiHbN4YWW5d5Gcgbm9kJ8c1TFTFyGpX XI0siWdOCTduVVy/c6/7Zgn4OLuQSeymXsnfJk3dQMK5wdXm4kGrkUQHSL15jg+u3jRt TWvw== X-Gm-Message-State: ANoB5pnVhgzV0Rg3Ws7UllmjrmSIi4dNmjAq53SRT0oH+OOGPZb2hlt+ yaRAAvzyL3irRpW+wv1jHNGK+w== X-Google-Smtp-Source: AA0mqf7pJeeDPb8xpY6IkZxk/PYM2KwYfDnCCCrsNPl9x/edm5ZyBYm5JrGPsZ7c2irAfCJcfzmQSg== X-Received: by 2002:a05:6512:3414:b0:4b5:9510:e61 with SMTP id i20-20020a056512341400b004b595100e61mr1326135lfr.192.1670460902493; Wed, 07 Dec 2022 16:55:02 -0800 (PST) Received: from eriador.lan (dzccz6yyyyyyyyyyybcwt-3.rev.dnainternet.fi. [2001:14ba:a085:4d00::8a5]) by smtp.gmail.com with ESMTPSA id f27-20020a19381b000000b0049fff3f645esm3064159lfa.70.2022.12.07.16.55.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 07 Dec 2022 16:55:02 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Clark , Sean Paul , Abhinav Kumar , Rob Herring , Krzysztof Kozlowski Cc: Stephen Boyd , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH v2 4/4] arm64: dts: qcom: add SoC specific compat strings to mdp5 nodes Date: Thu, 8 Dec 2022 02:54:58 +0200 Message-Id: <20221208005458.328196-5-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221208005458.328196-1-dmitry.baryshkov@linaro.org> References: <20221208005458.328196-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add SoC-specific compat string to the MDP5 device nodes to ease distinguishing between various platforms. Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 2 +- arch/arm64/boot/dts/qcom/msm8996.dtsi | 2 +- arch/arm64/boot/dts/qcom/sdm630.dtsi | 2 +- arch/arm64/boot/dts/qcom/sdm660.dtsi | 2 ++ 4 files changed, 5 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index 2ca8e977fc2a..0a23fb6efae8 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -989,7 +989,7 @@ mdss: mdss@1a00000 { ranges; mdp: mdp@1a01000 { - compatible = "qcom,mdp5"; + compatible = "qcom,msm8916-mdp5", "qcom,mdp5"; reg = <0x01a01000 0x89000>; reg-names = "mdp_phys"; diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index d31464204f69..b5cd1bcad5eb 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -931,7 +931,7 @@ mdss: mdss@900000 { status = "disabled"; mdp: mdp@901000 { - compatible = "qcom,mdp5"; + compatible = "qcom,msm8996-mdp5", "qcom,mdp5"; reg = <0x00901000 0x90000>; reg-names = "mdp_phys"; diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index 13e6a4fbba27..65addd4c672e 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -1498,7 +1498,7 @@ mdss: mdss@c900000 { status = "disabled"; mdp: mdp@c901000 { - compatible = "qcom,mdp5"; + compatible = "qcom,sdm630-mdp5", "qcom,mdp5"; reg = <0x0c901000 0x89000>; reg-names = "mdp_phys"; diff --git a/arch/arm64/boot/dts/qcom/sdm660.dtsi b/arch/arm64/boot/dts/qcom/sdm660.dtsi index d52123cb5cd3..cdaa0d7a66f3 100644 --- a/arch/arm64/boot/dts/qcom/sdm660.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm660.dtsi @@ -142,6 +142,8 @@ &gpucc { }; &mdp { + compatible = "qcom,sdm660-mdp5", "qcom,mdp5"; + ports { port@1 { reg = <1>;