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[2001:14ba:a085:4d00::8a5]) by smtp.gmail.com with ESMTPSA id f27-20020a19381b000000b0049fff3f645esm2863430lfa.70.2022.12.07.06.28.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 07 Dec 2022 06:28:35 -0800 (PST) From: Dmitry Baryshkov To: Rob Clark , Sean Paul , Abhinav Kumar Cc: Stephen Boyd , David Airlie , Daniel Vetter , Bjorn Andersson , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH 1/3] drm/msm/dpu: handle UBWC 1.0 in dpu_hw_sspp_setup_format Date: Wed, 7 Dec 2022 16:28:31 +0200 Message-Id: <20221207142833.204193-2-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221207142833.204193-1-dmitry.baryshkov@linaro.org> References: <20221207142833.204193-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Extend dpu_hw_sspp_setup_format() to also handle the UBWC 1.0 case. Signed-off-by: Dmitry Baryshkov Reviewed-by: Abhinav Kumar --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c index 691c471b08c2..4246ab0b3bee 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c @@ -310,7 +310,11 @@ static void dpu_hw_sspp_setup_format(struct dpu_hw_pipe *ctx, ctx->mdp->highest_bank_bit << 18); switch (ctx->catalog->caps->ubwc_version) { case DPU_HW_UBWC_VER_10: - /* TODO: UBWC v1 case */ + fast_clear = fmt->alpha_enable ? BIT(31) : 0; + DPU_REG_WRITE(c, SSPP_UBWC_STATIC_CTRL, + fast_clear | (ctx->mdp->ubwc_swizzle & 0x1) | + BIT(8) | + (ctx->mdp->highest_bank_bit << 4)); break; case DPU_HW_UBWC_VER_20: fast_clear = fmt->alpha_enable ? BIT(31) : 0; From patchwork Wed Dec 7 14:28:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 632361 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EA710C4708E for ; Wed, 7 Dec 2022 14:29:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230053AbiLGO3O (ORCPT ); Wed, 7 Dec 2022 09:29:14 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52184 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230374AbiLGO2x (ORCPT ); Wed, 7 Dec 2022 09:28:53 -0500 Received: from mail-lf1-x12f.google.com (mail-lf1-x12f.google.com [IPv6:2a00:1450:4864:20::12f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D283557B72 for ; Wed, 7 Dec 2022 06:28:38 -0800 (PST) Received: by mail-lf1-x12f.google.com with SMTP id j4so28996201lfk.0 for ; Wed, 07 Dec 2022 06:28:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=1mfAGwvefS+g/9R3S0STarHhm4RzC0mvAwecKR+y5y0=; b=sXvtNEG0QvjAEGWec51FWMzEbiRXBOZg6CIdMOUyy4HlNfdmrbew2erT9yzEn0JYfN nbMQLrCIHht12nA3k2enrA1O4X/mOg6xh1MYvirfcUuoX+SucCm9Hv2V6/dzhXRduXkA NgWY9l9UzFxP/vqU39+8oIwXSDIT5Phya7qYDZJZ6fXHJywPw5+o5M0/7EmJO+UDpOIr WGzDRusisLPpJOi4AIGphoQqETgtSCdzeAS76nll5+P1rxFBvqAPeh6PPfFgPlJb95z1 6E/UyNdbMA5Lfah5pAxWT4tBQPnfX2uiMza7PnLKMn1nbqVzrXmSJvx0R3z0y/ZbGIaX 1y/w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=1mfAGwvefS+g/9R3S0STarHhm4RzC0mvAwecKR+y5y0=; b=arRsL7gwggVm7VvwML9t5FHuypEqEgHPfy7VWPaq0eMZ40wOeGlnRtvUtyPRfDiHS7 Vdr4ESrLe1HKKwxkVfE7Fx5EvOEwRJ9Y10NbtRjwsDb2uNChNq34A7V/sg1Sd6In23+2 /HCdgb2d9oXxKpx0DdJxCt33/PusOPuk0352ZswvlLhcb8cxGfv8T9eu09o4PuGHradC fldiYDpU3nNj1ItK9ZFW64eR4JIWXgE/+rAqaqSSBUBIwovDgvqSl4oVriFFIm5h5tIs GLv2CDwO7d6VOZuFsuyUOu4FvmXtlPnE4X2i4kOlh7OvkolOaL4XPsTsBIs9ofy/2aqb xbwA== X-Gm-Message-State: ANoB5pnqdmeDqzThYuCOYfAEo3LXd/mTEfJZhOckj5e9PmZ0aDOqTBCU pgK4sQZXmkFRprrw4g0bhyy78Q== X-Google-Smtp-Source: AA0mqf5maAfH+bw6f92BY7BtyIgmYJn3CtQGZlwA+JBxaNZ1iDwwhukTfbxfsy0Yk9HLyHTqnflYdQ== X-Received: by 2002:a19:7107:0:b0:4a8:e955:77e7 with SMTP id m7-20020a197107000000b004a8e95577e7mr23518267lfc.573.1670423317240; Wed, 07 Dec 2022 06:28:37 -0800 (PST) Received: from eriador.lan (dzccz6yyyyyyyyyyybcwt-3.rev.dnainternet.fi. [2001:14ba:a085:4d00::8a5]) by smtp.gmail.com with ESMTPSA id f27-20020a19381b000000b0049fff3f645esm2863430lfa.70.2022.12.07.06.28.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 07 Dec 2022 06:28:36 -0800 (PST) From: Dmitry Baryshkov To: Rob Clark , Sean Paul , Abhinav Kumar Cc: Stephen Boyd , David Airlie , Daniel Vetter , Bjorn Andersson , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH 2/3] drm/msm/dpu: correct the UBWC version on sm6115 Date: Wed, 7 Dec 2022 16:28:32 +0200 Message-Id: <20221207142833.204193-3-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221207142833.204193-1-dmitry.baryshkov@linaro.org> References: <20221207142833.204193-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org According to downstream (bengal-sde.dtsi), the sm6115 uses UBWC 1.0. Change the catalog entry accordingly. Signed-off-by: Dmitry Baryshkov Reviewed-by: Abhinav Kumar --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c index b4ca123d8e69..a1b52b9b16f1 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c @@ -335,7 +335,7 @@ static const struct dpu_caps sm6115_dpu_caps = { .max_mixer_blendstages = 0x4, .qseed_type = DPU_SSPP_SCALER_QSEED3LITE, .smart_dma_rev = DPU_SSPP_SMART_DMA_V2, /* TODO: v2.5 */ - .ubwc_version = DPU_HW_UBWC_VER_20, + .ubwc_version = DPU_HW_UBWC_VER_10, .has_dim_layer = true, .has_idle_pc = true, .max_linewidth = 2160, From patchwork Wed Dec 7 14:28:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 631596 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 35783C63706 for ; Wed, 7 Dec 2022 14:29:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229907AbiLGO3N (ORCPT ); Wed, 7 Dec 2022 09:29:13 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52784 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230375AbiLGO2x (ORCPT ); Wed, 7 Dec 2022 09:28:53 -0500 Received: from mail-lf1-x132.google.com (mail-lf1-x132.google.com [IPv6:2a00:1450:4864:20::132]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A600A578E1 for ; Wed, 7 Dec 2022 06:28:39 -0800 (PST) Received: by mail-lf1-x132.google.com with SMTP id cf42so23169656lfb.1 for ; Wed, 07 Dec 2022 06:28:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=jUFmlTkaTeb2gUSJldujrB4KJISeaHLq+47OfG+Sb0g=; b=Lpy+WJM+yODekgzWzTxmrM1ACtNvsx0v+grZNUAV+beM/Yrumue3bBOm2ONS6c2j0A iVqBdlPYC6wCOt6HeADL8fWlyyl0yX8iPtu6ssltQzn7Tc4Oug6BHy/rXBlJm8Dt13Ve 1C6SCt803MKb81d39YyT49WiAlT/FbUKVuUN3APVvdMBF9xwc6Yoyo812NgcZIC0IWGo 4luRJaAq8ejSDr+Yg/8aUZZYtOHlYiY0c+aMRWc48NB8p8CPb8qKF9DBoU9Spu+zKhE+ ecznS8Mx7R2CSLwl9dAoJ3TYxbf1/PNxnuFoD++KAXvqD+EIcQNV1QMqWp9OIkPZ9S38 K0vQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=jUFmlTkaTeb2gUSJldujrB4KJISeaHLq+47OfG+Sb0g=; b=5y1gIx6NX5yK0EG/bz/P/JTcnUECqyGfWLn/aCJOLPvBoAagnf904gOW4CLWax3247 yfC0Igz8cKYij3yrT0C/aldPIEdwl7jLYj9fiFKiBqCkj+zxGnMam/SdNE8dy9WHzZZb 7SDn3+2AOucLUky8CiTyo1A3ffkcOvkR1BaIyfpmJ9voA0rtBc7mq1Ci7mAxYe8D/ad5 /+3FupXMQWvxvtCgyhrlx4CpEldHXSdP6WZ/fS6DhxG0NbOR6PAxoPAcr8K0YcSypyWy pgMt6nh6RUmfFt/cSDvhf9QpFMEAcoh7pJIjNdwZkF2sn5xTuFjOQq03hfa7WmdPgtZB gIKg== X-Gm-Message-State: ANoB5pkSQNTsnzJJh6H0xPaQMYX/ZxDCQcRliDOLzR3CSLPu/MSTJzpk veoVKStN5rxbt6s/HafKRKw8EA== X-Google-Smtp-Source: AA0mqf7cx7c/YeG785Vs1vUOt+3SoFwzJpe6TmpmVlCrtroFemClCPNAStWvJf6GOBWjJ51n9GnCvQ== X-Received: by 2002:ac2:5324:0:b0:4b5:6d83:1a87 with SMTP id f4-20020ac25324000000b004b56d831a87mr5831782lfh.375.1670423318034; Wed, 07 Dec 2022 06:28:38 -0800 (PST) Received: from eriador.lan (dzccz6yyyyyyyyyyybcwt-3.rev.dnainternet.fi. [2001:14ba:a085:4d00::8a5]) by smtp.gmail.com with ESMTPSA id f27-20020a19381b000000b0049fff3f645esm2863430lfa.70.2022.12.07.06.28.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 07 Dec 2022 06:28:37 -0800 (PST) From: Dmitry Baryshkov To: Rob Clark , Sean Paul , Abhinav Kumar Cc: Stephen Boyd , David Airlie , Daniel Vetter , Bjorn Andersson , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH 3/3] drm/msm/dpu: add missing ubwc_swizzle setting to catalog Date: Wed, 7 Dec 2022 16:28:33 +0200 Message-Id: <20221207142833.204193-4-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221207142833.204193-1-dmitry.baryshkov@linaro.org> References: <20221207142833.204193-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Use the values from the vendor DTs to set ubwc_swizzle in the catalog. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c index a1b52b9b16f1..b80cc11a9a83 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c @@ -516,6 +516,7 @@ static const struct dpu_mdp_cfg sm6115_mdp[] = { .base = 0x0, .len = 0x494, .features = 0, .highest_bank_bit = 0x1, + .ubwc_swizzle = 0x7, .clk_ctrls[DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0}, .clk_ctrls[DPU_CLK_CTRL_DMA0] = { @@ -529,6 +530,7 @@ static const struct dpu_mdp_cfg sm8250_mdp[] = { .base = 0x0, .len = 0x494, .features = 0, .highest_bank_bit = 0x3, /* TODO: 2 for LP_DDR4 */ + .ubwc_swizzle = 0x6, .clk_ctrls[DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2AC, .bit_off = 0}, .clk_ctrls[DPU_CLK_CTRL_VIG1] = { @@ -558,6 +560,7 @@ static const struct dpu_mdp_cfg sm8450_mdp[] = { .base = 0x0, .len = 0x494, .features = BIT(DPU_MDP_PERIPH_0_REMOVED), .highest_bank_bit = 0x3, /* TODO: 2 for LP_DDR4 */ + .ubwc_swizzle = 0x6, .clk_ctrls[DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2AC, .bit_off = 0}, .clk_ctrls[DPU_CLK_CTRL_VIG1] = {