From patchwork Mon Mar 25 03:05:47 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sugaya Taichi X-Patchwork-Id: 161013 Delivered-To: patch@linaro.org Received: by 2002:a02:c6d8:0:0:0:0:0 with SMTP id r24csp3462527jan; Sun, 24 Mar 2019 20:05:46 -0700 (PDT) X-Google-Smtp-Source: APXvYqxLqSgWxKPGY5Sm/jBFqUJWNGv4k5Fnwzx6OMz3mPdNi+AAOCWSWH0EouJRfhJdgp+P1kpw X-Received: by 2002:a65:538e:: with SMTP id x14mr20652332pgq.79.1553483146348; Sun, 24 Mar 2019 20:05:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1553483146; cv=none; d=google.com; s=arc-20160816; b=xe669QSHhGh0CI/mKM2QxNjeHU7FDSWGdw9w/O5QpmK/cu279JlsskSFaBg+5sZE3p ALcejEXxemWiSiuL6d8cr+fBv1D8gcnwBgxQOkcb5rUlxBUt8E5rCfWWEA7umu3VLvaK XeAUygmU/ry0ZNmTxIAGVM3R0Y+F89sWaxJWlEEFe+5nXjLj16yyDJ244IrbnEgCe/uF 9dF3H3YHYnbRebTA1bcjK9zqDHR2cejfRY30cRQFyZW8ceVVUd+TDIwCdH/onDQOEBLn 5sclTbn3HwYvCNJnpAV6VQTzqT4EziDK2oPn8LiPSEC7zWClpyB8taKNMFY0cLaOpAEl hARA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=TTxNR8bQaVYDG8g1bX4jbwne8A9fcTrvR1dVfSPX0zQ=; b=UZ0U0A9pRw7/qTdJf7XWfoN5Nul1wvnEYztToCm6LeXcMrv9ofDFX96jbGofCRmp5E b9TDb9NSSY+d5clYkI3cezSLzMEiz4/WZ+k6CQMn6cCdX/qg6AMyPxvNwporG9sJVIPn NJyYr5WIZ5OfE10G6QoQoPbRgEJh3viZcoFajA79VkDsbVsuZyTD1wKGm2WcZF68nwTx qEv30HkQrGBVnqDPhNqdd7oanCmq+21p4oUdpGZeZKVlcBLsKu9JBkvaP2vH4Vu/aATJ RWeFlOYo86f1RQhVCCfQRGbiWlZGCS2281GnMGE3n6I/eQk41m2qC6fdZvp+wGzhYeXz kvyw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id n14si12126736pgl.277.2019.03.24.20.05.46; Sun, 24 Mar 2019 20:05:46 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729391AbfCYDFl (ORCPT + 31 others); Sun, 24 Mar 2019 23:05:41 -0400 Received: from mx.socionext.com ([202.248.49.38]:52827 "EHLO mx.socionext.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729285AbfCYDFk (ORCPT ); Sun, 24 Mar 2019 23:05:40 -0400 Received: from unknown (HELO iyokan-ex.css.socionext.com) ([172.31.9.54]) by mx.socionext.com with ESMTP; 25 Mar 2019 12:05:39 +0900 Received: from mail.mfilter.local (m-filter-2 [10.213.24.62]) by iyokan-ex.css.socionext.com (Postfix) with ESMTP id 3A1666117D; Mon, 25 Mar 2019 12:05:39 +0900 (JST) Received: from 172.31.9.51 (172.31.9.51) by m-FILTER with ESMTP; Mon, 25 Mar 2019 12:05:39 +0900 Received: from yuzu.css.socionext.com (yuzu [172.31.8.45]) by kinkan.css.socionext.com (Postfix) with ESMTP id 0E6C41A15B7; Mon, 25 Mar 2019 12:05:39 +0900 (JST) Received: from M20VSDK.e01.socionext.com (unknown [10.213.118.34]) by yuzu.css.socionext.com (Postfix) with ESMTP id F10E0120459; Mon, 25 Mar 2019 12:05:38 +0900 (JST) From: Sugaya Taichi To: Daniel Lezcano , Thomas Gleixner , linux-kernel@vger.kernel.org Cc: Takao Orito , Kazuhiro Kasai , Shinji Kanematsu , Jassi Brar , Masami Hiramatsu , Sugaya Taichi Subject: [PATCH 1/3] clocksource/drivers/timer-milbeaut: Fix to enable one-shot timer Date: Mon, 25 Mar 2019 12:05:47 +0900 Message-Id: <1553483149-8922-2-git-send-email-sugaya.taichi@socionext.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1553483149-8922-1-git-send-email-sugaya.taichi@socionext.com> References: <1553483149-8922-1-git-send-email-sugaya.taichi@socionext.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Fix mlb_set_oneshot_state() to enable one-shot timer. The function should stop and start a timer, but "start" statement was dropped. Kick the register to start one-shot timer. Signed-off-by: Sugaya Taichi --- drivers/clocksource/timer-milbeaut.c | 2 ++ 1 file changed, 2 insertions(+) -- 1.9.1 diff --git a/drivers/clocksource/timer-milbeaut.c b/drivers/clocksource/timer-milbeaut.c index f2019a8..9fd5d08 100644 --- a/drivers/clocksource/timer-milbeaut.c +++ b/drivers/clocksource/timer-milbeaut.c @@ -80,6 +80,8 @@ static int mlb_set_state_oneshot(struct clock_event_device *clk) u32 val = MLB_TMR_TMCSR_CSL_DIV2; writel_relaxed(val, timer_of_base(to) + MLB_TMR_EVT_TMCSR_OFS); + val |= MLB_TMR_TMCSR_CNTE | MLB_TMR_TMCSR_TRG | MLB_TMR_TMCSR_INTE; + writel_relaxed(val, timer_of_base(to) + MLB_TMR_EVT_TMCSR_OFS); return 0; } From patchwork Mon Mar 25 03:05:48 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sugaya Taichi X-Patchwork-Id: 161014 Delivered-To: patch@linaro.org Received: by 2002:a02:c6d8:0:0:0:0:0 with SMTP id r24csp3462532jan; Sun, 24 Mar 2019 20:05:46 -0700 (PDT) X-Google-Smtp-Source: APXvYqyinCyCHfhHXwTHLOpczbLip2LGTEL//suGn6I5yzMejgmB5/cW0E4KXRwmwG854Zj4CwW8 X-Received: by 2002:a63:f412:: with SMTP id g18mr21206729pgi.444.1553483146811; Sun, 24 Mar 2019 20:05:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1553483146; cv=none; d=google.com; s=arc-20160816; b=BNEHwndlOCX1JQ1et44reIzPcYupL6znBEiazBI80uaDFj7Lp8blR7p24NEAA27+oj Q9yRN2D9IWCZbyfnkGmCgEXXObTwfm8KKQEPp7A2gEHDmAXlwl8WcomgOswzaWWTBHYQ hlAdxzw+39oxOV/mkxd2qzkIV2Jik+Ukii4FzbbJY0NGnO3OFYf6au5x/bvyejyEPXnX 66M2mEd0XmbgxIWpOaOVf9H+2XN/MHLtsSj0M9831Ha1M0xPAnwocOKkAyzPFvkDa1hH 8sBGGcxrTGB4JzV3Wi/dRh9DmNOBsrXSidWpvGUH8OAg/RzHBXp8R16QvDGhK1S+i970 ZPsw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=iiUDipOap5XzNFOSTN9Y2r2/JCc7CSCGLq0y/m8FpkQ=; b=fjzqFcmK9VnCOeBBW8ZqT2HX+iEFxN4X9Y7LJBmn5QychcFx5kz2rLy+lQfUb7JRUw nuiPFupVN5W7/jA52KfVWyBA383ku9loZZusdkq20cOtnzUduDbB9u2bb5U0EAGD/Hv4 ZN3+1fCSEg1tTirb+w8VtMaIoHN0KAPyHufPJqdgFC/WP/B2MIZsrfkHuIxc9cEi1Rgm lTcLqBvklHz5AerW0Vr90yF8erm9P0TFIasPSOkq0JdaMHYyjBO0FymwmVYrT7mejhDw pSGBcUKTB+gY+WFVV1hvr6o37cBzXy8BfE/HigdfCCHoF/V179qj+1wKKkHi8YLHNCL1 gEcw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id n14si12126736pgl.277.2019.03.24.20.05.46; Sun, 24 Mar 2019 20:05:46 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729412AbfCYDFl (ORCPT + 31 others); Sun, 24 Mar 2019 23:05:41 -0400 Received: from mx.socionext.com ([202.248.49.38]:52829 "EHLO mx.socionext.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729361AbfCYDFl (ORCPT ); Sun, 24 Mar 2019 23:05:41 -0400 Received: from unknown (HELO iyokan-ex.css.socionext.com) ([172.31.9.54]) by mx.socionext.com with ESMTP; 25 Mar 2019 12:05:39 +0900 Received: from mail.mfilter.local (m-filter-1 [10.213.24.61]) by iyokan-ex.css.socionext.com (Postfix) with ESMTP id 5DCBF6117D; Mon, 25 Mar 2019 12:05:39 +0900 (JST) Received: from 172.31.9.53 (172.31.9.53) by m-FILTER with ESMTP; Mon, 25 Mar 2019 12:05:39 +0900 Received: from yuzu.css.socionext.com (yuzu [172.31.8.45]) by iyokan.css.socionext.com (Postfix) with ESMTP id 2305F4031A; Mon, 25 Mar 2019 12:05:39 +0900 (JST) Received: from M20VSDK.e01.socionext.com (unknown [10.213.118.34]) by yuzu.css.socionext.com (Postfix) with ESMTP id 11348120459; Mon, 25 Mar 2019 12:05:39 +0900 (JST) From: Sugaya Taichi To: Daniel Lezcano , Thomas Gleixner , linux-kernel@vger.kernel.org Cc: Takao Orito , Kazuhiro Kasai , Shinji Kanematsu , Jassi Brar , Masami Hiramatsu , Sugaya Taichi Subject: [PATCH 2/3] clocksource/drivers/timer-milbeaut: Add shutdown function Date: Mon, 25 Mar 2019 12:05:48 +0900 Message-Id: <1553483149-8922-3-git-send-email-sugaya.taichi@socionext.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1553483149-8922-1-git-send-email-sugaya.taichi@socionext.com> References: <1553483149-8922-1-git-send-email-sugaya.taichi@socionext.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add a shutdown operation to support shutdown timer. Signed-off-by: Sugaya Taichi --- drivers/clocksource/timer-milbeaut.c | 10 ++++++++++ 1 file changed, 10 insertions(+) -- 1.9.1 diff --git a/drivers/clocksource/timer-milbeaut.c b/drivers/clocksource/timer-milbeaut.c index 9fd5d08..f478061 100644 --- a/drivers/clocksource/timer-milbeaut.c +++ b/drivers/clocksource/timer-milbeaut.c @@ -85,6 +85,15 @@ static int mlb_set_state_oneshot(struct clock_event_device *clk) return 0; } +static int mlb_set_state_shutdown(struct clock_event_device *clk) +{ + struct timer_of *to = to_timer_of(clk); + u32 val = MLB_TMR_TMCSR_CSL_DIV2; + + writel_relaxed(val, timer_of_base(to) + MLB_TMR_EVT_TMCSR_OFS); + return 0; +} + static int mlb_clkevt_next_event(unsigned long event, struct clock_event_device *clk) { @@ -125,6 +134,7 @@ static int mlb_config_clock_event(struct timer_of *to) .features = CLOCK_EVT_FEAT_DYNIRQ | CLOCK_EVT_FEAT_ONESHOT, .set_state_oneshot = mlb_set_state_oneshot, .set_state_periodic = mlb_set_state_periodic, + .set_state_shutdown = mlb_set_state_shutdown, .set_next_event = mlb_clkevt_next_event, }, From patchwork Mon Mar 25 03:05:49 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sugaya Taichi X-Patchwork-Id: 161016 Delivered-To: patch@linaro.org Received: by 2002:a02:c6d8:0:0:0:0:0 with SMTP id r24csp3462548jan; Sun, 24 Mar 2019 20:05:47 -0700 (PDT) X-Google-Smtp-Source: APXvYqyRtj70pHj8OvlYghxZYj2TCjN9rKsIUFLhQJfCMANlax4r1KvBhZsKDI2fkx3HpM9yX4sG X-Received: by 2002:a63:f558:: with SMTP id e24mr20787425pgk.373.1553483147691; Sun, 24 Mar 2019 20:05:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1553483147; cv=none; d=google.com; s=arc-20160816; b=JmPdsCrmJnTwN6ND4xfPOH6RbNxgMcHr8MhgVaf120guNspuecGnnHnPT25RiWKQ7N WdnDAOJUfijJHmLjICPKBnyvXpibDNt4bqnv+FAEJTVuEaHxWp+EZuGWzpJgFSRnODei GUBA4CGBkFIBg2w9JlQIVBLTCXln9RzSBr2helOOcUyugs/n1vOyLM59kZ8+1m5N/ynp BXOYELDjNRf+0nkr2GvsnW4d+kEFcCj/oZrbWqd88he0adCSjyq3I0kTnuNd27RNG236 Re2F/XtjbXLl5Q8/lyKzfWAbIKJnfHDGEAncW87UZ/AYqZ+Trer7VbflrTWIYO/CDyqC VV6w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=2sC/1ZCXf/zVMZi9IZuumDbsh+n7M+Pv088MtlU5ei0=; b=NpDb+hHBsDT4kSvAUz8L5TmpFvCga5P5TGpLfmHmP1nPEyw2vHVhejiBn5HYvsIMlX sX8NIWZHlemD/28vqe4fsWOu9qK2NsjNN1IKYDl0TU8CTyq6TLZC+uQ2ftiLd4MoZ2St dCpgNLqKWXTWlmKumQYScZd0gf53SDcGSBtS1/zaK4kGXn136OytkoGkEmdMsw72eOvV 3HwWCMRDmAK1aVON/4eV5rtyzN5yR1CEEIc83x3/zaNI97yUPbDKnXocfB/IGkNgLOva m0Bh3YR/A6xWyTudm6j5AABo7qZ8c9UtDi2LyT3p4kwpxu8gqIwmskqT/+DKJbahLiTd U4MQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id n14si12126736pgl.277.2019.03.24.20.05.47; Sun, 24 Mar 2019 20:05:47 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729444AbfCYDFn (ORCPT + 31 others); Sun, 24 Mar 2019 23:05:43 -0400 Received: from mx.socionext.com ([202.248.49.38]:52829 "EHLO mx.socionext.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729285AbfCYDFm (ORCPT ); Sun, 24 Mar 2019 23:05:42 -0400 Received: from unknown (HELO kinkan-ex.css.socionext.com) ([172.31.9.52]) by mx.socionext.com with ESMTP; 25 Mar 2019 12:05:39 +0900 Received: from mail.mfilter.local (m-filter-1 [10.213.24.61]) by kinkan-ex.css.socionext.com (Postfix) with ESMTP id 638C5180D5D; Mon, 25 Mar 2019 12:05:39 +0900 (JST) Received: from 172.31.9.51 (172.31.9.51) by m-FILTER with ESMTP; Mon, 25 Mar 2019 12:05:39 +0900 Received: from yuzu.css.socionext.com (yuzu [172.31.8.45]) by kinkan.css.socionext.com (Postfix) with ESMTP id 36F471A15B7; Mon, 25 Mar 2019 12:05:39 +0900 (JST) Received: from M20VSDK.e01.socionext.com (unknown [10.213.118.34]) by yuzu.css.socionext.com (Postfix) with ESMTP id 2566D120459; Mon, 25 Mar 2019 12:05:39 +0900 (JST) From: Sugaya Taichi To: Daniel Lezcano , Thomas Gleixner , linux-kernel@vger.kernel.org Cc: Takao Orito , Kazuhiro Kasai , Shinji Kanematsu , Jassi Brar , Masami Hiramatsu , Sugaya Taichi Subject: [PATCH 3/3] clocksource/drivers/timer-milbeaut: Cleanup common register accesses Date: Mon, 25 Mar 2019 12:05:49 +0900 Message-Id: <1553483149-8922-4-git-send-email-sugaya.taichi@socionext.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1553483149-8922-1-git-send-email-sugaya.taichi@socionext.com> References: <1553483149-8922-1-git-send-email-sugaya.taichi@socionext.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Aggregate common register accesses into shared functions for maintainability. Signed-off-by: Sugaya Taichi --- drivers/clocksource/timer-milbeaut.c | 62 +++++++++++++++++++++++------------- 1 file changed, 39 insertions(+), 23 deletions(-) -- 1.9.1 diff --git a/drivers/clocksource/timer-milbeaut.c b/drivers/clocksource/timer-milbeaut.c index f478061..fa9fb4e 100644 --- a/drivers/clocksource/timer-milbeaut.c +++ b/drivers/clocksource/timer-milbeaut.c @@ -26,8 +26,8 @@ #define MLB_TMR_TMCSR_CSL_DIV2 0 #define MLB_TMR_DIV_CNT 2 -#define MLB_TMR_SRC_CH (1) -#define MLB_TMR_EVT_CH (0) +#define MLB_TMR_SRC_CH 1 +#define MLB_TMR_EVT_CH 0 #define MLB_TMR_SRC_CH_OFS (MLB_TMR_REGSZPCH * MLB_TMR_SRC_CH) #define MLB_TMR_EVT_CH_OFS (MLB_TMR_REGSZPCH * MLB_TMR_EVT_CH) @@ -43,6 +43,8 @@ #define MLB_TMR_EVT_TMRLR2_OFS (MLB_TMR_EVT_CH_OFS + MLB_TMR_TMRLR2_OFS) #define MLB_TIMER_RATING 500 +#define MLB_TIMER_ONESHOT 0 +#define MLB_TIMER_PERIODIC 1 static irqreturn_t mlb_timer_interrupt(int irq, void *dev_id) { @@ -59,38 +61,53 @@ static irqreturn_t mlb_timer_interrupt(int irq, void *dev_id) return IRQ_HANDLED; } -static int mlb_set_state_periodic(struct clock_event_device *clk) +static void mlb_evt_timer_start(struct timer_of *to, bool periodic) { - struct timer_of *to = to_timer_of(clk); u32 val = MLB_TMR_TMCSR_CSL_DIV2; + val |= MLB_TMR_TMCSR_CNTE | MLB_TMR_TMCSR_TRG | MLB_TMR_TMCSR_INTE; + if (periodic) + val |= MLB_TMR_TMCSR_RELD; writel_relaxed(val, timer_of_base(to) + MLB_TMR_EVT_TMCSR_OFS); +} + +static void mlb_evt_timer_stop(struct timer_of *to) +{ + u32 val = readl_relaxed(timer_of_base(to) + MLB_TMR_EVT_TMCSR_OFS); - writel_relaxed(to->of_clk.period, timer_of_base(to) + - MLB_TMR_EVT_TMRLR1_OFS); - val |= MLB_TMR_TMCSR_RELD | MLB_TMR_TMCSR_CNTE | - MLB_TMR_TMCSR_TRG | MLB_TMR_TMCSR_INTE; + val &= ~MLB_TMR_TMCSR_CNTE; writel_relaxed(val, timer_of_base(to) + MLB_TMR_EVT_TMCSR_OFS); +} + +static void mlb_evt_timer_register_count(struct timer_of *to, unsigned long cnt) +{ + writel_relaxed(cnt, timer_of_base(to) + MLB_TMR_EVT_TMRLR1_OFS); +} + +static int mlb_set_state_periodic(struct clock_event_device *clk) +{ + struct timer_of *to = to_timer_of(clk); + + mlb_evt_timer_stop(to); + mlb_evt_timer_register_count(to, to->of_clk.period); + mlb_evt_timer_start(to, MLB_TIMER_PERIODIC); return 0; } static int mlb_set_state_oneshot(struct clock_event_device *clk) { struct timer_of *to = to_timer_of(clk); - u32 val = MLB_TMR_TMCSR_CSL_DIV2; - writel_relaxed(val, timer_of_base(to) + MLB_TMR_EVT_TMCSR_OFS); - val |= MLB_TMR_TMCSR_CNTE | MLB_TMR_TMCSR_TRG | MLB_TMR_TMCSR_INTE; - writel_relaxed(val, timer_of_base(to) + MLB_TMR_EVT_TMCSR_OFS); + mlb_evt_timer_stop(to); + mlb_evt_timer_start(to, MLB_TIMER_ONESHOT); return 0; } static int mlb_set_state_shutdown(struct clock_event_device *clk) { struct timer_of *to = to_timer_of(clk); - u32 val = MLB_TMR_TMCSR_CSL_DIV2; - writel_relaxed(val, timer_of_base(to) + MLB_TMR_EVT_TMCSR_OFS); + mlb_evt_timer_stop(to); return 0; } @@ -99,22 +116,21 @@ static int mlb_clkevt_next_event(unsigned long event, { struct timer_of *to = to_timer_of(clk); - writel_relaxed(event, timer_of_base(to) + MLB_TMR_EVT_TMRLR1_OFS); - writel_relaxed(MLB_TMR_TMCSR_CSL_DIV2 | - MLB_TMR_TMCSR_CNTE | MLB_TMR_TMCSR_INTE | - MLB_TMR_TMCSR_TRG, timer_of_base(to) + - MLB_TMR_EVT_TMCSR_OFS); + mlb_evt_timer_stop(to); + mlb_evt_timer_register_count(to, event); + mlb_evt_timer_start(to, MLB_TIMER_ONESHOT); return 0; } static int mlb_config_clock_source(struct timer_of *to) { - writel_relaxed(0, timer_of_base(to) + MLB_TMR_SRC_TMCSR_OFS); - writel_relaxed(~0, timer_of_base(to) + MLB_TMR_SRC_TMR_OFS); + u32 val = MLB_TMR_TMCSR_CSL_DIV2; + + writel_relaxed(val, timer_of_base(to) + MLB_TMR_SRC_TMCSR_OFS); writel_relaxed(~0, timer_of_base(to) + MLB_TMR_SRC_TMRLR1_OFS); writel_relaxed(~0, timer_of_base(to) + MLB_TMR_SRC_TMRLR2_OFS); - writel_relaxed(BIT(4) | BIT(1) | BIT(0), timer_of_base(to) + - MLB_TMR_SRC_TMCSR_OFS); + val |= MLB_TMR_TMCSR_RELD | MLB_TMR_TMCSR_CNTE | MLB_TMR_TMCSR_TRG; + writel_relaxed(val, timer_of_base(to) + MLB_TMR_SRC_TMCSR_OFS); return 0; }