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[209.132.180.67]) by mx.google.com with ESMTP id z8si1618921pgp.527.2019.03.20.06.18.36; Wed, 20 Mar 2019 06:18:36 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=UOQs9usB; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726239AbfCTNSf (ORCPT + 15 others); Wed, 20 Mar 2019 09:18:35 -0400 Received: from mail-pf1-f196.google.com ([209.85.210.196]:42222 "EHLO mail-pf1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728077AbfCTNSf (ORCPT ); Wed, 20 Mar 2019 09:18:35 -0400 Received: by mail-pf1-f196.google.com with SMTP id r15so1912156pfn.9 for ; Wed, 20 Mar 2019 06:18:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=EYEReSxeWIuqeiplHO2Z2gK7D8drn851qAor5BXzrKQ=; b=UOQs9usBhylW8G4JhkT0ywoNelAV5w7v9AVMJkaJdJDr9R8v4ZjJ185+6dr2Q2qysl msht1CwPbaQHVdTwyaIwmLTHy8gXS35KiXN/QfJXGKWPjOMQZkhIYy+TX/Ilcw0YDLxw 2RVTnsztpEjN4uLQ2NyN5Ao4Z5SG2M8wrnljQQKGOfTUuJ3tH3aXH6HNcos+jeOvV/vi kN5nVyHjw/9uM8RrssJHg2ujUGVjYm94HP7YkGqHbV8xfFpSN64CcxISQ5kUa4ep1cZv AYk1meTA0spjTh/RpnMiTupKVS0q6Ha51RxuHXps3OgRZxneHbhLWVZl4D+GTDj7gSGW QhyA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=EYEReSxeWIuqeiplHO2Z2gK7D8drn851qAor5BXzrKQ=; b=Ex8UvPNDAHti7wiYlfF3zYqBBzErRGA+BinwuyVh22l7dp5IVU0GB7ergsoVpellwT Nz05nHOLjctxEhtizYnAByG2lv6J6gOB1vKBfbiP0JRZpoASbDSs7vFM9NfW7rG+m+VP dkp8Q9W1OA8tYhbyRClewKZNEKXDy+M6VXHvY6/K54PIAAs+9qbVKF+trxo0jzMv1LWm pwCXgYN4+fItvIE/SQB5a6g9nmOH2Z4OeH5Sffda1qv/fMCYcBDTwKuLVoEWcjJvQElr GWIuUmZ7b1SBYq5wTiUXmDwkIrEHNNnU4Cr2lCJtOzpozt/O7QYSjvuVdBmhzF15oOD9 f/Ig== X-Gm-Message-State: APjAAAXSy29h15f8Bek5u9ISkY5rs7ED0i2aqk+VtT0p7Y1WQn1cDCRH SsJPRuBZSXIgLg7jLeomAnFMEQ== X-Received: by 2002:a63:3d0e:: with SMTP id k14mr7476824pga.302.1553087914188; Wed, 20 Mar 2019 06:18:34 -0700 (PDT) Received: from localhost ([114.143.122.221]) by smtp.gmail.com with ESMTPSA id u62sm7581521pfa.124.2019.03.20.06.18.32 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 20 Mar 2019 06:18:33 -0700 (PDT) From: Amit Kucheria To: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, edubezval@gmail.com, andy.gross@linaro.org, Daniel Lezcano , David Brown , Zhang Rui Cc: linux-pm@vger.kernel.org Subject: [PATCHv3 03/23] drivers: thermal: tsens: Rename tsens_device Date: Wed, 20 Mar 2019 18:47:43 +0530 Message-Id: <0e98211e8d7c5bd64e1914b984eccbcec112096f.1553086065.git.amit.kucheria@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Rename to tsens_priv to denote that it is private data for each tsens instance. Signed-off-by: Amit Kucheria --- drivers/thermal/qcom/tsens-8916.c | 2 +- drivers/thermal/qcom/tsens-8960.c | 14 +++++++------- drivers/thermal/qcom/tsens-8974.c | 2 +- drivers/thermal/qcom/tsens-common.c | 6 +++--- drivers/thermal/qcom/tsens-v2.c | 2 +- drivers/thermal/qcom/tsens.c | 14 +++++++------- drivers/thermal/qcom/tsens.h | 30 ++++++++++++++--------------- 7 files changed, 35 insertions(+), 35 deletions(-) -- 2.17.1 diff --git a/drivers/thermal/qcom/tsens-8916.c b/drivers/thermal/qcom/tsens-8916.c index 66edcfca1526..7b8f83c9a033 100644 --- a/drivers/thermal/qcom/tsens-8916.c +++ b/drivers/thermal/qcom/tsens-8916.c @@ -39,7 +39,7 @@ #define CAL_SEL_MASK 0xe0000000 #define CAL_SEL_SHIFT 29 -static int calibrate_8916(struct tsens_device *tmdev) +static int calibrate_8916(struct tsens_priv *tmdev) { int base0 = 0, base1 = 0, i; u32 p1[5], p2[5]; diff --git a/drivers/thermal/qcom/tsens-8960.c b/drivers/thermal/qcom/tsens-8960.c index f3c3820e6e8e..7e340eea48da 100644 --- a/drivers/thermal/qcom/tsens-8960.c +++ b/drivers/thermal/qcom/tsens-8960.c @@ -56,7 +56,7 @@ #define TRDY_MASK BIT(7) #define TIMEOUT_US 100 -static int suspend_8960(struct tsens_device *tmdev) +static int suspend_8960(struct tsens_priv *tmdev) { int ret; unsigned int mask; @@ -82,7 +82,7 @@ static int suspend_8960(struct tsens_device *tmdev) return 0; } -static int resume_8960(struct tsens_device *tmdev) +static int resume_8960(struct tsens_priv *tmdev) { int ret; struct regmap *map = tmdev->tm_map; @@ -112,7 +112,7 @@ static int resume_8960(struct tsens_device *tmdev) return 0; } -static int enable_8960(struct tsens_device *tmdev, int id) +static int enable_8960(struct tsens_priv *tmdev, int id) { int ret; u32 reg, mask; @@ -138,7 +138,7 @@ static int enable_8960(struct tsens_device *tmdev, int id) return 0; } -static void disable_8960(struct tsens_device *tmdev) +static void disable_8960(struct tsens_priv *tmdev) { int ret; u32 reg_cntl; @@ -162,7 +162,7 @@ static void disable_8960(struct tsens_device *tmdev) regmap_write(tmdev->tm_map, CNTL_ADDR, reg_cntl); } -static int init_8960(struct tsens_device *tmdev) +static int init_8960(struct tsens_priv *tmdev) { int ret, i; u32 reg_cntl; @@ -212,7 +212,7 @@ static int init_8960(struct tsens_device *tmdev) return 0; } -static int calibrate_8960(struct tsens_device *tmdev) +static int calibrate_8960(struct tsens_priv *tmdev) { int i; char *data; @@ -243,7 +243,7 @@ static inline int code_to_mdegC(u32 adc_code, const struct tsens_sensor *s) return adc_code * slope + offset; } -static int get_temp_8960(struct tsens_device *tmdev, int id, int *temp) +static int get_temp_8960(struct tsens_priv *tmdev, int id, int *temp) { int ret; u32 code, trdy; diff --git a/drivers/thermal/qcom/tsens-8974.c b/drivers/thermal/qcom/tsens-8974.c index 5023f20afc14..f983f98f2176 100644 --- a/drivers/thermal/qcom/tsens-8974.c +++ b/drivers/thermal/qcom/tsens-8974.c @@ -91,7 +91,7 @@ #define BIT_APPEND 0x3 -static int calibrate_8974(struct tsens_device *tmdev) +static int calibrate_8974(struct tsens_priv *tmdev) { int base1 = 0, base2 = 0, i; u32 p1[11], p2[11]; diff --git a/drivers/thermal/qcom/tsens-common.c b/drivers/thermal/qcom/tsens-common.c index f80c73f11740..46f8c68c70f5 100644 --- a/drivers/thermal/qcom/tsens-common.c +++ b/drivers/thermal/qcom/tsens-common.c @@ -46,7 +46,7 @@ char *qfprom_read(struct device *dev, const char *cname) * and offset values are derived from tz->tzp->slope and tz->tzp->offset * resp. */ -void compute_intercept_slope(struct tsens_device *tmdev, u32 *p1, +void compute_intercept_slope(struct tsens_priv *tmdev, u32 *p1, u32 *p2, u32 mode) { int i; @@ -95,7 +95,7 @@ static inline int code_to_degc(u32 adc_code, const struct tsens_sensor *s) return degc; } -int get_temp_common(struct tsens_device *tmdev, int id, int *temp) +int get_temp_common(struct tsens_priv *tmdev, int id, int *temp) { struct tsens_sensor *s = &tmdev->sensor[id]; u32 code; @@ -127,7 +127,7 @@ static const struct regmap_config tsens_srot_config = { .reg_stride = 4, }; -int __init init_common(struct tsens_device *tmdev) +int __init init_common(struct tsens_priv *tmdev) { void __iomem *tm_base, *srot_base; struct resource *res; diff --git a/drivers/thermal/qcom/tsens-v2.c b/drivers/thermal/qcom/tsens-v2.c index cc98a61e093b..d812fd3f4567 100644 --- a/drivers/thermal/qcom/tsens-v2.c +++ b/drivers/thermal/qcom/tsens-v2.c @@ -12,7 +12,7 @@ #define LAST_TEMP_MASK 0xfff #define STATUS_VALID_BIT BIT(21) -static int get_temp_tsens_v2(struct tsens_device *tmdev, int id, int *temp) +static int get_temp_tsens_v2(struct tsens_priv *tmdev, int id, int *temp) { struct tsens_sensor *s = &tmdev->sensor[id]; u32 code; diff --git a/drivers/thermal/qcom/tsens.c b/drivers/thermal/qcom/tsens.c index 065ec2189bd3..074fbb4d70f2 100644 --- a/drivers/thermal/qcom/tsens.c +++ b/drivers/thermal/qcom/tsens.c @@ -15,7 +15,7 @@ static int tsens_get_temp(void *data, int *temp) { const struct tsens_sensor *s = data; - struct tsens_device *tmdev = s->tmdev; + struct tsens_priv *tmdev = s->tmdev; return tmdev->ops->get_temp(tmdev, s->id, temp); } @@ -23,7 +23,7 @@ static int tsens_get_temp(void *data, int *temp) static int tsens_get_trend(void *p, int trip, enum thermal_trend *trend) { const struct tsens_sensor *s = p; - struct tsens_device *tmdev = s->tmdev; + struct tsens_priv *tmdev = s->tmdev; if (tmdev->ops->get_trend) return tmdev->ops->get_trend(tmdev, s->id, trend); @@ -33,7 +33,7 @@ static int tsens_get_trend(void *p, int trip, enum thermal_trend *trend) static int __maybe_unused tsens_suspend(struct device *dev) { - struct tsens_device *tmdev = dev_get_drvdata(dev); + struct tsens_priv *tmdev = dev_get_drvdata(dev); if (tmdev->ops && tmdev->ops->suspend) return tmdev->ops->suspend(tmdev); @@ -43,7 +43,7 @@ static int __maybe_unused tsens_suspend(struct device *dev) static int __maybe_unused tsens_resume(struct device *dev) { - struct tsens_device *tmdev = dev_get_drvdata(dev); + struct tsens_priv *tmdev = dev_get_drvdata(dev); if (tmdev->ops && tmdev->ops->resume) return tmdev->ops->resume(tmdev); @@ -76,7 +76,7 @@ static const struct thermal_zone_of_device_ops tsens_of_ops = { .get_trend = tsens_get_trend, }; -static int tsens_register(struct tsens_device *tmdev) +static int tsens_register(struct tsens_priv *tmdev) { int i; struct thermal_zone_device *tzd; @@ -101,7 +101,7 @@ static int tsens_probe(struct platform_device *pdev) int ret, i; struct device *dev; struct device_node *np; - struct tsens_device *tmdev; + struct tsens_priv *tmdev; const struct tsens_plat_data *data; const struct of_device_id *id; u32 num_sensors; @@ -174,7 +174,7 @@ static int tsens_probe(struct platform_device *pdev) static int tsens_remove(struct platform_device *pdev) { - struct tsens_device *tmdev = platform_get_drvdata(pdev); + struct tsens_priv *tmdev = platform_get_drvdata(pdev); if (tmdev->ops->disable) tmdev->ops->disable(tmdev); diff --git a/drivers/thermal/qcom/tsens.h b/drivers/thermal/qcom/tsens.h index 232376c690cc..936bdc7b1bc2 100644 --- a/drivers/thermal/qcom/tsens.h +++ b/drivers/thermal/qcom/tsens.h @@ -12,7 +12,7 @@ #include -struct tsens_device; +struct tsens_priv; /** * struct tsens_sensor - data for each sensor connected to the tsens device @@ -25,7 +25,7 @@ struct tsens_device; * @status: 8960-specific variable to track 8960 and 8660 status register offset */ struct tsens_sensor { - struct tsens_device *tmdev; + struct tsens_priv *tmdev; struct thermal_zone_device *tzd; int offset; int id; @@ -47,15 +47,15 @@ struct tsens_sensor { */ struct tsens_ops { /* mandatory callbacks */ - int (*init)(struct tsens_device *); - int (*calibrate)(struct tsens_device *); - int (*get_temp)(struct tsens_device *, int, int *); + int (*init)(struct tsens_priv *); + int (*calibrate)(struct tsens_priv *); + int (*get_temp)(struct tsens_priv *, int, int *); /* optional callbacks */ - int (*enable)(struct tsens_device *, int); - void (*disable)(struct tsens_device *); - int (*suspend)(struct tsens_device *); - int (*resume)(struct tsens_device *); - int (*get_trend)(struct tsens_device *, int, enum thermal_trend *); + int (*enable)(struct tsens_priv *, int); + void (*disable)(struct tsens_priv *); + int (*suspend)(struct tsens_priv *); + int (*resume)(struct tsens_priv *); + int (*get_trend)(struct tsens_priv *, int, enum thermal_trend *); }; enum reg_list { @@ -87,7 +87,7 @@ struct tsens_context { }; /** - * struct tsens_device - private data for each instance of the tsens IP + * struct tsens_priv - private data for each instance of the tsens IP * @dev: pointer to struct device * @num_sensors: number of sensors enabled on this device * @tm_map: pointer to TM register address space @@ -99,7 +99,7 @@ struct tsens_context { * @ops: pointer to list of callbacks supported by this device * @sensor: list of sensors attached to this device */ -struct tsens_device { +struct tsens_priv { struct device *dev; u32 num_sensors; struct regmap *tm_map; @@ -112,9 +112,9 @@ struct tsens_device { }; char *qfprom_read(struct device *, const char *); -void compute_intercept_slope(struct tsens_device *, u32 *, u32 *, u32); -int init_common(struct tsens_device *); -int get_temp_common(struct tsens_device *, int, int *); +void compute_intercept_slope(struct tsens_priv *, u32 *, u32 *, u32); +int init_common(struct tsens_priv *); +int get_temp_common(struct tsens_priv *, int, int *); /* TSENS v1 targets */ extern const struct tsens_plat_data data_8916, data_8974, data_8960; From patchwork Wed Mar 20 13:17:44 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 160671 Delivered-To: patch@linaro.org Received: by 2002:a02:c6d8:0:0:0:0:0 with SMTP id r24csp281982jan; Wed, 20 Mar 2019 06:18:42 -0700 (PDT) X-Google-Smtp-Source: APXvYqxGwM+FfC+y/LBkCDYv7GgaIrm6fGNC9iiSrO1sSYyXx+F6PrKBMmgqboWFV4c9JTw0etIJ X-Received: by 2002:a17:902:b609:: with SMTP id b9mr7974518pls.134.1553087922843; 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Rename it to priv improve code readability. Signed-off-by: Amit Kucheria --- drivers/thermal/qcom/tsens-8916.c | 16 +++--- drivers/thermal/qcom/tsens-8960.c | 82 ++++++++++++++--------------- drivers/thermal/qcom/tsens-8974.c | 16 +++--- drivers/thermal/qcom/tsens-common.c | 53 +++++++++---------- drivers/thermal/qcom/tsens-v2.c | 12 ++--- drivers/thermal/qcom/tsens.c | 80 ++++++++++++++-------------- drivers/thermal/qcom/tsens.h | 4 +- 7 files changed, 131 insertions(+), 132 deletions(-) -- 2.17.1 diff --git a/drivers/thermal/qcom/tsens-8916.c b/drivers/thermal/qcom/tsens-8916.c index 7b8f83c9a033..d4ad4082c800 100644 --- a/drivers/thermal/qcom/tsens-8916.c +++ b/drivers/thermal/qcom/tsens-8916.c @@ -39,23 +39,23 @@ #define CAL_SEL_MASK 0xe0000000 #define CAL_SEL_SHIFT 29 -static int calibrate_8916(struct tsens_priv *tmdev) +static int calibrate_8916(struct tsens_priv *priv) { int base0 = 0, base1 = 0, i; u32 p1[5], p2[5]; int mode = 0; u32 *qfprom_cdata, *qfprom_csel; - qfprom_cdata = (u32 *)qfprom_read(tmdev->dev, "calib"); + qfprom_cdata = (u32 *)qfprom_read(priv->dev, "calib"); if (IS_ERR(qfprom_cdata)) return PTR_ERR(qfprom_cdata); - qfprom_csel = (u32 *)qfprom_read(tmdev->dev, "calib_sel"); + qfprom_csel = (u32 *)qfprom_read(priv->dev, "calib_sel"); if (IS_ERR(qfprom_csel)) return PTR_ERR(qfprom_csel); mode = (qfprom_csel[0] & CAL_SEL_MASK) >> CAL_SEL_SHIFT; - dev_dbg(tmdev->dev, "calibration mode is %d\n", mode); + dev_dbg(priv->dev, "calibration mode is %d\n", mode); switch (mode) { case TWO_PT_CALIB: @@ -65,7 +65,7 @@ static int calibrate_8916(struct tsens_priv *tmdev) p2[2] = (qfprom_cdata[1] & S2_P2_MASK) >> S2_P2_SHIFT; p2[3] = (qfprom_cdata[1] & S3_P2_MASK) >> S3_P2_SHIFT; p2[4] = (qfprom_cdata[1] & S4_P2_MASK) >> S4_P2_SHIFT; - for (i = 0; i < tmdev->num_sensors; i++) + for (i = 0; i < priv->num_sensors; i++) p2[i] = ((base1 + p2[i]) << 3); /* Fall through */ case ONE_PT_CALIB2: @@ -75,18 +75,18 @@ static int calibrate_8916(struct tsens_priv *tmdev) p1[2] = (qfprom_cdata[0] & S2_P1_MASK) >> S2_P1_SHIFT; p1[3] = (qfprom_cdata[1] & S3_P1_MASK) >> S3_P1_SHIFT; p1[4] = (qfprom_cdata[1] & S4_P1_MASK) >> S4_P1_SHIFT; - for (i = 0; i < tmdev->num_sensors; i++) + for (i = 0; i < priv->num_sensors; i++) p1[i] = (((base0) + p1[i]) << 3); break; default: - for (i = 0; i < tmdev->num_sensors; i++) { + for (i = 0; i < priv->num_sensors; i++) { p1[i] = 500; p2[i] = 780; } break; } - compute_intercept_slope(tmdev, p1, p2, mode); + compute_intercept_slope(priv, p1, p2, mode); return 0; } diff --git a/drivers/thermal/qcom/tsens-8960.c b/drivers/thermal/qcom/tsens-8960.c index 7e340eea48da..8d9b721dadb6 100644 --- a/drivers/thermal/qcom/tsens-8960.c +++ b/drivers/thermal/qcom/tsens-8960.c @@ -56,21 +56,21 @@ #define TRDY_MASK BIT(7) #define TIMEOUT_US 100 -static int suspend_8960(struct tsens_priv *tmdev) +static int suspend_8960(struct tsens_priv *priv) { int ret; unsigned int mask; - struct regmap *map = tmdev->tm_map; + struct regmap *map = priv->tm_map; - ret = regmap_read(map, THRESHOLD_ADDR, &tmdev->ctx.threshold); + ret = regmap_read(map, THRESHOLD_ADDR, &priv->ctx.threshold); if (ret) return ret; - ret = regmap_read(map, CNTL_ADDR, &tmdev->ctx.control); + ret = regmap_read(map, CNTL_ADDR, &priv->ctx.control); if (ret) return ret; - if (tmdev->num_sensors > 1) + if (priv->num_sensors > 1) mask = SLP_CLK_ENA | EN; else mask = SLP_CLK_ENA_8660 | EN; @@ -82,10 +82,10 @@ static int suspend_8960(struct tsens_priv *tmdev) return 0; } -static int resume_8960(struct tsens_priv *tmdev) +static int resume_8960(struct tsens_priv *priv) { int ret; - struct regmap *map = tmdev->tm_map; + struct regmap *map = priv->tm_map; ret = regmap_update_bits(map, CNTL_ADDR, SW_RST, SW_RST); if (ret) @@ -95,80 +95,80 @@ static int resume_8960(struct tsens_priv *tmdev) * Separate CONFIG restore is not needed only for 8660 as * config is part of CTRL Addr and its restored as such */ - if (tmdev->num_sensors > 1) { + if (priv->num_sensors > 1) { ret = regmap_update_bits(map, CONFIG_ADDR, CONFIG_MASK, CONFIG); if (ret) return ret; } - ret = regmap_write(map, THRESHOLD_ADDR, tmdev->ctx.threshold); + ret = regmap_write(map, THRESHOLD_ADDR, priv->ctx.threshold); if (ret) return ret; - ret = regmap_write(map, CNTL_ADDR, tmdev->ctx.control); + ret = regmap_write(map, CNTL_ADDR, priv->ctx.control); if (ret) return ret; return 0; } -static int enable_8960(struct tsens_priv *tmdev, int id) +static int enable_8960(struct tsens_priv *priv, int id) { int ret; u32 reg, mask; - ret = regmap_read(tmdev->tm_map, CNTL_ADDR, ®); + ret = regmap_read(priv->tm_map, CNTL_ADDR, ®); if (ret) return ret; mask = BIT(id + SENSOR0_SHIFT); - ret = regmap_write(tmdev->tm_map, CNTL_ADDR, reg | SW_RST); + ret = regmap_write(priv->tm_map, CNTL_ADDR, reg | SW_RST); if (ret) return ret; - if (tmdev->num_sensors > 1) + if (priv->num_sensors > 1) reg |= mask | SLP_CLK_ENA | EN; else reg |= mask | SLP_CLK_ENA_8660 | EN; - ret = regmap_write(tmdev->tm_map, CNTL_ADDR, reg); + ret = regmap_write(priv->tm_map, CNTL_ADDR, reg); if (ret) return ret; return 0; } -static void disable_8960(struct tsens_priv *tmdev) +static void disable_8960(struct tsens_priv *priv) { int ret; u32 reg_cntl; u32 mask; - mask = GENMASK(tmdev->num_sensors - 1, 0); + mask = GENMASK(priv->num_sensors - 1, 0); mask <<= SENSOR0_SHIFT; mask |= EN; - ret = regmap_read(tmdev->tm_map, CNTL_ADDR, ®_cntl); + ret = regmap_read(priv->tm_map, CNTL_ADDR, ®_cntl); if (ret) return; reg_cntl &= ~mask; - if (tmdev->num_sensors > 1) + if (priv->num_sensors > 1) reg_cntl &= ~SLP_CLK_ENA; else reg_cntl &= ~SLP_CLK_ENA_8660; - regmap_write(tmdev->tm_map, CNTL_ADDR, reg_cntl); + regmap_write(priv->tm_map, CNTL_ADDR, reg_cntl); } -static int init_8960(struct tsens_priv *tmdev) +static int init_8960(struct tsens_priv *priv) { int ret, i; u32 reg_cntl; - tmdev->tm_map = dev_get_regmap(tmdev->dev, NULL); - if (!tmdev->tm_map) + priv->tm_map = dev_get_regmap(priv->dev, NULL); + if (!priv->tm_map) return -ENODEV; /* @@ -177,21 +177,21 @@ static int init_8960(struct tsens_priv *tmdev) * but the control registers stay in the same place, i.e * directly after the first 5 status registers. */ - for (i = 0; i < tmdev->num_sensors; i++) { + for (i = 0; i < priv->num_sensors; i++) { if (i >= 5) - tmdev->sensor[i].status = S0_STATUS_ADDR + 40; - tmdev->sensor[i].status += i * 4; + priv->sensor[i].status = S0_STATUS_ADDR + 40; + priv->sensor[i].status += i * 4; } reg_cntl = SW_RST; - ret = regmap_update_bits(tmdev->tm_map, CNTL_ADDR, SW_RST, reg_cntl); + ret = regmap_update_bits(priv->tm_map, CNTL_ADDR, SW_RST, reg_cntl); if (ret) return ret; - if (tmdev->num_sensors > 1) { + if (priv->num_sensors > 1) { reg_cntl |= SLP_CLK_ENA | (MEASURE_PERIOD << 18); reg_cntl &= ~SW_RST; - ret = regmap_update_bits(tmdev->tm_map, CONFIG_ADDR, + ret = regmap_update_bits(priv->tm_map, CONFIG_ADDR, CONFIG_MASK, CONFIG); } else { reg_cntl |= SLP_CLK_ENA_8660 | (MEASURE_PERIOD << 16); @@ -199,30 +199,30 @@ static int init_8960(struct tsens_priv *tmdev) reg_cntl |= CONFIG_8660 << CONFIG_SHIFT_8660; } - reg_cntl |= GENMASK(tmdev->num_sensors - 1, 0) << SENSOR0_SHIFT; - ret = regmap_write(tmdev->tm_map, CNTL_ADDR, reg_cntl); + reg_cntl |= GENMASK(priv->num_sensors - 1, 0) << SENSOR0_SHIFT; + ret = regmap_write(priv->tm_map, CNTL_ADDR, reg_cntl); if (ret) return ret; reg_cntl |= EN; - ret = regmap_write(tmdev->tm_map, CNTL_ADDR, reg_cntl); + ret = regmap_write(priv->tm_map, CNTL_ADDR, reg_cntl); if (ret) return ret; return 0; } -static int calibrate_8960(struct tsens_priv *tmdev) +static int calibrate_8960(struct tsens_priv *priv) { int i; char *data; - ssize_t num_read = tmdev->num_sensors; - struct tsens_sensor *s = tmdev->sensor; + ssize_t num_read = priv->num_sensors; + struct tsens_sensor *s = priv->sensor; - data = qfprom_read(tmdev->dev, "calib"); + data = qfprom_read(priv->dev, "calib"); if (IS_ERR(data)) - data = qfprom_read(tmdev->dev, "calib_backup"); + data = qfprom_read(priv->dev, "calib_backup"); if (IS_ERR(data)) return PTR_ERR(data); @@ -243,21 +243,21 @@ static inline int code_to_mdegC(u32 adc_code, const struct tsens_sensor *s) return adc_code * slope + offset; } -static int get_temp_8960(struct tsens_priv *tmdev, int id, int *temp) +static int get_temp_8960(struct tsens_priv *priv, int id, int *temp) { int ret; u32 code, trdy; - const struct tsens_sensor *s = &tmdev->sensor[id]; + const struct tsens_sensor *s = &priv->sensor[id]; unsigned long timeout; timeout = jiffies + usecs_to_jiffies(TIMEOUT_US); do { - ret = regmap_read(tmdev->tm_map, INT_STATUS_ADDR, &trdy); + ret = regmap_read(priv->tm_map, INT_STATUS_ADDR, &trdy); if (ret) return ret; if (!(trdy & TRDY_MASK)) continue; - ret = regmap_read(tmdev->tm_map, s->status, &code); + ret = regmap_read(priv->tm_map, s->status, &code); if (ret) return ret; *temp = code_to_mdegC(code, s); diff --git a/drivers/thermal/qcom/tsens-8974.c b/drivers/thermal/qcom/tsens-8974.c index f983f98f2176..303157fd00be 100644 --- a/drivers/thermal/qcom/tsens-8974.c +++ b/drivers/thermal/qcom/tsens-8974.c @@ -91,7 +91,7 @@ #define BIT_APPEND 0x3 -static int calibrate_8974(struct tsens_priv *tmdev) +static int calibrate_8974(struct tsens_priv *priv) { int base1 = 0, base2 = 0, i; u32 p1[11], p2[11]; @@ -99,11 +99,11 @@ static int calibrate_8974(struct tsens_priv *tmdev) u32 *calib, *bkp; u32 calib_redun_sel; - calib = (u32 *)qfprom_read(tmdev->dev, "calib"); + calib = (u32 *)qfprom_read(priv->dev, "calib"); if (IS_ERR(calib)) return PTR_ERR(calib); - bkp = (u32 *)qfprom_read(tmdev->dev, "calib_backup"); + bkp = (u32 *)qfprom_read(priv->dev, "calib_backup"); if (IS_ERR(bkp)) return PTR_ERR(bkp); @@ -184,25 +184,25 @@ static int calibrate_8974(struct tsens_priv *tmdev) switch (mode) { case ONE_PT_CALIB: - for (i = 0; i < tmdev->num_sensors; i++) + for (i = 0; i < priv->num_sensors; i++) p1[i] += (base1 << 2) | BIT_APPEND; break; case TWO_PT_CALIB: - for (i = 0; i < tmdev->num_sensors; i++) { + for (i = 0; i < priv->num_sensors; i++) { p2[i] += base2; p2[i] <<= 2; p2[i] |= BIT_APPEND; } /* Fall through */ case ONE_PT_CALIB2: - for (i = 0; i < tmdev->num_sensors; i++) { + for (i = 0; i < priv->num_sensors; i++) { p1[i] += base1; p1[i] <<= 2; p1[i] |= BIT_APPEND; } break; default: - for (i = 0; i < tmdev->num_sensors; i++) + for (i = 0; i < priv->num_sensors; i++) p2[i] = 780; p1[0] = 502; p1[1] = 509; @@ -218,7 +218,7 @@ static int calibrate_8974(struct tsens_priv *tmdev) break; } - compute_intercept_slope(tmdev, p1, p2, mode); + compute_intercept_slope(priv, p1, p2, mode); return 0; } diff --git a/drivers/thermal/qcom/tsens-common.c b/drivers/thermal/qcom/tsens-common.c index 46f8c68c70f5..f0ef4e3cf7f9 100644 --- a/drivers/thermal/qcom/tsens-common.c +++ b/drivers/thermal/qcom/tsens-common.c @@ -46,18 +46,18 @@ char *qfprom_read(struct device *dev, const char *cname) * and offset values are derived from tz->tzp->slope and tz->tzp->offset * resp. */ -void compute_intercept_slope(struct tsens_priv *tmdev, u32 *p1, +void compute_intercept_slope(struct tsens_priv *priv, u32 *p1, u32 *p2, u32 mode) { int i; int num, den; - for (i = 0; i < tmdev->num_sensors; i++) { - dev_dbg(tmdev->dev, + for (i = 0; i < priv->num_sensors; i++) { + dev_dbg(priv->dev, "sensor%d - data_point1:%#x data_point2:%#x\n", i, p1[i], p2[i]); - tmdev->sensor[i].slope = SLOPE_DEFAULT; + priv->sensor[i].slope = SLOPE_DEFAULT; if (mode == TWO_PT_CALIB) { /* * slope (m) = adc_code2 - adc_code1 (y2 - y1)/ @@ -66,13 +66,13 @@ void compute_intercept_slope(struct tsens_priv *tmdev, u32 *p1, num = p2[i] - p1[i]; num *= SLOPE_FACTOR; den = CAL_DEGC_PT2 - CAL_DEGC_PT1; - tmdev->sensor[i].slope = num / den; + priv->sensor[i].slope = num / den; } - tmdev->sensor[i].offset = (p1[i] * SLOPE_FACTOR) - + priv->sensor[i].offset = (p1[i] * SLOPE_FACTOR) - (CAL_DEGC_PT1 * - tmdev->sensor[i].slope); - dev_dbg(tmdev->dev, "offset:%d\n", tmdev->sensor[i].offset); + priv->sensor[i].slope); + dev_dbg(priv->dev, "offset:%d\n", priv->sensor[i].offset); } } @@ -95,15 +95,15 @@ static inline int code_to_degc(u32 adc_code, const struct tsens_sensor *s) return degc; } -int get_temp_common(struct tsens_priv *tmdev, int id, int *temp) +int get_temp_common(struct tsens_priv *priv, int id, int *temp) { - struct tsens_sensor *s = &tmdev->sensor[id]; + struct tsens_sensor *s = &priv->sensor[id]; u32 code; unsigned int status_reg; int last_temp = 0, ret; - status_reg = tmdev->tm_offset + STATUS_OFFSET + s->hw_id * SN_ADDR_OFFSET; - ret = regmap_read(tmdev->tm_map, status_reg, &code); + status_reg = priv->tm_offset + STATUS_OFFSET + s->hw_id * SN_ADDR_OFFSET; + ret = regmap_read(priv->tm_map, status_reg, &code); if (ret) return ret; last_temp = code & SN_ST_TEMP_MASK; @@ -127,21 +127,21 @@ static const struct regmap_config tsens_srot_config = { .reg_stride = 4, }; -int __init init_common(struct tsens_priv *tmdev) +int __init init_common(struct tsens_priv *priv) { void __iomem *tm_base, *srot_base; struct resource *res; u32 code; int ret; - struct platform_device *op = of_find_device_by_node(tmdev->dev->of_node); - u16 ctrl_offset = tmdev->reg_offsets[SROT_CTRL_OFFSET]; + struct platform_device *op = of_find_device_by_node(priv->dev->of_node); + u16 ctrl_offset = priv->reg_offsets[SROT_CTRL_OFFSET]; if (!op) return -EINVAL; if (op->num_resources > 1) { /* DT with separate SROT and TM address space */ - tmdev->tm_offset = 0; + priv->tm_offset = 0; res = platform_get_resource(op, IORESOURCE_MEM, 1); srot_base = devm_ioremap_resource(&op->dev, res); if (IS_ERR(srot_base)) { @@ -149,16 +149,15 @@ int __init init_common(struct tsens_priv *tmdev) goto err_put_device; } - tmdev->srot_map = devm_regmap_init_mmio(tmdev->dev, srot_base, + priv->srot_map = devm_regmap_init_mmio(priv->dev, srot_base, &tsens_srot_config); - if (IS_ERR(tmdev->srot_map)) { - ret = PTR_ERR(tmdev->srot_map); + if (IS_ERR(priv->srot_map)) { + ret = PTR_ERR(priv->srot_map); goto err_put_device; } - } else { /* old DTs where SROT and TM were in a contiguous 2K block */ - tmdev->tm_offset = 0x1000; + priv->tm_offset = 0x1000; } res = platform_get_resource(op, IORESOURCE_MEM, 0); @@ -168,18 +167,18 @@ int __init init_common(struct tsens_priv *tmdev) goto err_put_device; } - tmdev->tm_map = devm_regmap_init_mmio(tmdev->dev, tm_base, &tsens_config); - if (IS_ERR(tmdev->tm_map)) { - ret = PTR_ERR(tmdev->tm_map); + priv->tm_map = devm_regmap_init_mmio(priv->dev, tm_base, &tsens_config); + if (IS_ERR(priv->tm_map)) { + ret = PTR_ERR(priv->tm_map); goto err_put_device; } - if (tmdev->srot_map) { - ret = regmap_read(tmdev->srot_map, ctrl_offset, &code); + if (priv->srot_map) { + ret = regmap_read(priv->srot_map, ctrl_offset, &code); if (ret) goto err_put_device; if (!(code & TSENS_EN)) { - dev_err(tmdev->dev, "tsens device is not enabled\n"); + dev_err(priv->dev, "tsens device is not enabled\n"); ret = -ENODEV; goto err_put_device; } diff --git a/drivers/thermal/qcom/tsens-v2.c b/drivers/thermal/qcom/tsens-v2.c index d812fd3f4567..8b700772d903 100644 --- a/drivers/thermal/qcom/tsens-v2.c +++ b/drivers/thermal/qcom/tsens-v2.c @@ -12,16 +12,16 @@ #define LAST_TEMP_MASK 0xfff #define STATUS_VALID_BIT BIT(21) -static int get_temp_tsens_v2(struct tsens_priv *tmdev, int id, int *temp) +static int get_temp_tsens_v2(struct tsens_priv *priv, int id, int *temp) { - struct tsens_sensor *s = &tmdev->sensor[id]; + struct tsens_sensor *s = &priv->sensor[id]; u32 code; unsigned int status_reg; u32 last_temp = 0, last_temp2 = 0, last_temp3 = 0; int ret; - status_reg = tmdev->tm_offset + STATUS_OFFSET + s->hw_id * 4; - ret = regmap_read(tmdev->tm_map, status_reg, &code); + status_reg = priv->tm_offset + STATUS_OFFSET + s->hw_id * 4; + ret = regmap_read(priv->tm_map, status_reg, &code); if (ret) return ret; last_temp = code & LAST_TEMP_MASK; @@ -29,7 +29,7 @@ static int get_temp_tsens_v2(struct tsens_priv *tmdev, int id, int *temp) goto done; /* Try a second time */ - ret = regmap_read(tmdev->tm_map, status_reg, &code); + ret = regmap_read(priv->tm_map, status_reg, &code); if (ret) return ret; if (code & STATUS_VALID_BIT) { @@ -40,7 +40,7 @@ static int get_temp_tsens_v2(struct tsens_priv *tmdev, int id, int *temp) } /* Try a third/last time */ - ret = regmap_read(tmdev->tm_map, status_reg, &code); + ret = regmap_read(priv->tm_map, status_reg, &code); if (ret) return ret; if (code & STATUS_VALID_BIT) { diff --git a/drivers/thermal/qcom/tsens.c b/drivers/thermal/qcom/tsens.c index 074fbb4d70f2..4582d2b30e94 100644 --- a/drivers/thermal/qcom/tsens.c +++ b/drivers/thermal/qcom/tsens.c @@ -15,38 +15,38 @@ static int tsens_get_temp(void *data, int *temp) { const struct tsens_sensor *s = data; - struct tsens_priv *tmdev = s->tmdev; + struct tsens_priv *priv = s->priv; - return tmdev->ops->get_temp(tmdev, s->id, temp); + return priv->ops->get_temp(priv, s->id, temp); } static int tsens_get_trend(void *p, int trip, enum thermal_trend *trend) { const struct tsens_sensor *s = p; - struct tsens_priv *tmdev = s->tmdev; + struct tsens_priv *priv = s->priv; - if (tmdev->ops->get_trend) - return tmdev->ops->get_trend(tmdev, s->id, trend); + if (priv->ops->get_trend) + return priv->ops->get_trend(priv, s->id, trend); return -ENOTSUPP; } static int __maybe_unused tsens_suspend(struct device *dev) { - struct tsens_priv *tmdev = dev_get_drvdata(dev); + struct tsens_priv *priv = dev_get_drvdata(dev); - if (tmdev->ops && tmdev->ops->suspend) - return tmdev->ops->suspend(tmdev); + if (priv->ops && priv->ops->suspend) + return priv->ops->suspend(priv); return 0; } static int __maybe_unused tsens_resume(struct device *dev) { - struct tsens_priv *tmdev = dev_get_drvdata(dev); + struct tsens_priv *priv = dev_get_drvdata(dev); - if (tmdev->ops && tmdev->ops->resume) - return tmdev->ops->resume(tmdev); + if (priv->ops && priv->ops->resume) + return priv->ops->resume(priv); return 0; } @@ -76,22 +76,22 @@ static const struct thermal_zone_of_device_ops tsens_of_ops = { .get_trend = tsens_get_trend, }; -static int tsens_register(struct tsens_priv *tmdev) +static int tsens_register(struct tsens_priv *priv) { int i; struct thermal_zone_device *tzd; - for (i = 0; i < tmdev->num_sensors; i++) { - tmdev->sensor[i].tmdev = tmdev; - tmdev->sensor[i].id = i; - tzd = devm_thermal_zone_of_sensor_register(tmdev->dev, i, - &tmdev->sensor[i], + for (i = 0; i < priv->num_sensors; i++) { + priv->sensor[i].priv = priv; + priv->sensor[i].id = i; + tzd = devm_thermal_zone_of_sensor_register(priv->dev, i, + &priv->sensor[i], &tsens_of_ops); if (IS_ERR(tzd)) continue; - tmdev->sensor[i].tzd = tzd; - if (tmdev->ops->enable) - tmdev->ops->enable(tmdev, i); + priv->sensor[i].tzd = tzd; + if (priv->ops->enable) + priv->ops->enable(priv, i); } return 0; } @@ -101,7 +101,7 @@ static int tsens_probe(struct platform_device *pdev) int ret, i; struct device *dev; struct device_node *np; - struct tsens_priv *tmdev; + struct tsens_priv *priv; const struct tsens_plat_data *data; const struct of_device_id *id; u32 num_sensors; @@ -129,55 +129,55 @@ static int tsens_probe(struct platform_device *pdev) return -EINVAL; } - tmdev = devm_kzalloc(dev, - struct_size(tmdev, sensor, num_sensors), + priv = devm_kzalloc(dev, + struct_size(priv, sensor, num_sensors), GFP_KERNEL); - if (!tmdev) + if (!priv) return -ENOMEM; - tmdev->dev = dev; - tmdev->num_sensors = num_sensors; - tmdev->ops = data->ops; - for (i = 0; i < tmdev->num_sensors; i++) { + priv->dev = dev; + priv->num_sensors = num_sensors; + priv->ops = data->ops; + for (i = 0; i < priv->num_sensors; i++) { if (data->hw_ids) - tmdev->sensor[i].hw_id = data->hw_ids[i]; + priv->sensor[i].hw_id = data->hw_ids[i]; else - tmdev->sensor[i].hw_id = i; + priv->sensor[i].hw_id = i; } for (i = 0; i < REG_ARRAY_SIZE; i++) { - tmdev->reg_offsets[i] = data->reg_offsets[i]; + priv->reg_offsets[i] = data->reg_offsets[i]; } - if (!tmdev->ops || !tmdev->ops->init || !tmdev->ops->get_temp) + if (!priv->ops || !priv->ops->init || !priv->ops->get_temp) return -EINVAL; - ret = tmdev->ops->init(tmdev); + ret = priv->ops->init(priv); if (ret < 0) { dev_err(dev, "tsens init failed\n"); return ret; } - if (tmdev->ops->calibrate) { - ret = tmdev->ops->calibrate(tmdev); + if (priv->ops->calibrate) { + ret = priv->ops->calibrate(priv); if (ret < 0) { dev_err(dev, "tsens calibration failed\n"); return ret; } } - ret = tsens_register(tmdev); + ret = tsens_register(priv); - platform_set_drvdata(pdev, tmdev); + platform_set_drvdata(pdev, priv); return ret; } static int tsens_remove(struct platform_device *pdev) { - struct tsens_priv *tmdev = platform_get_drvdata(pdev); + struct tsens_priv *priv = platform_get_drvdata(pdev); - if (tmdev->ops->disable) - tmdev->ops->disable(tmdev); + if (priv->ops->disable) + priv->ops->disable(priv); return 0; } diff --git a/drivers/thermal/qcom/tsens.h b/drivers/thermal/qcom/tsens.h index 936bdc7b1bc2..61ca2905ee7a 100644 --- a/drivers/thermal/qcom/tsens.h +++ b/drivers/thermal/qcom/tsens.h @@ -16,7 +16,7 @@ struct tsens_priv; /** * struct tsens_sensor - data for each sensor connected to the tsens device - * @tmdev: tsens device instance that this sensor is connected to + * @priv: tsens device instance that this sensor is connected to * @tzd: pointer to the thermal zone that this sensor is in * @offset: offset of temperature adjustment curve * @id: Sensor ID @@ -25,7 +25,7 @@ struct tsens_priv; * @status: 8960-specific variable to track 8960 and 8660 status register offset */ struct tsens_sensor { - struct tsens_priv *tmdev; + struct tsens_priv *priv; struct thermal_zone_device *tzd; int offset; int id; From patchwork Wed Mar 20 13:17:45 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 160672 Delivered-To: patch@linaro.org Received: by 2002:a02:c6d8:0:0:0:0:0 with SMTP id r24csp282073jan; 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Remove a stray space while we're at it. Signed-off-by: Amit Kucheria --- drivers/thermal/qcom/tsens.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) -- 2.17.1 diff --git a/drivers/thermal/qcom/tsens.c b/drivers/thermal/qcom/tsens.c index 4582d2b30e94..0b5be08d515f 100644 --- a/drivers/thermal/qcom/tsens.c +++ b/drivers/thermal/qcom/tsens.c @@ -20,13 +20,13 @@ static int tsens_get_temp(void *data, int *temp) return priv->ops->get_temp(priv, s->id, temp); } -static int tsens_get_trend(void *p, int trip, enum thermal_trend *trend) +static int tsens_get_trend(void *data, int trip, enum thermal_trend *trend) { - const struct tsens_sensor *s = p; + const struct tsens_sensor *s = data; struct tsens_priv *priv = s->priv; if (priv->ops->get_trend) - return priv->ops->get_trend(priv, s->id, trend); + return priv->ops->get_trend(priv, s->id, trend); return -ENOTSUPP; } From patchwork Wed Mar 20 13:17:46 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 160673 Delivered-To: patch@linaro.org Received: by 2002:a02:c6d8:0:0:0:0:0 with SMTP id r24csp282169jan; Wed, 20 Mar 2019 06:18:51 -0700 (PDT) X-Google-Smtp-Source: APXvYqz74XS1PVQCTWzRSVUKbFSBLpHFIAt8i8BSWwqVHubqB/pY7RXF2fjfGSbL7k9RxTPTd0TS X-Received: by 2002:a63:66c1:: with SMTP id a184mr7472767pgc.60.1553087931421; Wed, 20 Mar 2019 06:18:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1553087931; cv=none; d=google.com; s=arc-20160816; b=ICFiDRTdTktpiQUqyreVniXV/UHsz/iO6mvN8GbNqwpB5SLa55LGdansV3W/sRdf+r f0LVshur7OOuZl9Jpb1P0B19bWgVL+Tw2Nrh4IjfaJ78tmNQkcuRcp4vT7pAigxb6yCh FN9VNJepE+snpCG3JSikH4rOOIIjqAPM92gDlEiCGEljp7mszoNyGYIzjByPBPo4pj8R CRN2QfRczFQGzNTuAFmwQO7WWpqqVXmS1GEp/AxLT0kAp7MQ4J/YJSoRtfpiP3MjsRE3 6xpyUota1L1e2RpMrnn2/NiJVs1IGkxgtav05cOMsvG95vOeegKmSX4TmyZVOY491PXR uGuQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature; bh=TBXOh+qCZb1AbvhplyZXyYZ1SSUAH9q1meg8o/qp39A=; b=FDRKyYzRLwu0D3lWwbuhHlcS1v2EnzHKk2jKPWR8IyhVYuO9m2dT4eeLO/ZoCxanrj B6Tv9rHOCO2yWJf73pjkQT+gkbP3eatSq1VpAobY7tJYoQTzznJlcnctie7mw25EMZ2J 8O2R3VDuFrnp+AMUTq14d6sE7TRZxj2cKJ+LTodnQuiilqFAvO4xaglyDx7eZNBvsZIx 1lg1z6Yj8bV8wtEg3DD20V99cRiNtF4MUhaLZupCSfc7bQjSgjmp8320adIiuf/3WbYa jRqKbsjwuNPdEmDg2wBMqojggHQwCA68vUxA6rgGrsLEjPgBsYevDozz9FXo3oxEZsvH tkXg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Dukqm7Yy; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Amit Kucheria --- drivers/thermal/qcom/tsens.h | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) -- 2.17.1 diff --git a/drivers/thermal/qcom/tsens.h b/drivers/thermal/qcom/tsens.h index 61ca2905ee7a..4d6a406f8dca 100644 --- a/drivers/thermal/qcom/tsens.h +++ b/drivers/thermal/qcom/tsens.h @@ -47,15 +47,15 @@ struct tsens_sensor { */ struct tsens_ops { /* mandatory callbacks */ - int (*init)(struct tsens_priv *); - int (*calibrate)(struct tsens_priv *); - int (*get_temp)(struct tsens_priv *, int, int *); + int (*init)(struct tsens_priv *priv); + int (*calibrate)(struct tsens_priv *priv); + int (*get_temp)(struct tsens_priv *priv, int i, int *temp); /* optional callbacks */ - int (*enable)(struct tsens_priv *, int); - void (*disable)(struct tsens_priv *); - int (*suspend)(struct tsens_priv *); - int (*resume)(struct tsens_priv *); - int (*get_trend)(struct tsens_priv *, int, enum thermal_trend *); + int (*enable)(struct tsens_priv *priv, int i); + void (*disable)(struct tsens_priv *priv); + int (*suspend)(struct tsens_priv *priv); + int (*resume)(struct tsens_priv *priv); + int (*get_trend)(struct tsens_priv *priv, int i, enum thermal_trend *trend); }; enum reg_list { @@ -111,10 +111,10 @@ struct tsens_priv { struct tsens_sensor sensor[0]; }; -char *qfprom_read(struct device *, const char *); -void compute_intercept_slope(struct tsens_priv *, u32 *, u32 *, u32); -int init_common(struct tsens_priv *); -int get_temp_common(struct tsens_priv *, int, int *); +char *qfprom_read(struct device *dev, const char *cname); +void compute_intercept_slope(struct tsens_priv *priv, u32 *pt1, u32 *pt2, u32 mode); +int init_common(struct tsens_priv *priv); +int get_temp_common(struct tsens_priv *priv, int i, int *temp); /* TSENS v1 targets */ extern const struct tsens_plat_data data_8916, data_8974, data_8960; From patchwork Wed Mar 20 13:17:48 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 160675 Delivered-To: patch@linaro.org Received: by 2002:a02:c6d8:0:0:0:0:0 with SMTP id r24csp282363jan; Wed, 20 Mar 2019 06:19:01 -0700 (PDT) X-Google-Smtp-Source: APXvYqzU/qphH88GxeLpCSP97w+kh4gsfy57xBaDFTHcotFO8CESqYIoFhN/8cr7Gg/nTy81yhYc X-Received: by 2002:a63:2c3:: with SMTP id 186mr7340011pgc.161.1553087941751; Wed, 20 Mar 2019 06:19:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1553087941; cv=none; d=google.com; s=arc-20160816; b=SBSfrFTjpzvGmFDJw3QNh4Fk0IGWfIp/k4WIpuf8fQk5hMvkXnHeYb3OWdG5UaNuBP BPcoPDGVxe4bH9VVw/MEJQbcA68zMsa6HBs57xCbnSdbQQqBoIsq8c7rVZWbsJd0GWAu iXXKSq79YCSdTXqPEHyuvNYS4/5pawEOeI3I9kgmcbez+eK5K+4ihsclXKjmmlzWvPNi HZjk85BR0gkR4amZ4g7e5/ChGPri5nzTKVMNnIHu7wkP0chIKD5WVXy5K4Y0uxfdbJF3 7N4p4bcn/wFuCP/4mKXANg7lkNH52a7auWh9Bp3qlI1n15HFgztwYJS5TUSU4JQhMnbB tX+A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature; bh=s/+Bl7ZGzK0cL5xDzP2iXR4sdWkOPpcYJr4QjVnhB2E=; b=dYCkYXRAlN277z81/eOTOExG0eADYg75lNPjMwcPq3+30q2lwMukfkTiMceFy22Z+H k9IX4BSFFUwHKn5r5zXKqRJBhsdkoS+YFFow7Lmt7rYGZ3xhqL6y+x8xjWaMhzgtmDbi J/wpi7OnNWaY/2/MlejRfjse9GAjiUdAcgjcNLroAFQAU4gSmdq0uovNpRro4M0GCT0C idQ076eg79QNqu6qla/b4AaEzLi7zlmlTbaOLaxL1tGt6U/IfqquMCO3NEbkz4jwCRp6 TnC58/ScytRfnuO2LOTvgThzn8vP/08cIPhh1L99fTWC2XNJ+WBjKpm7wxrx7NtsE82w n97w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=b9S59dYT; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Prefix them with 8916 to avoid the clash so we can merge the two files. Signed-off-by: Amit Kucheria --- drivers/thermal/qcom/tsens-v0_1.c | 88 +++++++++++++++---------------- 1 file changed, 44 insertions(+), 44 deletions(-) -- 2.17.1 diff --git a/drivers/thermal/qcom/tsens-v0_1.c b/drivers/thermal/qcom/tsens-v0_1.c index d4ad4082c800..30909594b1cf 100644 --- a/drivers/thermal/qcom/tsens-v0_1.c +++ b/drivers/thermal/qcom/tsens-v0_1.c @@ -7,37 +7,37 @@ #include "tsens.h" /* eeprom layout data for 8916 */ -#define BASE0_MASK 0x0000007f -#define BASE1_MASK 0xfe000000 -#define BASE0_SHIFT 0 -#define BASE1_SHIFT 25 - -#define S0_P1_MASK 0x00000f80 -#define S1_P1_MASK 0x003e0000 -#define S2_P1_MASK 0xf8000000 -#define S3_P1_MASK 0x000003e0 -#define S4_P1_MASK 0x000f8000 - -#define S0_P2_MASK 0x0001f000 -#define S1_P2_MASK 0x07c00000 -#define S2_P2_MASK 0x0000001f -#define S3_P2_MASK 0x00007c00 -#define S4_P2_MASK 0x01f00000 - -#define S0_P1_SHIFT 7 -#define S1_P1_SHIFT 17 -#define S2_P1_SHIFT 27 -#define S3_P1_SHIFT 5 -#define S4_P1_SHIFT 15 - -#define S0_P2_SHIFT 12 -#define S1_P2_SHIFT 22 -#define S2_P2_SHIFT 0 -#define S3_P2_SHIFT 10 -#define S4_P2_SHIFT 20 - -#define CAL_SEL_MASK 0xe0000000 -#define CAL_SEL_SHIFT 29 +#define MSM8916_BASE0_MASK 0x0000007f +#define MSM8916_BASE1_MASK 0xfe000000 +#define MSM8916_BASE0_SHIFT 0 +#define MSM8916_BASE1_SHIFT 25 + +#define MSM8916_S0_P1_MASK 0x00000f80 +#define MSM8916_S1_P1_MASK 0x003e0000 +#define MSM8916_S2_P1_MASK 0xf8000000 +#define MSM8916_S3_P1_MASK 0x000003e0 +#define MSM8916_S4_P1_MASK 0x000f8000 + +#define MSM8916_S0_P2_MASK 0x0001f000 +#define MSM8916_S1_P2_MASK 0x07c00000 +#define MSM8916_S2_P2_MASK 0x0000001f +#define MSM8916_S3_P2_MASK 0x00007c00 +#define MSM8916_S4_P2_MASK 0x01f00000 + +#define MSM8916_S0_P1_SHIFT 7 +#define MSM8916_S1_P1_SHIFT 17 +#define MSM8916_S2_P1_SHIFT 27 +#define MSM8916_S3_P1_SHIFT 5 +#define MSM8916_S4_P1_SHIFT 15 + +#define MSM8916_S0_P2_SHIFT 12 +#define MSM8916_S1_P2_SHIFT 22 +#define MSM8916_S2_P2_SHIFT 0 +#define MSM8916_S3_P2_SHIFT 10 +#define MSM8916_S4_P2_SHIFT 20 + +#define MSM8916_CAL_SEL_MASK 0xe0000000 +#define MSM8916_CAL_SEL_SHIFT 29 static int calibrate_8916(struct tsens_priv *priv) { @@ -54,27 +54,27 @@ static int calibrate_8916(struct tsens_priv *priv) if (IS_ERR(qfprom_csel)) return PTR_ERR(qfprom_csel); - mode = (qfprom_csel[0] & CAL_SEL_MASK) >> CAL_SEL_SHIFT; + mode = (qfprom_csel[0] & MSM8916_CAL_SEL_MASK) >> MSM8916_CAL_SEL_SHIFT; dev_dbg(priv->dev, "calibration mode is %d\n", mode); switch (mode) { case TWO_PT_CALIB: - base1 = (qfprom_cdata[1] & BASE1_MASK) >> BASE1_SHIFT; - p2[0] = (qfprom_cdata[0] & S0_P2_MASK) >> S0_P2_SHIFT; - p2[1] = (qfprom_cdata[0] & S1_P2_MASK) >> S1_P2_SHIFT; - p2[2] = (qfprom_cdata[1] & S2_P2_MASK) >> S2_P2_SHIFT; - p2[3] = (qfprom_cdata[1] & S3_P2_MASK) >> S3_P2_SHIFT; - p2[4] = (qfprom_cdata[1] & S4_P2_MASK) >> S4_P2_SHIFT; + base1 = (qfprom_cdata[1] & MSM8916_BASE1_MASK) >> MSM8916_BASE1_SHIFT; + p2[0] = (qfprom_cdata[0] & MSM8916_S0_P2_MASK) >> MSM8916_S0_P2_SHIFT; + p2[1] = (qfprom_cdata[0] & MSM8916_S1_P2_MASK) >> MSM8916_S1_P2_SHIFT; + p2[2] = (qfprom_cdata[1] & MSM8916_S2_P2_MASK) >> MSM8916_S2_P2_SHIFT; + p2[3] = (qfprom_cdata[1] & MSM8916_S3_P2_MASK) >> MSM8916_S3_P2_SHIFT; + p2[4] = (qfprom_cdata[1] & MSM8916_S4_P2_MASK) >> MSM8916_S4_P2_SHIFT; for (i = 0; i < priv->num_sensors; i++) p2[i] = ((base1 + p2[i]) << 3); /* Fall through */ case ONE_PT_CALIB2: - base0 = (qfprom_cdata[0] & BASE0_MASK); - p1[0] = (qfprom_cdata[0] & S0_P1_MASK) >> S0_P1_SHIFT; - p1[1] = (qfprom_cdata[0] & S1_P1_MASK) >> S1_P1_SHIFT; - p1[2] = (qfprom_cdata[0] & S2_P1_MASK) >> S2_P1_SHIFT; - p1[3] = (qfprom_cdata[1] & S3_P1_MASK) >> S3_P1_SHIFT; - p1[4] = (qfprom_cdata[1] & S4_P1_MASK) >> S4_P1_SHIFT; + base0 = (qfprom_cdata[0] & MSM8916_BASE0_MASK); + p1[0] = (qfprom_cdata[0] & MSM8916_S0_P1_MASK) >> MSM8916_S0_P1_SHIFT; + p1[1] = (qfprom_cdata[0] & MSM8916_S1_P1_MASK) >> MSM8916_S1_P1_SHIFT; + p1[2] = (qfprom_cdata[0] & MSM8916_S2_P1_MASK) >> MSM8916_S2_P1_SHIFT; + p1[3] = (qfprom_cdata[1] & MSM8916_S3_P1_MASK) >> MSM8916_S3_P1_SHIFT; + p1[4] = (qfprom_cdata[1] & MSM8916_S4_P1_MASK) >> MSM8916_S4_P1_SHIFT; for (i = 0; i < priv->num_sensors; i++) p1[i] = (((base0) + p1[i]) << 3); break; From patchwork Wed Mar 20 13:17:49 2019 Content-Type: text/plain; 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Merge the files to allow for better code reuse. Signed-off-by: Amit Kucheria --- drivers/thermal/qcom/Makefile | 2 +- drivers/thermal/qcom/tsens-8974.c | 236 ------------------------------ drivers/thermal/qcom/tsens-v0_1.c | 229 +++++++++++++++++++++++++++++ drivers/thermal/qcom/tsens.h | 8 +- 4 files changed, 236 insertions(+), 239 deletions(-) delete mode 100644 drivers/thermal/qcom/tsens-8974.c -- 2.17.1 diff --git a/drivers/thermal/qcom/Makefile b/drivers/thermal/qcom/Makefile index 1f2fafd43dff..7fa3cadce760 100644 --- a/drivers/thermal/qcom/Makefile +++ b/drivers/thermal/qcom/Makefile @@ -1,3 +1,3 @@ obj-$(CONFIG_QCOM_TSENS) += qcom_tsens.o -qcom_tsens-y += tsens.o tsens-common.o tsens-v0_1.o tsens-8974.o tsens-8960.o tsens-v2.o +qcom_tsens-y += tsens.o tsens-common.o tsens-v0_1.o tsens-8960.o tsens-v2.o obj-$(CONFIG_QCOM_SPMI_TEMP_ALARM) += qcom-spmi-temp-alarm.o diff --git a/drivers/thermal/qcom/tsens-8974.c b/drivers/thermal/qcom/tsens-8974.c deleted file mode 100644 index 303157fd00be..000000000000 --- a/drivers/thermal/qcom/tsens-8974.c +++ /dev/null @@ -1,236 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Copyright (c) 2015, The Linux Foundation. All rights reserved. - */ - -#include -#include "tsens.h" - -/* eeprom layout data for 8974 */ -#define BASE1_MASK 0xff -#define S0_P1_MASK 0x3f00 -#define S1_P1_MASK 0xfc000 -#define S2_P1_MASK 0x3f00000 -#define S3_P1_MASK 0xfc000000 -#define S4_P1_MASK 0x3f -#define S5_P1_MASK 0xfc0 -#define S6_P1_MASK 0x3f000 -#define S7_P1_MASK 0xfc0000 -#define S8_P1_MASK 0x3f000000 -#define S8_P1_MASK_BKP 0x3f -#define S9_P1_MASK 0x3f -#define S9_P1_MASK_BKP 0xfc0 -#define S10_P1_MASK 0xfc0 -#define S10_P1_MASK_BKP 0x3f000 -#define CAL_SEL_0_1 0xc0000000 -#define CAL_SEL_2 0x40000000 -#define CAL_SEL_SHIFT 30 -#define CAL_SEL_SHIFT_2 28 - -#define S0_P1_SHIFT 8 -#define S1_P1_SHIFT 14 -#define S2_P1_SHIFT 20 -#define S3_P1_SHIFT 26 -#define S5_P1_SHIFT 6 -#define S6_P1_SHIFT 12 -#define S7_P1_SHIFT 18 -#define S8_P1_SHIFT 24 -#define S9_P1_BKP_SHIFT 6 -#define S10_P1_SHIFT 6 -#define S10_P1_BKP_SHIFT 12 - -#define BASE2_SHIFT 12 -#define BASE2_BKP_SHIFT 18 -#define S0_P2_SHIFT 20 -#define S0_P2_BKP_SHIFT 26 -#define S1_P2_SHIFT 26 -#define S2_P2_BKP_SHIFT 6 -#define S3_P2_SHIFT 6 -#define S3_P2_BKP_SHIFT 12 -#define S4_P2_SHIFT 12 -#define S4_P2_BKP_SHIFT 18 -#define S5_P2_SHIFT 18 -#define S5_P2_BKP_SHIFT 24 -#define S6_P2_SHIFT 24 -#define S7_P2_BKP_SHIFT 6 -#define S8_P2_SHIFT 6 -#define S8_P2_BKP_SHIFT 12 -#define S9_P2_SHIFT 12 -#define S9_P2_BKP_SHIFT 18 -#define S10_P2_SHIFT 18 -#define S10_P2_BKP_SHIFT 24 - -#define BASE2_MASK 0xff000 -#define BASE2_BKP_MASK 0xfc0000 -#define S0_P2_MASK 0x3f00000 -#define S0_P2_BKP_MASK 0xfc000000 -#define S1_P2_MASK 0xfc000000 -#define S1_P2_BKP_MASK 0x3f -#define S2_P2_MASK 0x3f -#define S2_P2_BKP_MASK 0xfc0 -#define S3_P2_MASK 0xfc0 -#define S3_P2_BKP_MASK 0x3f000 -#define S4_P2_MASK 0x3f000 -#define S4_P2_BKP_MASK 0xfc0000 -#define S5_P2_MASK 0xfc0000 -#define S5_P2_BKP_MASK 0x3f000000 -#define S6_P2_MASK 0x3f000000 -#define S6_P2_BKP_MASK 0x3f -#define S7_P2_MASK 0x3f -#define S7_P2_BKP_MASK 0xfc0 -#define S8_P2_MASK 0xfc0 -#define S8_P2_BKP_MASK 0x3f000 -#define S9_P2_MASK 0x3f000 -#define S9_P2_BKP_MASK 0xfc0000 -#define S10_P2_MASK 0xfc0000 -#define S10_P2_BKP_MASK 0x3f000000 - -#define BKP_SEL 0x3 -#define BKP_REDUN_SEL 0xe0000000 -#define BKP_REDUN_SHIFT 29 - -#define BIT_APPEND 0x3 - -static int calibrate_8974(struct tsens_priv *priv) -{ - int base1 = 0, base2 = 0, i; - u32 p1[11], p2[11]; - int mode = 0; - u32 *calib, *bkp; - u32 calib_redun_sel; - - calib = (u32 *)qfprom_read(priv->dev, "calib"); - if (IS_ERR(calib)) - return PTR_ERR(calib); - - bkp = (u32 *)qfprom_read(priv->dev, "calib_backup"); - if (IS_ERR(bkp)) - return PTR_ERR(bkp); - - calib_redun_sel = bkp[1] & BKP_REDUN_SEL; - calib_redun_sel >>= BKP_REDUN_SHIFT; - - if (calib_redun_sel == BKP_SEL) { - mode = (calib[4] & CAL_SEL_0_1) >> CAL_SEL_SHIFT; - mode |= (calib[5] & CAL_SEL_2) >> CAL_SEL_SHIFT_2; - - switch (mode) { - case TWO_PT_CALIB: - base2 = (bkp[2] & BASE2_BKP_MASK) >> BASE2_BKP_SHIFT; - p2[0] = (bkp[2] & S0_P2_BKP_MASK) >> S0_P2_BKP_SHIFT; - p2[1] = (bkp[3] & S1_P2_BKP_MASK); - p2[2] = (bkp[3] & S2_P2_BKP_MASK) >> S2_P2_BKP_SHIFT; - p2[3] = (bkp[3] & S3_P2_BKP_MASK) >> S3_P2_BKP_SHIFT; - p2[4] = (bkp[3] & S4_P2_BKP_MASK) >> S4_P2_BKP_SHIFT; - p2[5] = (calib[4] & S5_P2_BKP_MASK) >> S5_P2_BKP_SHIFT; - p2[6] = (calib[5] & S6_P2_BKP_MASK); - p2[7] = (calib[5] & S7_P2_BKP_MASK) >> S7_P2_BKP_SHIFT; - p2[8] = (calib[5] & S8_P2_BKP_MASK) >> S8_P2_BKP_SHIFT; - p2[9] = (calib[5] & S9_P2_BKP_MASK) >> S9_P2_BKP_SHIFT; - p2[10] = (calib[5] & S10_P2_BKP_MASK) >> S10_P2_BKP_SHIFT; - /* Fall through */ - case ONE_PT_CALIB: - case ONE_PT_CALIB2: - base1 = bkp[0] & BASE1_MASK; - p1[0] = (bkp[0] & S0_P1_MASK) >> S0_P1_SHIFT; - p1[1] = (bkp[0] & S1_P1_MASK) >> S1_P1_SHIFT; - p1[2] = (bkp[0] & S2_P1_MASK) >> S2_P1_SHIFT; - p1[3] = (bkp[0] & S3_P1_MASK) >> S3_P1_SHIFT; - p1[4] = (bkp[1] & S4_P1_MASK); - p1[5] = (bkp[1] & S5_P1_MASK) >> S5_P1_SHIFT; - p1[6] = (bkp[1] & S6_P1_MASK) >> S6_P1_SHIFT; - p1[7] = (bkp[1] & S7_P1_MASK) >> S7_P1_SHIFT; - p1[8] = (bkp[2] & S8_P1_MASK_BKP) >> S8_P1_SHIFT; - p1[9] = (bkp[2] & S9_P1_MASK_BKP) >> S9_P1_BKP_SHIFT; - p1[10] = (bkp[2] & S10_P1_MASK_BKP) >> S10_P1_BKP_SHIFT; - break; - } - } else { - mode = (calib[1] & CAL_SEL_0_1) >> CAL_SEL_SHIFT; - mode |= (calib[3] & CAL_SEL_2) >> CAL_SEL_SHIFT_2; - - switch (mode) { - case TWO_PT_CALIB: - base2 = (calib[2] & BASE2_MASK) >> BASE2_SHIFT; - p2[0] = (calib[2] & S0_P2_MASK) >> S0_P2_SHIFT; - p2[1] = (calib[2] & S1_P2_MASK) >> S1_P2_SHIFT; - p2[2] = (calib[3] & S2_P2_MASK); - p2[3] = (calib[3] & S3_P2_MASK) >> S3_P2_SHIFT; - p2[4] = (calib[3] & S4_P2_MASK) >> S4_P2_SHIFT; - p2[5] = (calib[3] & S5_P2_MASK) >> S5_P2_SHIFT; - p2[6] = (calib[3] & S6_P2_MASK) >> S6_P2_SHIFT; - p2[7] = (calib[4] & S7_P2_MASK); - p2[8] = (calib[4] & S8_P2_MASK) >> S8_P2_SHIFT; - p2[9] = (calib[4] & S9_P2_MASK) >> S9_P2_SHIFT; - p2[10] = (calib[4] & S10_P2_MASK) >> S10_P2_SHIFT; - /* Fall through */ - case ONE_PT_CALIB: - case ONE_PT_CALIB2: - base1 = calib[0] & BASE1_MASK; - p1[0] = (calib[0] & S0_P1_MASK) >> S0_P1_SHIFT; - p1[1] = (calib[0] & S1_P1_MASK) >> S1_P1_SHIFT; - p1[2] = (calib[0] & S2_P1_MASK) >> S2_P1_SHIFT; - p1[3] = (calib[0] & S3_P1_MASK) >> S3_P1_SHIFT; - p1[4] = (calib[1] & S4_P1_MASK); - p1[5] = (calib[1] & S5_P1_MASK) >> S5_P1_SHIFT; - p1[6] = (calib[1] & S6_P1_MASK) >> S6_P1_SHIFT; - p1[7] = (calib[1] & S7_P1_MASK) >> S7_P1_SHIFT; - p1[8] = (calib[1] & S8_P1_MASK) >> S8_P1_SHIFT; - p1[9] = (calib[2] & S9_P1_MASK); - p1[10] = (calib[2] & S10_P1_MASK) >> S10_P1_SHIFT; - break; - } - } - - switch (mode) { - case ONE_PT_CALIB: - for (i = 0; i < priv->num_sensors; i++) - p1[i] += (base1 << 2) | BIT_APPEND; - break; - case TWO_PT_CALIB: - for (i = 0; i < priv->num_sensors; i++) { - p2[i] += base2; - p2[i] <<= 2; - p2[i] |= BIT_APPEND; - } - /* Fall through */ - case ONE_PT_CALIB2: - for (i = 0; i < priv->num_sensors; i++) { - p1[i] += base1; - p1[i] <<= 2; - p1[i] |= BIT_APPEND; - } - break; - default: - for (i = 0; i < priv->num_sensors; i++) - p2[i] = 780; - p1[0] = 502; - p1[1] = 509; - p1[2] = 503; - p1[3] = 509; - p1[4] = 505; - p1[5] = 509; - p1[6] = 507; - p1[7] = 510; - p1[8] = 508; - p1[9] = 509; - p1[10] = 508; - break; - } - - compute_intercept_slope(priv, p1, p2, mode); - - return 0; -} - -static const struct tsens_ops ops_8974 = { - .init = init_common, - .calibrate = calibrate_8974, - .get_temp = get_temp_common, -}; - -const struct tsens_plat_data data_8974 = { - .num_sensors = 11, - .ops = &ops_8974, - .reg_offsets = { [SROT_CTRL_OFFSET] = 0x0 }, -}; diff --git a/drivers/thermal/qcom/tsens-v0_1.c b/drivers/thermal/qcom/tsens-v0_1.c index 30909594b1cf..a6e26be1234f 100644 --- a/drivers/thermal/qcom/tsens-v0_1.c +++ b/drivers/thermal/qcom/tsens-v0_1.c @@ -39,6 +39,91 @@ #define MSM8916_CAL_SEL_MASK 0xe0000000 #define MSM8916_CAL_SEL_SHIFT 29 +/* eeprom layout data for 8974 */ +#define BASE1_MASK 0xff +#define S0_P1_MASK 0x3f00 +#define S1_P1_MASK 0xfc000 +#define S2_P1_MASK 0x3f00000 +#define S3_P1_MASK 0xfc000000 +#define S4_P1_MASK 0x3f +#define S5_P1_MASK 0xfc0 +#define S6_P1_MASK 0x3f000 +#define S7_P1_MASK 0xfc0000 +#define S8_P1_MASK 0x3f000000 +#define S8_P1_MASK_BKP 0x3f +#define S9_P1_MASK 0x3f +#define S9_P1_MASK_BKP 0xfc0 +#define S10_P1_MASK 0xfc0 +#define S10_P1_MASK_BKP 0x3f000 +#define CAL_SEL_0_1 0xc0000000 +#define CAL_SEL_2 0x40000000 +#define CAL_SEL_SHIFT 30 +#define CAL_SEL_SHIFT_2 28 + +#define S0_P1_SHIFT 8 +#define S1_P1_SHIFT 14 +#define S2_P1_SHIFT 20 +#define S3_P1_SHIFT 26 +#define S5_P1_SHIFT 6 +#define S6_P1_SHIFT 12 +#define S7_P1_SHIFT 18 +#define S8_P1_SHIFT 24 +#define S9_P1_BKP_SHIFT 6 +#define S10_P1_SHIFT 6 +#define S10_P1_BKP_SHIFT 12 + +#define BASE2_SHIFT 12 +#define BASE2_BKP_SHIFT 18 +#define S0_P2_SHIFT 20 +#define S0_P2_BKP_SHIFT 26 +#define S1_P2_SHIFT 26 +#define S2_P2_BKP_SHIFT 6 +#define S3_P2_SHIFT 6 +#define S3_P2_BKP_SHIFT 12 +#define S4_P2_SHIFT 12 +#define S4_P2_BKP_SHIFT 18 +#define S5_P2_SHIFT 18 +#define S5_P2_BKP_SHIFT 24 +#define S6_P2_SHIFT 24 +#define S7_P2_BKP_SHIFT 6 +#define S8_P2_SHIFT 6 +#define S8_P2_BKP_SHIFT 12 +#define S9_P2_SHIFT 12 +#define S9_P2_BKP_SHIFT 18 +#define S10_P2_SHIFT 18 +#define S10_P2_BKP_SHIFT 24 + +#define BASE2_MASK 0xff000 +#define BASE2_BKP_MASK 0xfc0000 +#define S0_P2_MASK 0x3f00000 +#define S0_P2_BKP_MASK 0xfc000000 +#define S1_P2_MASK 0xfc000000 +#define S1_P2_BKP_MASK 0x3f +#define S2_P2_MASK 0x3f +#define S2_P2_BKP_MASK 0xfc0 +#define S3_P2_MASK 0xfc0 +#define S3_P2_BKP_MASK 0x3f000 +#define S4_P2_MASK 0x3f000 +#define S4_P2_BKP_MASK 0xfc0000 +#define S5_P2_MASK 0xfc0000 +#define S5_P2_BKP_MASK 0x3f000000 +#define S6_P2_MASK 0x3f000000 +#define S6_P2_BKP_MASK 0x3f +#define S7_P2_MASK 0x3f +#define S7_P2_BKP_MASK 0xfc0 +#define S8_P2_MASK 0xfc0 +#define S8_P2_BKP_MASK 0x3f000 +#define S9_P2_MASK 0x3f000 +#define S9_P2_BKP_MASK 0xfc0000 +#define S10_P2_MASK 0xfc0000 +#define S10_P2_BKP_MASK 0x3f000000 + +#define BKP_SEL 0x3 +#define BKP_REDUN_SEL 0xe0000000 +#define BKP_REDUN_SHIFT 29 + +#define BIT_APPEND 0x3 + static int calibrate_8916(struct tsens_priv *priv) { int base0 = 0, base1 = 0, i; @@ -91,6 +176,138 @@ static int calibrate_8916(struct tsens_priv *priv) return 0; } +static int calibrate_8974(struct tsens_priv *priv) +{ + int base1 = 0, base2 = 0, i; + u32 p1[11], p2[11]; + int mode = 0; + u32 *calib, *bkp; + u32 calib_redun_sel; + + calib = (u32 *)qfprom_read(priv->dev, "calib"); + if (IS_ERR(calib)) + return PTR_ERR(calib); + + bkp = (u32 *)qfprom_read(priv->dev, "calib_backup"); + if (IS_ERR(bkp)) + return PTR_ERR(bkp); + + calib_redun_sel = bkp[1] & BKP_REDUN_SEL; + calib_redun_sel >>= BKP_REDUN_SHIFT; + + if (calib_redun_sel == BKP_SEL) { + mode = (calib[4] & CAL_SEL_0_1) >> CAL_SEL_SHIFT; + mode |= (calib[5] & CAL_SEL_2) >> CAL_SEL_SHIFT_2; + + switch (mode) { + case TWO_PT_CALIB: + base2 = (bkp[2] & BASE2_BKP_MASK) >> BASE2_BKP_SHIFT; + p2[0] = (bkp[2] & S0_P2_BKP_MASK) >> S0_P2_BKP_SHIFT; + p2[1] = (bkp[3] & S1_P2_BKP_MASK); + p2[2] = (bkp[3] & S2_P2_BKP_MASK) >> S2_P2_BKP_SHIFT; + p2[3] = (bkp[3] & S3_P2_BKP_MASK) >> S3_P2_BKP_SHIFT; + p2[4] = (bkp[3] & S4_P2_BKP_MASK) >> S4_P2_BKP_SHIFT; + p2[5] = (calib[4] & S5_P2_BKP_MASK) >> S5_P2_BKP_SHIFT; + p2[6] = (calib[5] & S6_P2_BKP_MASK); + p2[7] = (calib[5] & S7_P2_BKP_MASK) >> S7_P2_BKP_SHIFT; + p2[8] = (calib[5] & S8_P2_BKP_MASK) >> S8_P2_BKP_SHIFT; + p2[9] = (calib[5] & S9_P2_BKP_MASK) >> S9_P2_BKP_SHIFT; + p2[10] = (calib[5] & S10_P2_BKP_MASK) >> S10_P2_BKP_SHIFT; + /* Fall through */ + case ONE_PT_CALIB: + case ONE_PT_CALIB2: + base1 = bkp[0] & BASE1_MASK; + p1[0] = (bkp[0] & S0_P1_MASK) >> S0_P1_SHIFT; + p1[1] = (bkp[0] & S1_P1_MASK) >> S1_P1_SHIFT; + p1[2] = (bkp[0] & S2_P1_MASK) >> S2_P1_SHIFT; + p1[3] = (bkp[0] & S3_P1_MASK) >> S3_P1_SHIFT; + p1[4] = (bkp[1] & S4_P1_MASK); + p1[5] = (bkp[1] & S5_P1_MASK) >> S5_P1_SHIFT; + p1[6] = (bkp[1] & S6_P1_MASK) >> S6_P1_SHIFT; + p1[7] = (bkp[1] & S7_P1_MASK) >> S7_P1_SHIFT; + p1[8] = (bkp[2] & S8_P1_MASK_BKP) >> S8_P1_SHIFT; + p1[9] = (bkp[2] & S9_P1_MASK_BKP) >> S9_P1_BKP_SHIFT; + p1[10] = (bkp[2] & S10_P1_MASK_BKP) >> S10_P1_BKP_SHIFT; + break; + } + } else { + mode = (calib[1] & CAL_SEL_0_1) >> CAL_SEL_SHIFT; + mode |= (calib[3] & CAL_SEL_2) >> CAL_SEL_SHIFT_2; + + switch (mode) { + case TWO_PT_CALIB: + base2 = (calib[2] & BASE2_MASK) >> BASE2_SHIFT; + p2[0] = (calib[2] & S0_P2_MASK) >> S0_P2_SHIFT; + p2[1] = (calib[2] & S1_P2_MASK) >> S1_P2_SHIFT; + p2[2] = (calib[3] & S2_P2_MASK); + p2[3] = (calib[3] & S3_P2_MASK) >> S3_P2_SHIFT; + p2[4] = (calib[3] & S4_P2_MASK) >> S4_P2_SHIFT; + p2[5] = (calib[3] & S5_P2_MASK) >> S5_P2_SHIFT; + p2[6] = (calib[3] & S6_P2_MASK) >> S6_P2_SHIFT; + p2[7] = (calib[4] & S7_P2_MASK); + p2[8] = (calib[4] & S8_P2_MASK) >> S8_P2_SHIFT; + p2[9] = (calib[4] & S9_P2_MASK) >> S9_P2_SHIFT; + p2[10] = (calib[4] & S10_P2_MASK) >> S10_P2_SHIFT; + /* Fall through */ + case ONE_PT_CALIB: + case ONE_PT_CALIB2: + base1 = calib[0] & BASE1_MASK; + p1[0] = (calib[0] & S0_P1_MASK) >> S0_P1_SHIFT; + p1[1] = (calib[0] & S1_P1_MASK) >> S1_P1_SHIFT; + p1[2] = (calib[0] & S2_P1_MASK) >> S2_P1_SHIFT; + p1[3] = (calib[0] & S3_P1_MASK) >> S3_P1_SHIFT; + p1[4] = (calib[1] & S4_P1_MASK); + p1[5] = (calib[1] & S5_P1_MASK) >> S5_P1_SHIFT; + p1[6] = (calib[1] & S6_P1_MASK) >> S6_P1_SHIFT; + p1[7] = (calib[1] & S7_P1_MASK) >> S7_P1_SHIFT; + p1[8] = (calib[1] & S8_P1_MASK) >> S8_P1_SHIFT; + p1[9] = (calib[2] & S9_P1_MASK); + p1[10] = (calib[2] & S10_P1_MASK) >> S10_P1_SHIFT; + break; + } + } + + switch (mode) { + case ONE_PT_CALIB: + for (i = 0; i < priv->num_sensors; i++) + p1[i] += (base1 << 2) | BIT_APPEND; + break; + case TWO_PT_CALIB: + for (i = 0; i < priv->num_sensors; i++) { + p2[i] += base2; + p2[i] <<= 2; + p2[i] |= BIT_APPEND; + } + /* Fall through */ + case ONE_PT_CALIB2: + for (i = 0; i < priv->num_sensors; i++) { + p1[i] += base1; + p1[i] <<= 2; + p1[i] |= BIT_APPEND; + } + break; + default: + for (i = 0; i < priv->num_sensors; i++) + p2[i] = 780; + p1[0] = 502; + p1[1] = 509; + p1[2] = 503; + p1[3] = 509; + p1[4] = 505; + p1[5] = 509; + p1[6] = 507; + p1[7] = 510; + p1[8] = 508; + p1[9] = 509; + p1[10] = 508; + break; + } + + compute_intercept_slope(priv, p1, p2, mode); + + return 0; +} + static const struct tsens_ops ops_8916 = { .init = init_common, .calibrate = calibrate_8916, @@ -103,3 +320,15 @@ const struct tsens_plat_data data_8916 = { .reg_offsets = { [SROT_CTRL_OFFSET] = 0x0 }, .hw_ids = (unsigned int []){0, 1, 2, 4, 5 }, }; + +static const struct tsens_ops ops_8974 = { + .init = init_common, + .calibrate = calibrate_8974, + .get_temp = get_temp_common, +}; + +const struct tsens_plat_data data_8974 = { + .num_sensors = 11, + .ops = &ops_8974, + .reg_offsets = { [SROT_CTRL_OFFSET] = 0x0 }, +}; diff --git a/drivers/thermal/qcom/tsens.h b/drivers/thermal/qcom/tsens.h index 4d6a406f8dca..27b8f74829d9 100644 --- a/drivers/thermal/qcom/tsens.h +++ b/drivers/thermal/qcom/tsens.h @@ -116,8 +116,12 @@ void compute_intercept_slope(struct tsens_priv *priv, u32 *pt1, u32 *pt2, u32 mo int init_common(struct tsens_priv *priv); int get_temp_common(struct tsens_priv *priv, int i, int *temp); -/* TSENS v1 targets */ -extern const struct tsens_plat_data data_8916, data_8974, data_8960; +/* TSENS target */ +extern const struct tsens_plat_data data_8960; + +/* TSENS v0.1 targets */ +extern const struct tsens_plat_data data_8916, data_8974; + /* TSENS v2 targets */ extern const struct tsens_plat_data data_8996, data_tsens_v2; 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[209.132.180.67]) by mx.google.com with ESMTP id f6si1844237plr.411.2019.03.20.06.19.12; Wed, 20 Mar 2019 06:19:12 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=uvKqXscz; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728222AbfCTNTK (ORCPT + 15 others); Wed, 20 Mar 2019 09:19:10 -0400 Received: from mail-pf1-f196.google.com ([209.85.210.196]:34546 "EHLO mail-pf1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728220AbfCTNTJ (ORCPT ); Wed, 20 Mar 2019 09:19:09 -0400 Received: by mail-pf1-f196.google.com with SMTP id v64so1938966pfb.1 for ; Wed, 20 Mar 2019 06:19:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=000Nxomj5cH53K32Cb+mEu91Zlm2VgiYrpJwNJqpAWg=; b=uvKqXsczGmwSKkjXFbEqWfPy1F7V2ws5ViC7A+wQQq2gWM+t3K+t97n7EQcb9bYNUQ Zu7VgcS7+JdUOb8I7fQvpCqt3j7Q61pxu5AZQq27WxzKRl1UzMLnTcnBmk+lGw+qkYMV iqpzq/2vW7KNLDAv6VU+UVsl+hWcHBs8ygkQx3VY3EjpCEqw//6aNmgFlA2X1MNz7+Lj kS2Yzby5MIdfNXOBce59wKeglAJUeUdTJhxx4ZJjILJi3u621l9ncGDUFiIyykfcpgEQ XDpve7MI3m4ueEbQwqNErtItTrI1bjPbAAbhKpsBSRBzNxaIWRICnzkZ7WAaHRhOYDuw R53w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=000Nxomj5cH53K32Cb+mEu91Zlm2VgiYrpJwNJqpAWg=; b=jUAgL72i4wKIGNmhI921tJEHm74ZJyzXfF1lyZW7uqUrjKScswI+zQSSk/jFolU6li qXJ0UK4/CAo+JgjFYtZNeWodUitHyEQS+SSjDx3UaWQjFq8qbNFe3HJ0ixGi1I86DfRK HAH2TM+q/SXdSP50OnRRp+wirkCphFI2JdcwCwUvkVbb8OJ1kbKGUynMVj8+dseTavVw TbZkb9fLDW5NQcUceOAx03Gzl9HSIQdnKBJcM27G2zVkFB3KCsSACcD/NcZVtNe1FFHE W6Hj+9ZmNrD7g2EuuzCRV18WpuYAbeQLFdyJ/r1JypyeVmj5y7PZOaIDxrSSiYJsW2sN dgqg== X-Gm-Message-State: APjAAAVnZlQ7cHkKwCBgZUewucob5PzLBjntpY1u/TrT1uM7xF/Y+lje 0XFAs8Jk5r8IAgzVe5ay9gxt8A== X-Received: by 2002:a63:c84c:: with SMTP id l12mr7396138pgi.287.1553087948548; Wed, 20 Mar 2019 06:19:08 -0700 (PDT) Received: from localhost ([114.143.122.221]) by smtp.gmail.com with ESMTPSA id m13sm4739305pff.175.2019.03.20.06.19.07 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 20 Mar 2019 06:19:07 -0700 (PDT) From: Amit Kucheria To: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, edubezval@gmail.com, andy.gross@linaro.org, Daniel Lezcano , David Brown , Zhang Rui Cc: linux-pm@vger.kernel.org Subject: [PATCHv3 10/23] drivers: thermal: tsens: Introduce reg_fields to deal with register description Date: Wed, 20 Mar 2019 18:47:50 +0530 Message-Id: <008c9fa480dbeaf512ecccfbbc117176d570ded6.1553086065.git.amit.kucheria@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org As we add support for newer versions of the TSENS IP, the current approach isn't scaling because registers and bitfields get moved around, requiring platform-specific hacks in the code. By moving to regmap, we can hide the register level differences away from the code. Define a common set of registers and bit-fields that we care about across the various tsens IP versions. Signed-off-by: Amit Kucheria --- drivers/thermal/qcom/tsens-common.c | 62 +++++---- drivers/thermal/qcom/tsens-v0_1.c | 50 ++++++- drivers/thermal/qcom/tsens-v2.c | 105 ++++++++++---- drivers/thermal/qcom/tsens.c | 5 +- drivers/thermal/qcom/tsens.h | 206 +++++++++++++++++++++++++++- 5 files changed, 370 insertions(+), 58 deletions(-) -- 2.17.1 diff --git a/drivers/thermal/qcom/tsens-common.c b/drivers/thermal/qcom/tsens-common.c index f0ef4e3cf7f9..0f9deec2517a 100644 --- a/drivers/thermal/qcom/tsens-common.c +++ b/drivers/thermal/qcom/tsens-common.c @@ -12,13 +12,6 @@ #include #include "tsens.h" -/* SROT */ -#define TSENS_EN BIT(0) - -/* TM */ -#define STATUS_OFFSET 0x30 -#define SN_ADDR_OFFSET 0x4 -#define SN_ST_TEMP_MASK 0x3ff #define CAL_DEGC_PT1 30 #define CAL_DEGC_PT2 120 #define SLOPE_FACTOR 1000 @@ -95,18 +88,14 @@ static inline int code_to_degc(u32 adc_code, const struct tsens_sensor *s) return degc; } -int get_temp_common(struct tsens_priv *priv, int id, int *temp) +int get_temp_common(struct tsens_priv *priv, int i, int *temp) { - struct tsens_sensor *s = &priv->sensor[id]; - u32 code; - unsigned int status_reg; + struct tsens_sensor *s = &priv->sensor[i]; int last_temp = 0, ret; - status_reg = priv->tm_offset + STATUS_OFFSET + s->hw_id * SN_ADDR_OFFSET; - ret = regmap_read(priv->tm_map, status_reg, &code); + ret = regmap_field_read(priv->rf[LAST_TEMP_0 + s->hw_id], &last_temp); if (ret) return ret; - last_temp = code & SN_ST_TEMP_MASK; *temp = code_to_degc(last_temp, s) * 1000; @@ -131,10 +120,9 @@ int __init init_common(struct tsens_priv *priv) { void __iomem *tm_base, *srot_base; struct resource *res; - u32 code; - int ret; + u32 enabled; + int ret, i, j; struct platform_device *op = of_find_device_by_node(priv->dev->of_node); - u16 ctrl_offset = priv->reg_offsets[SROT_CTRL_OFFSET]; if (!op) return -EINVAL; @@ -173,13 +161,41 @@ int __init init_common(struct tsens_priv *priv) goto err_put_device; } - if (priv->srot_map) { - ret = regmap_read(priv->srot_map, ctrl_offset, &code); - if (ret) + priv->rf[TSENS_EN] = devm_regmap_field_alloc(priv->dev, priv->srot_map, + priv->fields[TSENS_EN]); + if (IS_ERR(priv->rf[TSENS_EN])) { + ret = PTR_ERR(priv->rf[TSENS_EN]); + goto err_put_device; + } + ret = regmap_field_read(priv->rf[TSENS_EN], &enabled); + if (ret) + goto err_put_device; + if (!enabled) { + dev_err(priv->dev, "tsens device is not enabled\n"); + ret = -ENODEV; + goto err_put_device; + } + + priv->rf[SENSOR_EN] = devm_regmap_field_alloc(priv->dev, priv->srot_map, + priv->fields[SENSOR_EN]); + if (IS_ERR(priv->rf[SENSOR_EN])) { + ret = PTR_ERR(priv->rf[SENSOR_EN]); + goto err_put_device; + } + /* now alloc regmap_fields in tm_map */ + for (i = 0, j = LAST_TEMP_0; i < priv->num_sensors; i++, j++) { + priv->rf[j] = devm_regmap_field_alloc(priv->dev, priv->tm_map, + priv->fields[j]); + if (IS_ERR(priv->rf[j])) { + ret = PTR_ERR(priv->rf[j]); goto err_put_device; - if (!(code & TSENS_EN)) { - dev_err(priv->dev, "tsens device is not enabled\n"); - ret = -ENODEV; + } + } + for (i = 0, j = VALID_0; i < priv->num_sensors; i++, j++) { + priv->rf[j] = devm_regmap_field_alloc(priv->dev, priv->tm_map, + priv->fields[j]); + if (IS_ERR(priv->rf[j])) { + ret = PTR_ERR(priv->rf[j]); goto err_put_device; } } diff --git a/drivers/thermal/qcom/tsens-v0_1.c b/drivers/thermal/qcom/tsens-v0_1.c index a6e26be1234f..d171a4a8c454 100644 --- a/drivers/thermal/qcom/tsens-v0_1.c +++ b/drivers/thermal/qcom/tsens-v0_1.c @@ -6,6 +6,15 @@ #include #include "tsens.h" +/* ----- SROT ------ */ +#define SROT_CTRL_OFF 0x0000 + +/* ----- TM ------ */ +#define TM_INT_EN_OFF 0x0000 +#define TM_Sn_UPPER_LOWER_STATUS_CTRL_OFF 0x0004 +#define TM_Sn_STATUS_OFF 0x0030 +#define TM_TRDY_OFF 0x005c + /* eeprom layout data for 8916 */ #define MSM8916_BASE0_MASK 0x0000007f #define MSM8916_BASE1_MASK 0xfe000000 @@ -308,6 +317,40 @@ static int calibrate_8974(struct tsens_priv *priv) return 0; } +/* v0.1: 8916, 8974 */ + +const struct tsens_features tsens_v0_1_feat = { + .ver_major = VER_0_1, + .crit_int = 0, + .adc = 1, + .srot_split = 1, +}; + +const struct reg_field tsens_v0_1_regfields[MAX_REGFIELDS] = { + /* ----- SROT ------ */ + /* No VERSION information */ + + /* CTRL_OFFSET */ + [TSENS_EN] = REG_FIELD(SROT_CTRL_OFF, 0, 0), + [TSENS_SW_RST] = REG_FIELD(SROT_CTRL_OFF, 1, 1), + + /* ----- TM ------ */ + /* INTERRUPT ENABLE */ + [INT_EN] = REG_FIELD(TM_INT_EN_OFF, 0, 0), + + /* Sn_STATUS */ + REG_FIELD_FOR_EACH_SENSOR11(LAST_TEMP, TM_Sn_STATUS_OFF, 0, 9), + /* No VALID field on v0.1 */ + REG_FIELD_FOR_EACH_SENSOR11(MIN_STATUS, TM_Sn_STATUS_OFF, 10, 10), + REG_FIELD_FOR_EACH_SENSOR11(LOWER_STATUS, TM_Sn_STATUS_OFF, 11, 11), + REG_FIELD_FOR_EACH_SENSOR11(UPPER_STATUS, TM_Sn_STATUS_OFF, 12, 12), + /* No CRITICAL field on v0.1 */ + REG_FIELD_FOR_EACH_SENSOR11(MAX_STATUS, TM_Sn_STATUS_OFF, 13, 13), + + /* TRDY: 1=ready, 0=in progress */ + [TRDY] = REG_FIELD(TM_TRDY_OFF, 0, 0), +}; + static const struct tsens_ops ops_8916 = { .init = init_common, .calibrate = calibrate_8916, @@ -317,8 +360,10 @@ static const struct tsens_ops ops_8916 = { const struct tsens_plat_data data_8916 = { .num_sensors = 5, .ops = &ops_8916, - .reg_offsets = { [SROT_CTRL_OFFSET] = 0x0 }, .hw_ids = (unsigned int []){0, 1, 2, 4, 5 }, + + .feat = &tsens_v0_1_feat, + .fields = tsens_v0_1_regfields, }; static const struct tsens_ops ops_8974 = { @@ -330,5 +375,6 @@ static const struct tsens_ops ops_8974 = { const struct tsens_plat_data data_8974 = { .num_sensors = 11, .ops = &ops_8974, - .reg_offsets = { [SROT_CTRL_OFFSET] = 0x0 }, + .feat = &tsens_v0_1_feat, + .fields = tsens_v0_1_regfields, }; diff --git a/drivers/thermal/qcom/tsens-v2.c b/drivers/thermal/qcom/tsens-v2.c index 8b700772d903..e15a302f7878 100644 --- a/drivers/thermal/qcom/tsens-v2.c +++ b/drivers/thermal/qcom/tsens-v2.c @@ -4,50 +4,70 @@ * Copyright (c) 2018, Linaro Limited */ -#include #include +#include #include "tsens.h" -#define STATUS_OFFSET 0xa0 +/* ----- SROT ------ */ +#define SROT_HW_VER_OFF 0x0000 +#define SROT_CTRL_OFF 0x0004 + +/* ----- TM ------ */ +#define TM_INT_EN_OFF 0x0004 +#define TM_UPPER_LOWER_INT_STATUS_OFF 0x0008 +#define TM_UPPER_LOWER_INT_CLEAR_OFF 0x000c +#define TM_UPPER_LOWER_INT_MASK_OFF 0x0010 +#define TM_CRITICAL_INT_STATUS_OFF 0x0014 +#define TM_CRITICAL_INT_CLEAR_OFF 0x0018 +#define TM_CRITICAL_INT_MASK_OFF 0x001c +#define TM_Sn_UPPER_LOWER_THRESHOLD_OFF 0x0020 +#define TM_Sn_CRITICAL_THRESHOLD_OFF 0x0060 +#define TM_Sn_STATUS_OFF 0x00a0 +#define TM_TRDY_OFF 0x00e4 + #define LAST_TEMP_MASK 0xfff -#define STATUS_VALID_BIT BIT(21) static int get_temp_tsens_v2(struct tsens_priv *priv, int id, int *temp) { struct tsens_sensor *s = &priv->sensor[id]; - u32 code; - unsigned int status_reg; - u32 last_temp = 0, last_temp2 = 0, last_temp3 = 0; + u32 temp_idx = LAST_TEMP_0 + s->hw_id; + u32 valid_idx = VALID_0 + s->hw_id; + u32 last_temp = 0, last_temp2 = 0, last_temp3 = 0, valid; int ret; - status_reg = priv->tm_offset + STATUS_OFFSET + s->hw_id * 4; - ret = regmap_read(priv->tm_map, status_reg, &code); + ret = regmap_field_read(priv->rf[temp_idx], &last_temp); + if (ret) + return ret; + + ret = regmap_field_read(priv->rf[valid_idx], &valid); if (ret) return ret; - last_temp = code & LAST_TEMP_MASK; - if (code & STATUS_VALID_BIT) + + if (valid) goto done; /* Try a second time */ - ret = regmap_read(priv->tm_map, status_reg, &code); + ret = regmap_field_read(priv->rf[valid_idx], &valid); + if (ret) + return ret; + ret = regmap_field_read(priv->rf[temp_idx], &last_temp2); if (ret) return ret; - if (code & STATUS_VALID_BIT) { - last_temp = code & LAST_TEMP_MASK; + if (valid) { + last_temp = last_temp2; goto done; - } else { - last_temp2 = code & LAST_TEMP_MASK; } /* Try a third/last time */ - ret = regmap_read(priv->tm_map, status_reg, &code); + ret = regmap_field_read(priv->rf[valid_idx], &valid); if (ret) return ret; - if (code & STATUS_VALID_BIT) { - last_temp = code & LAST_TEMP_MASK; + ret = regmap_field_read(priv->rf[temp_idx], &last_temp3); + if (ret) + return ret; + if (valid) { + last_temp = last_temp3; goto done; - } else { - last_temp3 = code & LAST_TEMP_MASK; } if (last_temp == last_temp2) @@ -61,19 +81,58 @@ static int get_temp_tsens_v2(struct tsens_priv *priv, int id, int *temp) return 0; } +/* v2.x: 8996, 8998, sdm845 */ + +const struct tsens_features tsens_v2_feat = { + .ver_major = VER_2_X, + .crit_int = 1, + .adc = 0, + .srot_split = 1, +}; + +const struct reg_field tsens_v2_regfields[MAX_REGFIELDS] = { + /* ----- SROT ------ */ + /* VERSION */ + [VER_MAJOR] = REG_FIELD(SROT_HW_VER_OFF, 28, 31), + [VER_MINOR] = REG_FIELD(SROT_HW_VER_OFF, 16, 27), + [VER_STEP] = REG_FIELD(SROT_HW_VER_OFF, 0, 15), + /* CTRL_OFF */ + [TSENS_EN] = REG_FIELD(SROT_CTRL_OFF, 0, 0), + [TSENS_SW_RST] = REG_FIELD(SROT_CTRL_OFF, 1, 1), + + /* ----- TM ------ */ + /* INTERRUPT ENABLE */ + /* v2 has separate enables for UPPER/LOWER/CRITICAL interrupts */ + [INT_EN] = REG_FIELD(TM_INT_EN_OFF, 0, 2), + + /* Sn_STATUS */ + REG_FIELD_FOR_EACH_SENSOR16(LAST_TEMP, TM_Sn_STATUS_OFF, 0, 11), + REG_FIELD_FOR_EACH_SENSOR16(VALID, TM_Sn_STATUS_OFF, 21, 21), + REG_FIELD_FOR_EACH_SENSOR16(MIN_STATUS, TM_Sn_STATUS_OFF, 16, 16), + REG_FIELD_FOR_EACH_SENSOR16(LOWER_STATUS, TM_Sn_STATUS_OFF, 17, 17), + REG_FIELD_FOR_EACH_SENSOR16(UPPER_STATUS, TM_Sn_STATUS_OFF, 18, 18), + REG_FIELD_FOR_EACH_SENSOR16(CRITICAL_STATUS, TM_Sn_STATUS_OFF, 19, 19), + REG_FIELD_FOR_EACH_SENSOR16(MAX_STATUS, TM_Sn_STATUS_OFF, 20, 20), + + /* TRDY: 1=ready, 0=in progress */ + [TRDY] = REG_FIELD(TM_TRDY_OFF, 0, 0), +}; + static const struct tsens_ops ops_generic_v2 = { .init = init_common, .get_temp = get_temp_tsens_v2, }; const struct tsens_plat_data data_tsens_v2 = { - .ops = &ops_generic_v2, - .reg_offsets = { [SROT_CTRL_OFFSET] = 0x4 }, + .ops = &ops_generic_v2, + .feat = &tsens_v2_feat, + .fields = tsens_v2_regfields, }; /* Kept around for backward compatibility with old msm8996.dtsi */ const struct tsens_plat_data data_8996 = { .num_sensors = 13, .ops = &ops_generic_v2, - .reg_offsets = { [SROT_CTRL_OFFSET] = 0x4 }, + .feat = &tsens_v2_feat, + .fields = tsens_v2_regfields, }; diff --git a/drivers/thermal/qcom/tsens.c b/drivers/thermal/qcom/tsens.c index 0b5be08d515f..b91a0b88d33c 100644 --- a/drivers/thermal/qcom/tsens.c +++ b/drivers/thermal/qcom/tsens.c @@ -144,9 +144,8 @@ static int tsens_probe(struct platform_device *pdev) else priv->sensor[i].hw_id = i; } - for (i = 0; i < REG_ARRAY_SIZE; i++) { - priv->reg_offsets[i] = data->reg_offsets[i]; - } + priv->feat = data->feat; + priv->fields = data->fields; if (!priv->ops || !priv->ops->init || !priv->ops->get_temp) return -EINVAL; diff --git a/drivers/thermal/qcom/tsens.h b/drivers/thermal/qcom/tsens.h index 27b8f74829d9..a9390e06b4dd 100644 --- a/drivers/thermal/qcom/tsens.h +++ b/drivers/thermal/qcom/tsens.h @@ -11,9 +11,16 @@ #define TWO_PT_CALIB 0x3 #include +#include struct tsens_priv; +enum tsens_ver { + VER_0_1 = 0, + VER_1_X, + VER_2_X, +}; + /** * struct tsens_sensor - data for each sensor connected to the tsens device * @priv: tsens device instance that this sensor is connected to @@ -58,10 +65,189 @@ struct tsens_ops { int (*get_trend)(struct tsens_priv *priv, int i, enum thermal_trend *trend); }; -enum reg_list { - SROT_CTRL_OFFSET, +#define REG_FIELD_FOR_EACH_SENSOR11(_name, _offset, _startbit, _stopbit) \ + [_name##_##0] = REG_FIELD(_offset, _startbit, _stopbit), \ + [_name##_##1] = REG_FIELD(_offset + 4, _startbit, _stopbit), \ + [_name##_##2] = REG_FIELD(_offset + 8, _startbit, _stopbit), \ + [_name##_##3] = REG_FIELD(_offset + 12, _startbit, _stopbit), \ + [_name##_##4] = REG_FIELD(_offset + 16, _startbit, _stopbit), \ + [_name##_##5] = REG_FIELD(_offset + 20, _startbit, _stopbit), \ + [_name##_##6] = REG_FIELD(_offset + 24, _startbit, _stopbit), \ + [_name##_##7] = REG_FIELD(_offset + 28, _startbit, _stopbit), \ + [_name##_##8] = REG_FIELD(_offset + 32, _startbit, _stopbit), \ + [_name##_##9] = REG_FIELD(_offset + 36, _startbit, _stopbit), \ + [_name##_##10] = REG_FIELD(_offset + 40, _startbit, _stopbit) + +#define REG_FIELD_FOR_EACH_SENSOR16(_name, _offset, _startbit, _stopbit) \ + [_name##_##0] = REG_FIELD(_offset, _startbit, _stopbit), \ + [_name##_##1] = REG_FIELD(_offset + 4, _startbit, _stopbit), \ + [_name##_##2] = REG_FIELD(_offset + 8, _startbit, _stopbit), \ + [_name##_##3] = REG_FIELD(_offset + 12, _startbit, _stopbit), \ + [_name##_##4] = REG_FIELD(_offset + 16, _startbit, _stopbit), \ + [_name##_##5] = REG_FIELD(_offset + 20, _startbit, _stopbit), \ + [_name##_##6] = REG_FIELD(_offset + 24, _startbit, _stopbit), \ + [_name##_##7] = REG_FIELD(_offset + 28, _startbit, _stopbit), \ + [_name##_##8] = REG_FIELD(_offset + 32, _startbit, _stopbit), \ + [_name##_##9] = REG_FIELD(_offset + 36, _startbit, _stopbit), \ + [_name##_##10] = REG_FIELD(_offset + 40, _startbit, _stopbit), \ + [_name##_##11] = REG_FIELD(_offset + 44, _startbit, _stopbit), \ + [_name##_##12] = REG_FIELD(_offset + 48, _startbit, _stopbit), \ + [_name##_##13] = REG_FIELD(_offset + 52, _startbit, _stopbit), \ + [_name##_##14] = REG_FIELD(_offset + 56, _startbit, _stopbit), \ + [_name##_##15] = REG_FIELD(_offset + 60, _startbit, _stopbit) + +/* reg_field IDs to use as an index into an array */ +enum regfield_ids { + /* ----- SROT ------ */ + /* HW_VER */ + VER_MAJOR = 0, + VER_MINOR, + VER_STEP, + /* CTRL_OFFSET */ + TSENS_EN = 3, + TSENS_SW_RST, + SENSOR_EN, + CODE_OR_TEMP, + + /* ----- TM ------ */ + /* STATUS */ + LAST_TEMP_0 = 7, /* Last temperature reading */ + LAST_TEMP_1, + LAST_TEMP_2, + LAST_TEMP_3, + LAST_TEMP_4, + LAST_TEMP_5, + LAST_TEMP_6, + LAST_TEMP_7, + LAST_TEMP_8, + LAST_TEMP_9, + LAST_TEMP_10, + LAST_TEMP_11, + LAST_TEMP_12, + LAST_TEMP_13, + LAST_TEMP_14, + LAST_TEMP_15, + VALID_0 = 23, /* VALID reading or not */ + VALID_1, + VALID_2, + VALID_3, + VALID_4, + VALID_5, + VALID_6, + VALID_7, + VALID_8, + VALID_9, + VALID_10, + VALID_11, + VALID_12, + VALID_13, + VALID_14, + VALID_15, + MIN_STATUS_0, /* MIN threshold violated */ + MIN_STATUS_1, + MIN_STATUS_2, + MIN_STATUS_3, + MIN_STATUS_4, + MIN_STATUS_5, + MIN_STATUS_6, + MIN_STATUS_7, + MIN_STATUS_8, + MIN_STATUS_9, + MIN_STATUS_10, + MIN_STATUS_11, + MIN_STATUS_12, + MIN_STATUS_13, + MIN_STATUS_14, + MIN_STATUS_15, + MAX_STATUS_0, /* MAX threshold violated */ + MAX_STATUS_1, + MAX_STATUS_2, + MAX_STATUS_3, + MAX_STATUS_4, + MAX_STATUS_5, + MAX_STATUS_6, + MAX_STATUS_7, + MAX_STATUS_8, + MAX_STATUS_9, + MAX_STATUS_10, + MAX_STATUS_11, + MAX_STATUS_12, + MAX_STATUS_13, + MAX_STATUS_14, + MAX_STATUS_15, + LOWER_STATUS_0, /* LOWER threshold violated */ + LOWER_STATUS_1, + LOWER_STATUS_2, + LOWER_STATUS_3, + LOWER_STATUS_4, + LOWER_STATUS_5, + LOWER_STATUS_6, + LOWER_STATUS_7, + LOWER_STATUS_8, + LOWER_STATUS_9, + LOWER_STATUS_10, + LOWER_STATUS_11, + LOWER_STATUS_12, + LOWER_STATUS_13, + LOWER_STATUS_14, + LOWER_STATUS_15, + UPPER_STATUS_0, /* UPPER threshold violated */ + UPPER_STATUS_1, + UPPER_STATUS_2, + UPPER_STATUS_3, + UPPER_STATUS_4, + UPPER_STATUS_5, + UPPER_STATUS_6, + UPPER_STATUS_7, + UPPER_STATUS_8, + UPPER_STATUS_9, + UPPER_STATUS_10, + UPPER_STATUS_11, + UPPER_STATUS_12, + UPPER_STATUS_13, + UPPER_STATUS_14, + UPPER_STATUS_15, + CRITICAL_STATUS_0, /* CRITICAL threshold violated */ + CRITICAL_STATUS_1, + CRITICAL_STATUS_2, + CRITICAL_STATUS_3, + CRITICAL_STATUS_4, + CRITICAL_STATUS_5, + CRITICAL_STATUS_6, + CRITICAL_STATUS_7, + CRITICAL_STATUS_8, + CRITICAL_STATUS_9, + CRITICAL_STATUS_10, + CRITICAL_STATUS_11, + CRITICAL_STATUS_12, + CRITICAL_STATUS_13, + CRITICAL_STATUS_14, + CRITICAL_STATUS_15, + /* TRDY */ + TRDY, + /* INTERRUPT ENABLE */ + INT_EN, /* Pre-V1, V1.x */ + LOW_INT_EN, /* V2.x */ + UP_INT_EN, /* V2.x */ + CRIT_INT_EN, /* V2.x */ - REG_ARRAY_SIZE, + /* Keep last */ + MAX_REGFIELDS +}; + +/** + * struct tsens_features - Features supported by the IP + * @ver_major: Major number of IP version + * @crit_int: does the IP support critical interrupts? + * @adc: do the sensors only output adc code (instead of temperature)? + * @srot_split: does the IP neatly splits the register space into SROT and TM, + * with SROT only being available to secure boot firmware? + */ +struct tsens_features { + unsigned int ver_major; + unsigned int crit_int:1; + unsigned int adc:1; + unsigned int srot_split:1; }; /** @@ -69,13 +255,15 @@ enum reg_list { * @num_sensors: Number of sensors supported by platform * @ops: operations the tsens instance supports * @hw_ids: Subset of sensors ids supported by platform, if not the first n - * @reg_offsets: Register offsets for commonly used registers + * @feat: features of the IP + * @fields: bitfield locations */ struct tsens_plat_data { const u32 num_sensors; const struct tsens_ops *ops; - const u16 reg_offsets[REG_ARRAY_SIZE]; unsigned int *hw_ids; + const struct tsens_features *feat; + const struct reg_field *fields; }; /** @@ -94,8 +282,10 @@ struct tsens_context { * @srot_map: pointer to SROT register address space * @tm_offset: deal with old device trees that don't address TM and SROT * address space separately - * @reg_offsets: array of offsets to important regs for this version of IP + * @rf: array of regmap_fields used to store value of the field * @ctx: registers to be saved and restored during suspend/resume + * @feat: features of the IP + * @fields: bitfield locations * @ops: pointer to list of callbacks supported by this device * @sensor: list of sensors attached to this device */ @@ -105,8 +295,10 @@ struct tsens_priv { struct regmap *tm_map; struct regmap *srot_map; u32 tm_offset; - u16 reg_offsets[REG_ARRAY_SIZE]; + struct regmap_field *rf[MAX_REGFIELDS]; struct tsens_context ctx; + const struct tsens_features *feat; + const struct reg_field *fields; const struct tsens_ops *ops; struct tsens_sensor sensor[0]; }; From patchwork Wed Mar 20 13:17:51 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 160678 Delivered-To: patch@linaro.org Received: by 2002:a02:c6d8:0:0:0:0:0 with SMTP id r24csp282623jan; Wed, 20 Mar 2019 06:19:16 -0700 (PDT) X-Google-Smtp-Source: APXvYqzgywcn6r7H5tnxidJgSxJjcLKWkzy3IQx6ON5Y/jP5EuMlmyDQRMDunrROA9+gFtAV2DkW X-Received: by 2002:a17:902:b617:: with SMTP id b23mr30403933pls.200.1553087955960; Wed, 20 Mar 2019 06:19:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1553087955; cv=none; d=google.com; s=arc-20160816; b=Dk97YcSx4ENyslQ37ngHVWPvR8q7oIesvnSvpQsCjAx7oKBuNToVVgNU9nuBZpjkwo KfuwUdjMsOXeabPV+25A23tVSMnCWoiTqaqONhIjMAcc+H9u7VEmkWbYv63nCYxyZnXo o/ijIHHfqNtBRJCq2+gz+e9VIf6H6XdqbKKQ7kxyMQRa2cwKjvyDBfxdbkAYUdZMUzbp pVnLbPIxbJMe6wIplsQWwcZkcvUZZQjXn64L5elCX9FwhOuqUsENQ9aESISWo6y8oizH CgZV2RXsvjbFURpGEHwhG/zcx0Qt+QMLjO2Nerz1UylRqIHc0kKMt9h2UntKpUB6eUSR sWyA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature; bh=VhHcZVSBRtsAuReEPdrQAjR3KZZmXdu2lzzS3zScaAA=; b=EX1gWAHxtZN5J6F1Mu75JdeaViNtwoV2xPBSJerCTuaPdYpOcc3cIiiUPo9l9Oylhg H1XU/bIxldlgM/HLu+6OYeqf7MTTV1B+YPjN+e8Pd+xml5cnVzZi0m1VH061YZkdhf+y LPfvAdCLZTmbQVEbubTg4ROQVq6ZXpwPXorNH5yJUSvOL6DulWc58rhwFAoSLODrmYQ+ 3XDvSUrr3DH1o1PbYPGqqJHBSGQhCqJEOgmwSaz96aJ1wW80jfPDcy38sgshkqqADsMp hF8u5iU7bTU+BIDUiHqUfEu+zzaic/kXnJQKQzxDn57l8a0P29VmDZFi85QAENLfQUyJ 3LOg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=aZkY1Ivl; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Wed, 20 Mar 2019 06:19:12 -0700 (PDT) Received: from localhost ([114.143.122.221]) by smtp.gmail.com with ESMTPSA id z77sm4975215pfi.155.2019.03.20.06.19.11 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 20 Mar 2019 06:19:12 -0700 (PDT) From: Amit Kucheria To: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, edubezval@gmail.com, andy.gross@linaro.org, Daniel Lezcano , David Brown , Zhang Rui Cc: linux-pm@vger.kernel.org Subject: [PATCHv3 11/23] drivers: thermal: tsens: Save reference to the device pointer and use it Date: Wed, 20 Mar 2019 18:47:51 +0530 Message-Id: <8d368c678b3985cc58a0c314ee14756921d33746.1553086065.git.amit.kucheria@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Code cleanup making it easier to read Signed-off-by: Amit Kucheria --- drivers/thermal/qcom/tsens-common.c | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) -- 2.17.1 diff --git a/drivers/thermal/qcom/tsens-common.c b/drivers/thermal/qcom/tsens-common.c index 0f9deec2517a..9d7a6c328ae0 100644 --- a/drivers/thermal/qcom/tsens-common.c +++ b/drivers/thermal/qcom/tsens-common.c @@ -119,6 +119,7 @@ static const struct regmap_config tsens_srot_config = { int __init init_common(struct tsens_priv *priv) { void __iomem *tm_base, *srot_base; + struct device *dev = priv->dev; struct resource *res; u32 enabled; int ret, i, j; @@ -137,7 +138,7 @@ int __init init_common(struct tsens_priv *priv) goto err_put_device; } - priv->srot_map = devm_regmap_init_mmio(priv->dev, srot_base, + priv->srot_map = devm_regmap_init_mmio(dev, srot_base, &tsens_srot_config); if (IS_ERR(priv->srot_map)) { ret = PTR_ERR(priv->srot_map); @@ -155,13 +156,13 @@ int __init init_common(struct tsens_priv *priv) goto err_put_device; } - priv->tm_map = devm_regmap_init_mmio(priv->dev, tm_base, &tsens_config); + priv->tm_map = devm_regmap_init_mmio(dev, tm_base, &tsens_config); if (IS_ERR(priv->tm_map)) { ret = PTR_ERR(priv->tm_map); goto err_put_device; } - priv->rf[TSENS_EN] = devm_regmap_field_alloc(priv->dev, priv->srot_map, + priv->rf[TSENS_EN] = devm_regmap_field_alloc(dev, priv->srot_map, priv->fields[TSENS_EN]); if (IS_ERR(priv->rf[TSENS_EN])) { ret = PTR_ERR(priv->rf[TSENS_EN]); @@ -171,12 +172,12 @@ int __init init_common(struct tsens_priv *priv) if (ret) goto err_put_device; if (!enabled) { - dev_err(priv->dev, "tsens device is not enabled\n"); + dev_err(dev, "tsens device is not enabled\n"); ret = -ENODEV; goto err_put_device; } - priv->rf[SENSOR_EN] = devm_regmap_field_alloc(priv->dev, priv->srot_map, + priv->rf[SENSOR_EN] = devm_regmap_field_alloc(dev, priv->srot_map, priv->fields[SENSOR_EN]); if (IS_ERR(priv->rf[SENSOR_EN])) { ret = PTR_ERR(priv->rf[SENSOR_EN]); @@ -184,7 +185,7 @@ int __init init_common(struct tsens_priv *priv) } /* now alloc regmap_fields in tm_map */ for (i = 0, j = LAST_TEMP_0; i < priv->num_sensors; i++, j++) { - priv->rf[j] = devm_regmap_field_alloc(priv->dev, priv->tm_map, + priv->rf[j] = devm_regmap_field_alloc(dev, priv->tm_map, priv->fields[j]); if (IS_ERR(priv->rf[j])) { ret = PTR_ERR(priv->rf[j]); @@ -192,7 +193,7 @@ int __init init_common(struct tsens_priv *priv) } } for (i = 0, j = VALID_0; i < priv->num_sensors; i++, j++) { - priv->rf[j] = devm_regmap_field_alloc(priv->dev, priv->tm_map, + priv->rf[j] = devm_regmap_field_alloc(dev, priv->tm_map, priv->fields[j]); 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It is possible that the SoC might choose not to enable all the sensors that the IP block is capable of supporting. Signed-off-by: Amit Kucheria --- drivers/thermal/qcom/tsens-common.c | 14 ++++++++++++++ drivers/thermal/qcom/tsens-v0_1.c | 1 + drivers/thermal/qcom/tsens-v2.c | 1 + drivers/thermal/qcom/tsens.c | 5 +++++ drivers/thermal/qcom/tsens.h | 1 + 5 files changed, 22 insertions(+) -- 2.17.1 diff --git a/drivers/thermal/qcom/tsens-common.c b/drivers/thermal/qcom/tsens-common.c index 9d7a6c328ae0..c76f8cfb25a2 100644 --- a/drivers/thermal/qcom/tsens-common.c +++ b/drivers/thermal/qcom/tsens-common.c @@ -69,6 +69,20 @@ void compute_intercept_slope(struct tsens_priv *priv, u32 *p1, } } +bool is_sensor_enabled(struct tsens_priv *priv, u32 hw_id) +{ + u32 val; + int ret; + + if ((hw_id > (priv->num_sensors - 1)) || (hw_id < 0)) + return -EINVAL; + ret = regmap_field_read(priv->rf[SENSOR_EN], &val); + if (ret) + return ret; + + return val & (1 << hw_id); +} + static inline int code_to_degc(u32 adc_code, const struct tsens_sensor *s) { int degc, num, den; diff --git a/drivers/thermal/qcom/tsens-v0_1.c b/drivers/thermal/qcom/tsens-v0_1.c index d171a4a8c454..431255bfd0ef 100644 --- a/drivers/thermal/qcom/tsens-v0_1.c +++ b/drivers/thermal/qcom/tsens-v0_1.c @@ -333,6 +333,7 @@ const struct reg_field tsens_v0_1_regfields[MAX_REGFIELDS] = { /* CTRL_OFFSET */ [TSENS_EN] = REG_FIELD(SROT_CTRL_OFF, 0, 0), [TSENS_SW_RST] = REG_FIELD(SROT_CTRL_OFF, 1, 1), + [SENSOR_EN] = REG_FIELD(SROT_CTRL_OFF, 3, 13), /* ----- TM ------ */ /* INTERRUPT ENABLE */ diff --git a/drivers/thermal/qcom/tsens-v2.c b/drivers/thermal/qcom/tsens-v2.c index e15a302f7878..4b98dbe4e3c3 100644 --- a/drivers/thermal/qcom/tsens-v2.c +++ b/drivers/thermal/qcom/tsens-v2.c @@ -99,6 +99,7 @@ const struct reg_field tsens_v2_regfields[MAX_REGFIELDS] = { /* CTRL_OFF */ [TSENS_EN] = REG_FIELD(SROT_CTRL_OFF, 0, 0), [TSENS_SW_RST] = REG_FIELD(SROT_CTRL_OFF, 1, 1), + [SENSOR_EN] = REG_FIELD(SROT_CTRL_OFF, 3, 18), /* ----- TM ------ */ /* INTERRUPT ENABLE */ diff --git a/drivers/thermal/qcom/tsens.c b/drivers/thermal/qcom/tsens.c index 057b33353ba3..fc44cac31fa5 100644 --- a/drivers/thermal/qcom/tsens.c +++ b/drivers/thermal/qcom/tsens.c @@ -82,6 +82,11 @@ static int tsens_register(struct tsens_priv *priv) struct thermal_zone_device *tzd; for (i = 0; i < priv->num_sensors; i++) { + if (!is_sensor_enabled(priv, priv->sensor[i].hw_id)) { + dev_err(priv->dev, "sensor %d: disabled\n", + priv->sensor[i].hw_id); + continue; + } priv->sensor[i].priv = priv; priv->sensor[i].id = i; tzd = devm_thermal_zone_of_sensor_register(priv->dev, i, diff --git a/drivers/thermal/qcom/tsens.h b/drivers/thermal/qcom/tsens.h index a9390e06b4dd..a3bf7de88ae8 100644 --- a/drivers/thermal/qcom/tsens.h +++ b/drivers/thermal/qcom/tsens.h @@ -307,6 +307,7 @@ char *qfprom_read(struct device *dev, const char *cname); void compute_intercept_slope(struct tsens_priv *priv, u32 *pt1, u32 *pt2, u32 mode); int init_common(struct tsens_priv *priv); int get_temp_common(struct tsens_priv *priv, int i, int *temp); +bool is_sensor_enabled(struct tsens_priv *priv, u32 hw_id); /* TSENS target */ extern const struct tsens_plat_data data_8960; From patchwork Wed Mar 20 13:17:57 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 160684 Delivered-To: patch@linaro.org Received: by 2002:a02:c6d8:0:0:0:0:0 with SMTP id r24csp283095jan; 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Wed, 20 Mar 2019 06:19:38 -0700 (PDT) Received: from localhost ([114.143.122.221]) by smtp.gmail.com with ESMTPSA id h3sm2361211pgv.38.2019.03.20.06.19.37 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 20 Mar 2019 06:19:37 -0700 (PDT) From: Amit Kucheria To: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, edubezval@gmail.com, andy.gross@linaro.org, Daniel Lezcano , David Brown , Zhang Rui Cc: linux-pm@vger.kernel.org Subject: [PATCHv3 17/23] drivers: thermal: tsens: Move get_temp_tsens_v2 to allow sharing Date: Wed, 20 Mar 2019 18:47:57 +0530 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Just rename the function and move it to allow code sharing with future versions of TSENS IP Signed-off-by: Amit Kucheria --- drivers/thermal/qcom/tsens-common.c | 35 +++++++++++++++++++++++++++ drivers/thermal/qcom/tsens-v2.c | 37 +---------------------------- drivers/thermal/qcom/tsens.h | 1 + 3 files changed, 37 insertions(+), 36 deletions(-) -- 2.17.1 diff --git a/drivers/thermal/qcom/tsens-common.c b/drivers/thermal/qcom/tsens-common.c index 5607c5cc635c..5adbf1a2e0fb 100644 --- a/drivers/thermal/qcom/tsens-common.c +++ b/drivers/thermal/qcom/tsens-common.c @@ -102,6 +102,41 @@ static inline int code_to_degc(u32 adc_code, const struct tsens_sensor *s) return degc; } +int get_temp_tsens_valid(struct tsens_priv *priv, int i, int *temp) +{ + struct tsens_sensor *s = &priv->sensor[i]; + u32 temp_idx = LAST_TEMP_0 + s->hw_id; + u32 valid_idx = VALID_0 + s->hw_id; + u32 last_temp = 0, valid, mask; + int ret; + + ret = regmap_field_read(priv->rf[valid_idx], &valid); + if (ret) + return ret; + while (!valid) { + /* Valid bit is 0 for 6 AHB clock cycles. + * At 19.2MHz, 1 AHB clock is ~60ns. + * We should enter this loop very, very rarely. + */ + ndelay(400); + ret = regmap_field_read(priv->rf[valid_idx], &valid); + if (ret) + return ret; + } + + /* Valid bit is set, OK to read the temperature */ + ret = regmap_field_read(priv->rf[temp_idx], &last_temp); + if (ret) + return ret; + + mask = GENMASK(priv->fields[LAST_TEMP_0].msb, + priv->fields[LAST_TEMP_0].lsb); + /* Convert temperature from deciCelsius to milliCelsius */ + *temp = sign_extend32(last_temp, fls(mask) - 1) * 100; + + return 0; +} + int get_temp_common(struct tsens_priv *priv, int i, int *temp) { struct tsens_sensor *s = &priv->sensor[i]; diff --git a/drivers/thermal/qcom/tsens-v2.c b/drivers/thermal/qcom/tsens-v2.c index 716d7f827459..36fbfa6a471e 100644 --- a/drivers/thermal/qcom/tsens-v2.c +++ b/drivers/thermal/qcom/tsens-v2.c @@ -25,41 +25,6 @@ #define TM_Sn_STATUS_OFF 0x00a0 #define TM_TRDY_OFF 0x00e4 -static int get_temp_tsens_v2(struct tsens_priv *priv, int i, int *temp) -{ - struct tsens_sensor *s = &priv->sensor[i]; - u32 temp_idx = LAST_TEMP_0 + s->hw_id; - u32 valid_idx = VALID_0 + s->hw_id; - u32 last_temp = 0, valid, mask; - int ret; - - ret = regmap_field_read(priv->rf[valid_idx], &valid); - if (ret) - return ret; - while (!valid) { - /* Valid bit is 0 for 6 AHB clock cycles. - * At 19.2MHz, 1 AHB clock is ~60ns. - * We should enter this loop very, very rarely. - */ - ndelay(400); - ret = regmap_field_read(priv->rf[valid_idx], &valid); - if (ret) - return ret; - } - - /* Valid bit is set, OK to read the temperature */ - ret = regmap_field_read(priv->rf[temp_idx], &last_temp); - if (ret) - return ret; - - mask = GENMASK(priv->fields[LAST_TEMP_0].msb, - priv->fields[LAST_TEMP_0].lsb); - /* Convert temperature from deciCelsius to milliCelsius */ - *temp = sign_extend32(last_temp, fls(mask) - 1) * 100; - - return 0; -} - /* v2.x: 8996, 8998, sdm845 */ const struct tsens_features tsens_v2_feat = { @@ -101,7 +66,7 @@ const struct reg_field tsens_v2_regfields[MAX_REGFIELDS] = { static const struct tsens_ops ops_generic_v2 = { .init = init_common, - .get_temp = get_temp_tsens_v2, + .get_temp = get_temp_tsens_valid, }; const struct tsens_plat_data data_tsens_v2 = { diff --git a/drivers/thermal/qcom/tsens.h b/drivers/thermal/qcom/tsens.h index 080e15a09ac2..f14a87aa1a47 100644 --- a/drivers/thermal/qcom/tsens.h +++ b/drivers/thermal/qcom/tsens.h @@ -308,6 +308,7 @@ struct tsens_priv { char *qfprom_read(struct device *dev, const char *cname); void compute_intercept_slope(struct tsens_priv *priv, u32 *pt1, u32 *pt2, u32 mode); int init_common(struct tsens_priv *priv); +int get_temp_tsens_valid(struct tsens_priv *priv, int i, int *temp); int get_temp_common(struct tsens_priv *priv, int i, int *temp); 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Signed-off-by: Amit Kucheria --- drivers/thermal/qcom/tsens-common.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) -- 2.17.1 diff --git a/drivers/thermal/qcom/tsens-common.c b/drivers/thermal/qcom/tsens-common.c index 5adbf1a2e0fb..92747ccb2850 100644 --- a/drivers/thermal/qcom/tsens-common.c +++ b/drivers/thermal/qcom/tsens-common.c @@ -129,10 +129,15 @@ int get_temp_tsens_valid(struct tsens_priv *priv, int i, int *temp) if (ret) return ret; - mask = GENMASK(priv->fields[LAST_TEMP_0].msb, - priv->fields[LAST_TEMP_0].lsb); - /* Convert temperature from deciCelsius to milliCelsius */ - *temp = sign_extend32(last_temp, fls(mask) - 1) * 100; + if (priv->feat->adc) { + /* Convert temperature from ADC code to milliCelsius */ + *temp = code_to_degc(last_temp, s) * 1000; + } else { + mask = GENMASK(priv->fields[LAST_TEMP_0].msb, + priv->fields[LAST_TEMP_0].lsb); + /* Convert temperature from deciCelsius to milliCelsius */ + *temp = sign_extend32(last_temp, fls(mask) - 1) * 100; + } return 0; }