From patchwork Fri Nov 18 11:30:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yassine Oudjana X-Patchwork-Id: 626464 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 44EDEC43219 for ; Fri, 18 Nov 2022 11:32:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241659AbiKRLcj (ORCPT ); Fri, 18 Nov 2022 06:32:39 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34526 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241185AbiKRLcN (ORCPT ); Fri, 18 Nov 2022 06:32:13 -0500 Received: from mail-wr1-x42b.google.com (mail-wr1-x42b.google.com [IPv6:2a00:1450:4864:20::42b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9B35D8B10E; Fri, 18 Nov 2022 03:32:02 -0800 (PST) Received: by mail-wr1-x42b.google.com with SMTP id g2so5143181wrv.6; Fri, 18 Nov 2022 03:32:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=WU/IiR7cE8k8Ct2BKn6U4+LCrt9eTga1yn5tJ+jqm7I=; b=XZt1krBP4I4YMmZTtsRb8PoArBkkhRzClzELdbnB5ejdZ4NA34wczquYn/Vy7w8/vt m7s4uMTorTn88kQ5valu/42tKfvDAn2ifSk6rTUsKWtbOvJwRMjciFEBnMTqKefhuEhK YqFj0SKjt18qtN9zzgBzC/DFiUzzJy7ippC/u4qewlHoc4COmr6RkOaI8Y2RcqY9qlCy TK2MnZkY+3j6Mu/DCX7eBE5NG/nGnYp5vuotgBngn3oI18hPrEiErRv0XU+nvmBnfyyJ Kj5pbLSVu/KiGi4Xx34qb/9JMie3B3akZZDitKYW3Tdri7VutjJa5CwTYT4dlupJtw85 5+Vg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=WU/IiR7cE8k8Ct2BKn6U4+LCrt9eTga1yn5tJ+jqm7I=; b=JE4avhdzq7Mkwdh+UveS7vnHlx+cJOpTe29aFotlM4PZC6o7uFicm7fnP+yi/5WOyt PJy7Lr0obwjog+sagh+5Ocb0M13/tqLIhoESetMMNheDeIJrX0wbq9RgFn5QRHSUqfe2 3OXi2pDyfZSuEauUdwWOgxOJWBt1BfKvhS+c0oyOx6oczYUqPWH4iyzJsi0lfUezZ36B M9J9lUmi1uSnvIh/t58LCJ7rGrzNUXJS5M3QpfbD2oX+U/KPR4velN508toKOboH96uQ +RXvDbgTFy1yKmuYG87udJa2ichXAkXaqZvLKJAJ02Nvez99RnVNUvyp1EhiWlAAYKyP hpsA== X-Gm-Message-State: ANoB5pmMg9gkJmN2fq0UWqXojXY54eQFwLQZKyitSV35M307Tu0o/vZo xp5Yya+iV8X9xfeLvhmuFn0= X-Google-Smtp-Source: AA0mqf58I23NR4/4SbZugVPX22dvJKHqj02BlJmyoF4W6patuvX4oUKC+TZI5TXiGQgbCePFhMYy4w== X-Received: by 2002:adf:ce04:0:b0:241:7277:95dc with SMTP id p4-20020adfce04000000b00241727795dcmr3917637wrn.620.1668771121020; Fri, 18 Nov 2022 03:32:01 -0800 (PST) Received: from localhost.localdomain ([95.183.227.98]) by smtp.gmail.com with ESMTPSA id l24-20020a05600c1d1800b003cf878c4468sm9894817wms.5.2022.11.18.03.31.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Nov 2022 03:32:00 -0800 (PST) From: Yassine Oudjana X-Google-Original-From: Yassine Oudjana To: Linus Walleij , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , Sean Wang , Andy Teng , AngeloGioacchino Del Regno Cc: Yassine Oudjana , Yassine Oudjana , linux-mediatek@lists.infradead.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 2/7] dt-bindings: pinctrl: mediatek, mt6779-pinctrl: Improve pinctrl subnode and property descriptions Date: Fri, 18 Nov 2022 14:30:23 +0300 Message-Id: <20221118113028.145348-3-y.oudjana@protonmail.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221118113028.145348-1-y.oudjana@protonmail.com> References: <20221118113028.145348-1-y.oudjana@protonmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org From: Yassine Oudjana Change "subnodes" to "subnode" in subnode description for better grammatical accuracy, capitalize pinmux description, wrap all descriptions at 80 characters, and remove literal style indicators from descriptions that don't need their new lines preserved. Signed-off-by: Yassine Oudjana --- .../pinctrl/mediatek,mt6779-pinctrl.yaml | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-) diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml index d6231d11e949..9d481311cc6b 100644 --- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml @@ -118,11 +118,12 @@ patternProperties: patternProperties: '^pins': type: object - description: | - A pinctrl node should contain at least one subnodes representing the + description: + A pinctrl node should contain at least one subnode representing the pinctrl groups available on the machine. Each subnode will list the - pins it needs, and how they should be configured, with regard to muxer - configuration, pullups, drive strength, input enable/disable and input schmitt. + pins it needs, and how they should be configured, with regard to + muxer configuration, pullups, drive strength, input enable/disable + and input schmitt. allOf: - $ref: pinmux-node.yaml - $ref: pincfg-node.yaml @@ -130,9 +131,9 @@ patternProperties: properties: pinmux: description: - integer array, represents gpio pin number and mux setting. - Supported pin number and mux varies for different SoCs, and are defined - as macros in boot/dts/-pinfunc.h directly. + Integer array, represents gpio pin number and mux setting. + Supported pin number and mux varies for different SoCs, and are + defined as macros in boot/dts/-pinfunc.h directly. bias-disable: true @@ -141,7 +142,7 @@ patternProperties: - type: boolean - enum: [100, 101, 102, 103] description: Pull up PUPD/R0/R1 type define value. - description: | + description: For normal pull up type, it is not necessary to specify R1R0 values; When pull up type is PUPD/R0/R1, adding R1R0 defines will set different resistance values. @@ -151,7 +152,7 @@ patternProperties: - type: boolean - enum: [100, 101, 102, 103] description: Pull down PUPD/R0/R1 type define value. - description: | + description: For normal pull down type, it is not necessary to specify R1R0 values; When pull down type is PUPD/R0/R1, adding R1R0 defines will set different resistance values. From patchwork Fri Nov 18 11:30:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yassine Oudjana X-Patchwork-Id: 626462 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8CF45C4332F for ; Fri, 18 Nov 2022 11:32:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234724AbiKRLco (ORCPT ); Fri, 18 Nov 2022 06:32:44 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34390 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241377AbiKRLcV (ORCPT ); Fri, 18 Nov 2022 06:32:21 -0500 Received: from mail-wm1-x336.google.com (mail-wm1-x336.google.com [IPv6:2a00:1450:4864:20::336]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D34687FC0B; Fri, 18 Nov 2022 03:32:07 -0800 (PST) Received: by mail-wm1-x336.google.com with SMTP id c65-20020a1c3544000000b003cfffd00fc0so3326576wma.1; Fri, 18 Nov 2022 03:32:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=FHS4xwDjkiA0w7wmXV8oTrtUiAVe60d4UjcHzqznohk=; b=KxmieWi6LcnoMSufsx2H60XoPHytWoiY2g2xEWOpLds//yqefgYkioPdZRq/dmI6C/ bMUTa4mMMGso7LEpJUe9ymqDlkI+LH99ur3f3bbel5mul55QAGUPhcWgl/ONRekL+PwV 3BvmxJixyKduMKdD/fdvKNqo38Hb/WeQpDG3UJozSzcJ7Qf7KBmLL9R5ljuTC3eKmceK fyJONdak3EMU23TMiBslV4uIyJbExCa0oJIxfKOKlmx7e99btj8vTPuOQ5/lenR8OgDc HU1eKC0zO0IC8y/MD3RueO6KGr0mXr+3rTANpOigJLf1XjLcOmFH7Po2r+gtSsuMWbDH p6Wg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=FHS4xwDjkiA0w7wmXV8oTrtUiAVe60d4UjcHzqznohk=; b=vhxdiYphgv1T2dKeoP1OC3Gwvy6Rtk/b/fjjYKTjdDyCaLZika2EWzPOvzER1ceDvx tVop0+rVMEjPYXhsg5CBFEdGBC0OpkFU5LvfU+d3XPfYENwY3HsHeSyZpSeooGIk3sXr ZbNN2kKidtwjsrdLsUvQnAYrHwHZRj1C91Qbamjfo3W0NdESyUsVEEzs7vC47M+BMuYR boAOpIDW9Igcr21LHBw4OZs9OfRHx2a9H9Ja2YQz1mIl/+PPEk/FRSX+hGwoR32q8tjR Cbn3FeLOLPNhIg1BDkPXrV49Jx06IRYqpB9As4CdqdUaMy8wvm/WyfptMo4MfWKSquh8 xNmg== X-Gm-Message-State: ANoB5plVWW6Bla9U/wuDtPLdvoVl3nKqGHI1PTkWT/O7NFXYMNYTPMaF MFAezCzrBrG313sFH40GvlU= X-Google-Smtp-Source: AA0mqf5b/Gnn4QxNOi6Wr/UKJy8KJUlCLqezaSAdhbXTNpi90xJbNjOwAXkPHMqD4QiKWZIuaEgejQ== X-Received: by 2002:a05:600c:1d14:b0:3cf:925e:198c with SMTP id l20-20020a05600c1d1400b003cf925e198cmr4537645wms.144.1668771126415; Fri, 18 Nov 2022 03:32:06 -0800 (PST) Received: from localhost.localdomain ([95.183.227.98]) by smtp.gmail.com with ESMTPSA id l24-20020a05600c1d1800b003cf878c4468sm9894817wms.5.2022.11.18.03.32.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Nov 2022 03:32:06 -0800 (PST) From: Yassine Oudjana X-Google-Original-From: Yassine Oudjana To: Linus Walleij , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , Sean Wang , Andy Teng , AngeloGioacchino Del Regno Cc: Yassine Oudjana , Yassine Oudjana , linux-mediatek@lists.infradead.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 4/7] arm64: dts: mediatek: mt6797: Make pin configuration nodes follow DT bindings Date: Fri, 18 Nov 2022 14:30:25 +0300 Message-Id: <20221118113028.145348-5-y.oudjana@protonmail.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221118113028.145348-1-y.oudjana@protonmail.com> References: <20221118113028.145348-1-y.oudjana@protonmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org From: Yassine Oudjana Add -pins suffix to pin configuration nodes to follow DT bindings and pass dtbs_check. Signed-off-by: Yassine Oudjana --- arch/arm64/boot/dts/mediatek/mt6797.dtsi | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt6797.dtsi b/arch/arm64/boot/dts/mediatek/mt6797.dtsi index 15616231022a..0c2b477184ae 100644 --- a/arch/arm64/boot/dts/mediatek/mt6797.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt6797.dtsi @@ -135,70 +135,70 @@ pio: pinctrl@10005000 { gpio-controller; #gpio-cells = <2>; - uart0_pins_a: uart0 { + uart0_pins_a: uart0-pins { pins0 { pinmux = , ; }; }; - uart1_pins_a: uart1 { + uart1_pins_a: uart1-pins { pins1 { pinmux = , ; }; }; - i2c0_pins_a: i2c0 { + i2c0_pins_a: i2c0-pins { pins0 { pinmux = , ; }; }; - i2c1_pins_a: i2c1 { + i2c1_pins_a: i2c1-pins { pins1 { pinmux = , ; }; }; - i2c2_pins_a: i2c2 { + i2c2_pins_a: i2c2-pins { pins2 { pinmux = , ; }; }; - i2c3_pins_a: i2c3 { + i2c3_pins_a: i2c3-pins { pins3 { pinmux = , ; }; }; - i2c4_pins_a: i2c4 { + i2c4_pins_a: i2c4-pins { pins4 { pinmux = , ; }; }; - i2c5_pins_a: i2c5 { + i2c5_pins_a: i2c5-pins { pins5 { pinmux = , ; }; }; - i2c6_pins_a: i2c6 { + i2c6_pins_a: i2c6-pins { pins6 { pinmux = , ; }; }; - i2c7_pins_a: i2c7 { + i2c7_pins_a: i2c7-pins { pins7 { pinmux = , ; From patchwork Fri Nov 18 11:30:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yassine Oudjana X-Patchwork-Id: 626463 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6E80AC433FE for ; Fri, 18 Nov 2022 11:32:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241427AbiKRLcl (ORCPT ); Fri, 18 Nov 2022 06:32:41 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33546 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241158AbiKRLcW (ORCPT ); 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Fri, 18 Nov 2022 03:32:08 -0800 (PST) From: Yassine Oudjana X-Google-Original-From: Yassine Oudjana To: Linus Walleij , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , Sean Wang , Andy Teng , AngeloGioacchino Del Regno Cc: Yassine Oudjana , Yassine Oudjana , linux-mediatek@lists.infradead.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Rob Herring Subject: [PATCH v5 5/7] dt-bindings: pinctrl: mediatek,mt6779-pinctrl: Document MT6765 pin controller Date: Fri, 18 Nov 2022 14:30:26 +0300 Message-Id: <20221118113028.145348-6-y.oudjana@protonmail.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221118113028.145348-1-y.oudjana@protonmail.com> References: <20221118113028.145348-1-y.oudjana@protonmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org From: Yassine Oudjana The MT6765 pin controller has had a driver for a while, but DT bindings were never documented for it. Signed-off-by: Yassine Oudjana Reviewed-by: Rob Herring --- .../pinctrl/mediatek,mt6779-pinctrl.yaml | 36 +++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml index f26584af5c8c..c2238a86b7fe 100644 --- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml @@ -18,6 +18,7 @@ description: properties: compatible: enum: + - mediatek,mt6765-pinctrl - mediatek,mt6779-pinctrl - mediatek,mt6795-pinctrl - mediatek,mt6797-pinctrl @@ -59,6 +60,41 @@ required: allOf: - $ref: "pinctrl.yaml#" + - if: + properties: + compatible: + contains: + const: mediatek,mt6765-pinctrl + then: + properties: + reg: + minItems: 9 + maxItems: 9 + + reg-names: + items: + - const: iocfg0 + - const: iocfg1 + - const: iocfg2 + - const: iocfg3 + - const: iocfg4 + - const: iocfg5 + - const: iocfg6 + - const: iocfg7 + - const: eint + + interrupts: + items: + - description: EINT interrupt + + patternProperties: + '-pins$': + patternProperties: + '^pins': + properties: + drive-strength: + enum: [1, 2, 4, 16] + - if: properties: compatible: