From patchwork Fri Nov 18 09:39:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Elder X-Patchwork-Id: 626337 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 36A25C4332F for ; Fri, 18 Nov 2022 09:40:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241979AbiKRJj7 (ORCPT ); Fri, 18 Nov 2022 04:39:59 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49974 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241972AbiKRJjs (ORCPT ); Fri, 18 Nov 2022 04:39:48 -0500 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 531F31EAF3; Fri, 18 Nov 2022 01:39:47 -0800 (PST) Received: from pyrite.tail37cf.ts.net (h175-177-042-159.catv02.itscom.jp [175.177.42.159]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 484DDCCA; Fri, 18 Nov 2022 10:39:42 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1668764385; bh=TOTYXTs+UIhhVvWl1uhtuGwBpzZxOVAtjbKTkfYO3Pw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=a96jV84IdDtcOALucQ0RbqRNa/ChdjdaSRhxhNuYrazOsQ2Nhd7bYUH+a7GquBGnh Uf77vW69Rwwp4qTdWQ3u88WwFQDOMHQ18MiwkpSPYmbd5P8WeXA1JW4WvOz0gR4KjW AbErqD6t1tc++ToZRvsunqazBkk/sozmkGtVBg/o= From: Paul Elder To: linux-media@vger.kernel.org Cc: Paul Elder , Dafna Hirschfeld , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Helen Koike , Laurent Pinchart , linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 01/14] dt-bindings: media: rkisp1: Add i.MX8MP ISP to compatible Date: Fri, 18 Nov 2022 18:39:18 +0900 Message-Id: <20221118093931.1284465-2-paul.elder@ideasonboard.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221118093931.1284465-1-paul.elder@ideasonboard.com> References: <20221118093931.1284465-1-paul.elder@ideasonboard.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The i.MX8MP ISP is compatbile with the rkisp1 driver. Add it to the list of compatible strings. While at it, expand on the description of the clocks to make it clear which clock in the i.MX8MP ISP they map to, based on the names from the datasheet (which are confusing). Signed-off-by: Paul Elder Reviewed-by: Laurent Pinchart --- Documentation/devicetree/bindings/media/rockchip-isp1.yaml | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/media/rockchip-isp1.yaml b/Documentation/devicetree/bindings/media/rockchip-isp1.yaml index b3661d7d4357..95cf945f7ac5 100644 --- a/Documentation/devicetree/bindings/media/rockchip-isp1.yaml +++ b/Documentation/devicetree/bindings/media/rockchip-isp1.yaml @@ -16,6 +16,7 @@ description: | properties: compatible: enum: + - fsl,imx8mp-isp - rockchip,px30-cif-isp - rockchip,rk3399-cif-isp @@ -36,9 +37,9 @@ properties: minItems: 3 items: # isp0 and isp1 - - description: ISP clock - - description: ISP AXI clock - - description: ISP AHB clock + - description: ISP clock (for imx8mp, clk) + - description: ISP AXI clock (for imx8mp, m_hclk) + - description: ISP AHB clock (for imx8mp, hclk) # only for isp1 - description: ISP Pixel clock From patchwork Fri Nov 18 09:39:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Elder X-Patchwork-Id: 626336 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B8E15C4321E for ; Fri, 18 Nov 2022 09:40:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241995AbiKRJkA (ORCPT ); Fri, 18 Nov 2022 04:40:00 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50140 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241776AbiKRJjv (ORCPT ); Fri, 18 Nov 2022 04:39:51 -0500 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EB1A32250D; Fri, 18 Nov 2022 01:39:50 -0800 (PST) Received: from pyrite.tail37cf.ts.net (h175-177-042-159.catv02.itscom.jp [175.177.42.159]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 61A83AF4; Fri, 18 Nov 2022 10:39:46 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1668764389; bh=hmyLpab8VmHMSS3/2OG4UYDiDFK/Q8oMtYRnn8VQ7fg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=OFH1LLo5i4J0HJ5cCTgvvqJeLnrXlevbdDgc3REixGzWWxLVBivl7Z/P5j869ghiO Wvnm97wdehUTHk1oH7sOfSUtszYHMWSh6ZXByrD6LKdgh8U/WXTYAhk3fCNTWu1RUJ PxRCZjAamHACoqCr3R0kABiAeEvaivPfphp+T5xk= From: Paul Elder To: linux-media@vger.kernel.org Cc: Laurent Pinchart , Dafna Hirschfeld , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Helen Koike , linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 02/14] dt-bindings: media: rkisp1: Add i.MX8MP ISP example Date: Fri, 18 Nov 2022 18:39:19 +0900 Message-Id: <20221118093931.1284465-3-paul.elder@ideasonboard.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221118093931.1284465-1-paul.elder@ideasonboard.com> References: <20221118093931.1284465-1-paul.elder@ideasonboard.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Laurent Pinchart Add an example to the rockchip-isp1 DT binding that showcases usage of the parallel input of the ISP, connected to the CSI-2 receiver internal to the i.MX8MP. Signed-off-by: Laurent Pinchart --- .../bindings/media/rockchip-isp1.yaml | 72 +++++++++++++++++++ 1 file changed, 72 insertions(+) diff --git a/Documentation/devicetree/bindings/media/rockchip-isp1.yaml b/Documentation/devicetree/bindings/media/rockchip-isp1.yaml index 95cf945f7ac5..88d9bc378f79 100644 --- a/Documentation/devicetree/bindings/media/rockchip-isp1.yaml +++ b/Documentation/devicetree/bindings/media/rockchip-isp1.yaml @@ -285,3 +285,75 @@ examples: }; }; }; + + - | + #include + #include + #include + #include + + parent2: parent { + #address-cells = <1>; + #size-cells = <1>; + + isp@32e10000 { + compatible = "fsl,imx8mp-isp"; + reg = <0x32e10000 0x10000>; + interrupts = ; + clocks = <&clk IMX8MP_CLK_MEDIA_ISP_ROOT>, + <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>, + <&clk IMX8MP_CLK_MEDIA_APB_ROOT>; + clock-names = "isp", "hclk", "aclk"; + assigned-clocks = <&clk IMX8MP_CLK_MEDIA_ISP>; + assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>; + assigned-clock-rates = <500000000>; + power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_ISP>; + fsl,blk-ctrl = <&media_blk_ctrl 0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + isp0_in: endpoint { + bus-type = ; + remote-endpoint = <&mipi_csi_0_out>; + }; + }; + }; + }; + + csi@32e40000 { + compatible = "fsl,imx8mp-mipi-csi2", "fsl,imx8mm-mipi-csi2"; + reg = <0x32e40000 0x10000>; + interrupts = ; + clock-frequency = <500000000>; + clocks = <&clk IMX8MP_CLK_MEDIA_APB_ROOT>, + <&clk IMX8MP_CLK_MEDIA_CAM1_PIX_ROOT>, + <&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF_ROOT>, + <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>; + clock-names = "pclk", "wrap", "phy", "axi"; + assigned-clocks = <&clk IMX8MP_CLK_MEDIA_CAM1_PIX>; + assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>; + assigned-clock-rates = <500000000>; + power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_MIPI_CSI2_1>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + }; + + port@1 { + reg = <1>; + mipi_csi_0_out: endpoint { + remote-endpoint = <&isp0_in>; + }; + }; + }; + }; + }; +... From patchwork Fri Nov 18 09:39:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Elder X-Patchwork-Id: 626335 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 646D4C433FE for ; Fri, 18 Nov 2022 09:40:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242021AbiKRJkV (ORCPT ); Fri, 18 Nov 2022 04:40:21 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51102 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242006AbiKRJkL (ORCPT ); Fri, 18 Nov 2022 04:40:11 -0500 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [IPv6:2001:4b98:dc2:55:216:3eff:fef7:d647]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 84FAA4AF16; Fri, 18 Nov 2022 01:40:03 -0800 (PST) Received: from pyrite.tail37cf.ts.net (h175-177-042-159.catv02.itscom.jp [175.177.42.159]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id EA73BCCA; Fri, 18 Nov 2022 10:39:58 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1668764402; bh=HsmzzNy9bNbCe7hoI+/Bj6bzVvdd9lHy6nSs+THn7Ck=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=EO0/XrpNOAIwtmkdmi5JvwvMfsCeecpWtegG+3FDMI0Pnt+OeJxYpS66u/K8fR3nk JJfx1pP0gaoqi4HPX4GC/NlxtvIkcMRybYA4wGfVje3JwWhB65mDxGIq41ieESOZcs +GbRYq6AFKVO5pWp7bv7H4pcBHTrqNppqmMlFwuk= From: Paul Elder To: linux-media@vger.kernel.org Cc: Laurent Pinchart , Dafna Hirschfeld , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Helen Koike , linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 05/14] media: rkisp1: Configure gasket on i.MX8MP Date: Fri, 18 Nov 2022 18:39:22 +0900 Message-Id: <20221118093931.1284465-6-paul.elder@ideasonboard.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221118093931.1284465-1-paul.elder@ideasonboard.com> References: <20221118093931.1284465-1-paul.elder@ideasonboard.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Laurent Pinchart The i.MX8MP has a gasket between the CSI-2 receiver and the ISP. Configure and enable it when starting the ISP, and disable it when stopping. Signed-off-by: Laurent Pinchart --- .../platform/rockchip/rkisp1/rkisp1-common.h | 5 + .../platform/rockchip/rkisp1/rkisp1-dev.c | 16 +++ .../platform/rockchip/rkisp1/rkisp1-isp.c | 128 +++++++++++++++++- 3 files changed, 147 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h b/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h index fc33c185b99f..1f9f373aa2a5 100644 --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h @@ -24,6 +24,7 @@ #include "rkisp1-regs.h" struct dentry; +struct regmap; /* * flags on the 'direction' field in struct rkisp1_mbus_info' that indicate @@ -448,6 +449,8 @@ struct rkisp1_debug { * @dev: a pointer to the struct device * @clk_size: number of clocks * @clks: array of clocks + * @gasket: the gasket - i.MX8MP only + * @gasket_id: the gasket ID (0 or 1) - i.MX8MP only * @v4l2_dev: v4l2_device variable * @media_dev: media_device variable * @notifier: a notifier to register on the v4l2-async API to be notified on the sensor @@ -468,6 +471,8 @@ struct rkisp1_device { struct device *dev; unsigned int clk_size; struct clk_bulk_data clks[RKISP1_MAX_BUS_CLK]; + struct regmap *gasket; + unsigned int gasket_id; struct v4l2_device v4l2_dev; struct media_device media_dev; struct v4l2_async_notifier notifier; diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-dev.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-dev.c index 69464ce91d59..245caf1725aa 100644 --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-dev.c +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-dev.c @@ -10,6 +10,7 @@ #include #include +#include #include #include #include @@ -579,6 +580,21 @@ static int rkisp1_probe(struct platform_device *pdev) return ret; rkisp1->clk_size = info->clk_size; + if (info->isp_ver == IMX8MP_V10) { + unsigned int id; + + rkisp1->gasket = syscon_regmap_lookup_by_phandle_args(dev->of_node, + "fsl,blk-ctrl", + 1, &id); + if (IS_ERR(rkisp1->gasket)) { + ret = PTR_ERR(rkisp1->gasket); + dev_err(dev, "failed to get gasket: %d\n", ret); + return ret; + } + + rkisp1->gasket_id = id; + } + pm_runtime_enable(&pdev->dev); ret = pm_runtime_resume_and_get(&pdev->dev); diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c index 585cf3f53469..029191f4338d 100644 --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c @@ -10,6 +10,7 @@ #include #include +#include #include #include @@ -87,6 +88,115 @@ rkisp1_isp_get_pad_crop(struct rkisp1_isp *isp, return v4l2_subdev_get_try_crop(&isp->sd, &state, pad); } +/* ----------------------------------------------------------------------------- + * Media block control (i.MX8MP only) + */ + +#define ISP_DEWARP_CONTROL 0x0138 + +#define ISP_DEWARP_CONTROL_MIPI_CSI2_HS_POLARITY BIT(22) +#define ISP_DEWARP_CONTROL_MIPI_CSI2_VS_SEL_RISING (0 << 20) +#define ISP_DEWARP_CONTROL_MIPI_CSI2_VS_SEL_NEGATIVE (1 << 20) +#define ISP_DEWARP_CONTROL_MIPI_CSI2_VS_SEL_POSITIVE (2 << 20) +#define ISP_DEWARP_CONTROL_MIPI_CSI2_VS_SEL_FALLING (3 << 20) +#define ISP_DEWARP_CONTROL_MIPI_CSI2_VS_SEL_MASK GENMASK(21, 20) +#define ISP_DEWARP_CONTROL_MIPI_ISP2_LEFT_JUST_MODE BIT(19) +#define ISP_DEWARP_CONTROL_MIPI_ISP2_DATA_TYPE(dt) ((dt) << 13) +#define ISP_DEWARP_CONTROL_MIPI_ISP2_DATA_TYPE_MASK GENMASK(18, 13) + +#define ISP_DEWARP_CONTROL_MIPI_CSI1_HS_POLARITY BIT(12) +#define ISP_DEWARP_CONTROL_MIPI_CSI1_VS_SEL_RISING (0 << 10) +#define ISP_DEWARP_CONTROL_MIPI_CSI1_VS_SEL_NEGATIVE (1 << 10) +#define ISP_DEWARP_CONTROL_MIPI_CSI1_VS_SEL_POSITIVE (2 << 10) +#define ISP_DEWARP_CONTROL_MIPI_CSI1_VS_SEL_FALLING (3 << 10) +#define ISP_DEWARP_CONTROL_MIPI_CSI1_VS_SEL_MASK GENMASK(11, 10) +#define ISP_DEWARP_CONTROL_MIPI_ISP1_LEFT_JUST_MODE BIT(9) +#define ISP_DEWARP_CONTROL_MIPI_ISP1_DATA_TYPE(dt) ((dt) << 3) +#define ISP_DEWARP_CONTROL_MIPI_ISP1_DATA_TYPE_MASK GENMASK(8, 3) + +#define ISP_DEWARP_CONTROL_GPR_ISP_1_DISABLE BIT(1) +#define ISP_DEWARP_CONTROL_GPR_ISP_0_DISABLE BIT(0) + +static int rkisp1_gasket_enable(struct rkisp1_device *rkisp1, + struct media_pad *source) +{ + struct v4l2_subdev *source_sd; + struct v4l2_mbus_frame_desc fd; + unsigned int dt; + u32 mask; + u32 val; + int ret; + + /* + * Configure and enable the gasket with the CSI-2 data type. Set the + * vsync polarity as active high, as that is what the ISP is configured + * to expect in ISP_ACQ_PROP. Enable left justification, as the i.MX8MP + * ISP has a 16-bit wide input and expects data to be left-aligned. + */ + + source_sd = media_entity_to_v4l2_subdev(source->entity); + ret = v4l2_subdev_call(source_sd, pad, get_frame_desc, + source->index, &fd); + if (ret) { + dev_err(rkisp1->dev, + "failed to get frame descriptor from '%s':%u: %d\n", + source_sd->name, 0, ret); + return ret; + } + + if (fd.num_entries != 1) { + dev_err(rkisp1->dev, "invalid frame descriptor for '%s':%u\n", + source_sd->name, 0); + return -EINVAL; + } + + dt = fd.entry[0].bus.csi2.dt; + + if (rkisp1->gasket_id == 0) { + mask = ISP_DEWARP_CONTROL_MIPI_CSI1_HS_POLARITY + | ISP_DEWARP_CONTROL_MIPI_CSI1_VS_SEL_MASK + | ISP_DEWARP_CONTROL_MIPI_ISP1_LEFT_JUST_MODE + | ISP_DEWARP_CONTROL_MIPI_ISP1_DATA_TYPE_MASK + | ISP_DEWARP_CONTROL_GPR_ISP_0_DISABLE; + val = ISP_DEWARP_CONTROL_MIPI_CSI1_VS_SEL_POSITIVE + | ISP_DEWARP_CONTROL_MIPI_ISP1_LEFT_JUST_MODE + | ISP_DEWARP_CONTROL_MIPI_ISP1_DATA_TYPE(dt); + } else { + mask = ISP_DEWARP_CONTROL_MIPI_CSI2_HS_POLARITY + | ISP_DEWARP_CONTROL_MIPI_CSI2_VS_SEL_MASK + | ISP_DEWARP_CONTROL_MIPI_ISP2_LEFT_JUST_MODE + | ISP_DEWARP_CONTROL_MIPI_ISP2_DATA_TYPE_MASK + | ISP_DEWARP_CONTROL_GPR_ISP_1_DISABLE; + val = ISP_DEWARP_CONTROL_MIPI_CSI2_VS_SEL_POSITIVE + | ISP_DEWARP_CONTROL_MIPI_ISP2_LEFT_JUST_MODE + | ISP_DEWARP_CONTROL_MIPI_ISP2_DATA_TYPE(dt); + } + + regmap_update_bits(rkisp1->gasket, ISP_DEWARP_CONTROL, mask, val); + + return 0; +} + +static void rkisp1_gasket_disable(struct rkisp1_device *rkisp1) +{ + u32 mask; + u32 val; + + if (rkisp1->gasket_id == 1) { + mask = ISP_DEWARP_CONTROL_MIPI_ISP2_LEFT_JUST_MODE + | ISP_DEWARP_CONTROL_MIPI_ISP2_DATA_TYPE_MASK + | ISP_DEWARP_CONTROL_GPR_ISP_1_DISABLE; + val = ISP_DEWARP_CONTROL_GPR_ISP_1_DISABLE; + } else { + mask = ISP_DEWARP_CONTROL_MIPI_ISP1_LEFT_JUST_MODE + | ISP_DEWARP_CONTROL_MIPI_ISP1_DATA_TYPE_MASK + | ISP_DEWARP_CONTROL_GPR_ISP_0_DISABLE; + val = ISP_DEWARP_CONTROL_GPR_ISP_0_DISABLE; + } + + regmap_update_bits(rkisp1->gasket, ISP_DEWARP_CONTROL, mask, val); +} + /* ---------------------------------------------------------------------------- * Camera Interface registers configurations */ @@ -304,6 +414,9 @@ static void rkisp1_isp_stop(struct rkisp1_isp *isp) RKISP1_CIF_VI_IRCL_MIPI_SW_RST | RKISP1_CIF_VI_IRCL_ISP_SW_RST); rkisp1_write(rkisp1, RKISP1_CIF_VI_IRCL, 0x0); + + if (rkisp1->info->isp_ver == IMX8MP_V10) + rkisp1_gasket_disable(rkisp1); } static void rkisp1_config_clk(struct rkisp1_isp *isp) @@ -328,13 +441,20 @@ static void rkisp1_config_clk(struct rkisp1_isp *isp) } } -static void rkisp1_isp_start(struct rkisp1_isp *isp) +static int rkisp1_isp_start(struct rkisp1_isp *isp, struct media_pad *source) { struct rkisp1_device *rkisp1 = isp->rkisp1; u32 val; + int ret; rkisp1_config_clk(isp); + if (rkisp1->info->isp_ver == IMX8MP_V10) { + ret = rkisp1_gasket_enable(rkisp1, source); + if (ret) + return ret; + } + /* Activate ISP */ val = rkisp1_read(rkisp1, RKISP1_CIF_ISP_CTRL); val |= RKISP1_CIF_ISP_CTRL_ISP_CFG_UPD | @@ -344,6 +464,8 @@ static void rkisp1_isp_start(struct rkisp1_isp *isp) if (isp->src_fmt->pixel_enc != V4L2_PIXEL_ENC_BAYER) rkisp1_params_post_configure(&rkisp1->params); + + return 0; } /* ---------------------------------------------------------------------------- @@ -882,7 +1004,9 @@ static int rkisp1_isp_s_stream(struct v4l2_subdev *sd, int enable) if (ret) goto mutex_unlock; - rkisp1_isp_start(isp); + ret = rkisp1_isp_start(isp, source_pad); + if (ret) + goto mutex_unlock; ret = v4l2_subdev_call(rkisp1->source, video, s_stream, true); if (ret) { From patchwork Fri Nov 18 09:39:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Elder X-Patchwork-Id: 626334 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5FAE7C4332F for ; Fri, 18 Nov 2022 09:40:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241256AbiKRJkx (ORCPT ); Fri, 18 Nov 2022 04:40:53 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51386 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242056AbiKRJk3 (ORCPT ); Fri, 18 Nov 2022 04:40:29 -0500 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BE9BF9B3AC; Fri, 18 Nov 2022 01:40:11 -0800 (PST) Received: from pyrite.tail37cf.ts.net (h175-177-042-159.catv02.itscom.jp [175.177.42.159]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id EDB8CD86; Fri, 18 Nov 2022 10:40:06 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1668764410; bh=jLWKPDvahA72+6my7QI+4fN+/6XCNTeixQVAgTHpBm0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=c0R+RN5nydfIE6XpLjo0EF88+omALvuOIrLNjfPrAvFlo58nlUHyVLoax5OW9GQ0b H5I9S3goFd3N0+JgXl425lqX22Z8+v+e1OIKrFAn+tAXVkMK2Gh0F/yPFpDqkmsmxE +kB/3zi9UdzM+oOp3Kqgu1JVEdyWpGAnGe5GvkVw= From: Paul Elder To: linux-media@vger.kernel.org Cc: Paul Elder , Dafna Hirschfeld , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Helen Koike , Laurent Pinchart , linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 07/14] media: rkisp1: Add and set registers for output size config on i.MX8MP Date: Fri, 18 Nov 2022 18:39:24 +0900 Message-Id: <20221118093931.1284465-8-paul.elder@ideasonboard.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221118093931.1284465-1-paul.elder@ideasonboard.com> References: <20221118093931.1284465-1-paul.elder@ideasonboard.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The ISP version in the i.MX8MP has a set of registers currently not handled by the driver for output size configuration. Add a feature flag to determine if the ISP requires this, and set the registers based on that. Signed-off-by: Laurent Pinchart Signed-off-by: Paul Elder Reviewed-by: Laurent Pinchart --- Changes since v2: - Document the RKISP1_FEATURE_MAIN_STRIDE bit - Use the rkisp1_has_feature() macro --- drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c | 8 ++++++++ drivers/media/platform/rockchip/rkisp1/rkisp1-common.h | 2 ++ drivers/media/platform/rockchip/rkisp1/rkisp1-dev.c | 3 ++- drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h | 9 +++++++++ 4 files changed, 21 insertions(+), 1 deletion(-) diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c index d4540684ea9a..5c6299ab0f78 100644 --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c @@ -420,6 +420,14 @@ static void rkisp1_mp_config(struct rkisp1_capture *cap) rkisp1_write(rkisp1, cap->config->mi.cr_size_init, rkisp1_pixfmt_comp_size(pixm, RKISP1_PLANE_CR)); + if (rkisp1_has_feature(rkisp1, MAIN_STRIDE)) { + rkisp1_write(rkisp1, RKISP1_CIF_MI_MP_Y_LLENGTH, pixm->width); + rkisp1_write(rkisp1, RKISP1_CIF_MI_MP_Y_PIC_WIDTH, pixm->width); + rkisp1_write(rkisp1, RKISP1_CIF_MI_MP_Y_PIC_HEIGHT, pixm->height); + rkisp1_write(rkisp1, RKISP1_CIF_MI_MP_Y_PIC_SIZE, + pixm->width * pixm->height); + } + rkisp1_irq_frame_end_enable(cap); /* set uv swapping for semiplanar formats */ diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h b/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h index d8851dca026f..047c670b2310 100644 --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h @@ -105,6 +105,7 @@ enum rkisp1_isp_pad { * @RKISP1_FEATURE_MIPI_CSI2: The ISP has an internal MIPI CSI-2 receiver * @RKISP1_FEATURE_DUAL_CROP: The ISP has the dual crop block at the resizer input * @RKISP1_FEATURE_RSZ_CROP: The ISP supports cropping in the resizer + * @RKISP1_FEATURE_MAIN_STRIDE: The ISP supports configurable stride on the main path * * The ISP features are stored in a bitmask in &rkisp1_info.features and allow * the driver to implement support for features present in some ISP versions @@ -114,6 +115,7 @@ enum rkisp1_feature { RKISP1_FEATURE_MIPI_CSI2 = BIT(0), RKISP1_FEATURE_DUAL_CROP = BIT(1), RKISP1_FEATURE_RSZ_CROP = BIT(2), + RKISP1_FEATURE_MAIN_STRIDE = BIT(3), }; #define rkisp1_has_feature(rkisp1, feature) \ diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-dev.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-dev.c index 4fca4db091c8..1a3ea5a4af05 100644 --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-dev.c +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-dev.c @@ -515,7 +515,8 @@ static const struct rkisp1_info imx8mp_isp_info = { .isrs = imx8mp_isp_isrs, .isr_size = ARRAY_SIZE(imx8mp_isp_isrs), .isp_ver = IMX8MP_V10, - .features = RKISP1_FEATURE_RSZ_CROP, + .features = RKISP1_FEATURE_RSZ_CROP + | RKISP1_FEATURE_MAIN_STRIDE, }; static const struct of_device_id rkisp1_of_match[] = { diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h b/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h index cd6ce66945c4..ed34c752be99 100644 --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h @@ -1012,6 +1012,15 @@ #define RKISP1_CIF_MI_SP_CB_BASE_AD_INIT2 (RKISP1_CIF_MI_BASE + 0x00000140) #define RKISP1_CIF_MI_SP_CR_BASE_AD_INIT2 (RKISP1_CIF_MI_BASE + 0x00000144) #define RKISP1_CIF_MI_XTD_FORMAT_CTRL (RKISP1_CIF_MI_BASE + 0x00000148) +#define RKISP1_CIF_MI_MP_HANDSHAKE_0 (RKISP1_CIF_MI_BASE + 0x0000014C) +#define RKISP1_CIF_MI_MP_Y_LLENGTH (RKISP1_CIF_MI_BASE + 0x00000150) +#define RKISP1_CIF_MI_MP_Y_SLICE_OFFSET (RKISP1_CIF_MI_BASE + 0x00000154) +#define RKISP1_CIF_MI_MP_C_SLICE_OFFSET (RKISP1_CIF_MI_BASE + 0x00000158) +#define RKISP1_CIF_MI_OUTPUT_ALIGN_FORMAT (RKISP1_CIF_MI_BASE + 0x0000015C) +#define RKISP1_CIF_MI_MP_OUTPUT_FIFO_SIZE (RKISP1_CIF_MI_BASE + 0x00000160) +#define RKISP1_CIF_MI_MP_Y_PIC_WIDTH (RKISP1_CIF_MI_BASE + 0x00000164) +#define RKISP1_CIF_MI_MP_Y_PIC_HEIGHT (RKISP1_CIF_MI_BASE + 0x00000168) +#define RKISP1_CIF_MI_MP_Y_PIC_SIZE (RKISP1_CIF_MI_BASE + 0x0000016C) #define RKISP1_CIF_SMIA_BASE 0x00001A00 #define RKISP1_CIF_SMIA_CTRL (RKISP1_CIF_SMIA_BASE + 0x00000000) From patchwork Fri Nov 18 09:39:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Elder X-Patchwork-Id: 626333 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 84BC5C433FE for ; Fri, 18 Nov 2022 09:41:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242051AbiKRJlY (ORCPT ); Fri, 18 Nov 2022 04:41:24 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51234 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242050AbiKRJkr (ORCPT ); Fri, 18 Nov 2022 04:40:47 -0500 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EBAFEAF083; Fri, 18 Nov 2022 01:40:19 -0800 (PST) Received: from pyrite.tail37cf.ts.net (h175-177-042-159.catv02.itscom.jp [175.177.42.159]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 29F56CCA; Fri, 18 Nov 2022 10:40:14 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1668764418; bh=OZe8UzP1r/amDLtuf66g7oEGb1GwTcdAztGXNR0jAS0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=XWbzAD1rNrp930cOMVq6fDRgkLBQT7pXm8hMF9nzZUVIoF+Knoyq/UO8xy/96qFbW A6E7QP6IfZ4vOuc/o+YRv2FCAo7T1kmamQ8C5X1+sfQ7Yi5y98ddgFpgwLPDyVx8wG sOfYgMqPcQNjCv9tehnZzmhA3D6argoi41u2qo3A= From: Paul Elder To: linux-media@vger.kernel.org Cc: Paul Elder , Dafna Hirschfeld , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Helen Koike , Laurent Pinchart , linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 09/14] media: rkisp1: Shift DMA buffer addresses on i.MX8MP Date: Fri, 18 Nov 2022 18:39:26 +0900 Message-Id: <20221118093931.1284465-10-paul.elder@ideasonboard.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221118093931.1284465-1-paul.elder@ideasonboard.com> References: <20221118093931.1284465-1-paul.elder@ideasonboard.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On the ISP that is integrated in the i.MX8MP, DMA addresses have been extended to 34 bits, with the 32 MSBs stored in the DMA address registers and the 2 LSBs set to 0. Shift the buffer addresses right by 2 on that platform. Signed-off-by: Paul Elder Reviewed-by: Laurent Pinchart --- Changes since v2: - Document the RKISP1_FEATURE_DMA_34BIT bit - Use the rkisp1_has_feature() macro --- .../platform/rockchip/rkisp1/rkisp1-capture.c | 18 ++++++++++-------- .../platform/rockchip/rkisp1/rkisp1-common.h | 2 ++ .../platform/rockchip/rkisp1/rkisp1-dev.c | 3 ++- 3 files changed, 14 insertions(+), 9 deletions(-) diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c index 5c6299ab0f78..55e863b762e6 100644 --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c @@ -624,6 +624,8 @@ static void rkisp1_dummy_buf_destroy(struct rkisp1_capture *cap) static void rkisp1_set_next_buf(struct rkisp1_capture *cap) { + u8 shift = rkisp1_has_feature(cap->rkisp1, DMA_34BIT) ? 2 : 0; + cap->buf.curr = cap->buf.next; cap->buf.next = NULL; @@ -636,7 +638,7 @@ static void rkisp1_set_next_buf(struct rkisp1_capture *cap) buff_addr = cap->buf.next->buff_addr; rkisp1_write(cap->rkisp1, cap->config->mi.y_base_ad_init, - buff_addr[RKISP1_PLANE_Y]); + buff_addr[RKISP1_PLANE_Y] >> shift); /* * In order to support grey format we capture * YUV422 planar format from the camera and @@ -645,17 +647,17 @@ static void rkisp1_set_next_buf(struct rkisp1_capture *cap) if (cap->pix.cfg->fourcc == V4L2_PIX_FMT_GREY) { rkisp1_write(cap->rkisp1, cap->config->mi.cb_base_ad_init, - cap->buf.dummy.dma_addr); + cap->buf.dummy.dma_addr >> shift); rkisp1_write(cap->rkisp1, cap->config->mi.cr_base_ad_init, - cap->buf.dummy.dma_addr); + cap->buf.dummy.dma_addr >> shift); } else { rkisp1_write(cap->rkisp1, cap->config->mi.cb_base_ad_init, - buff_addr[RKISP1_PLANE_CB]); + buff_addr[RKISP1_PLANE_CB] >> shift); rkisp1_write(cap->rkisp1, cap->config->mi.cr_base_ad_init, - buff_addr[RKISP1_PLANE_CR]); + buff_addr[RKISP1_PLANE_CR] >> shift); } } else { /* @@ -663,11 +665,11 @@ static void rkisp1_set_next_buf(struct rkisp1_capture *cap) * throw data if there is no available buffer. */ rkisp1_write(cap->rkisp1, cap->config->mi.y_base_ad_init, - cap->buf.dummy.dma_addr); + cap->buf.dummy.dma_addr >> shift); rkisp1_write(cap->rkisp1, cap->config->mi.cb_base_ad_init, - cap->buf.dummy.dma_addr); + cap->buf.dummy.dma_addr >> shift); rkisp1_write(cap->rkisp1, cap->config->mi.cr_base_ad_init, - cap->buf.dummy.dma_addr); + cap->buf.dummy.dma_addr >> shift); } /* Set plane offsets */ diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h b/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h index 047c670b2310..fff5f5264386 100644 --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h @@ -106,6 +106,7 @@ enum rkisp1_isp_pad { * @RKISP1_FEATURE_DUAL_CROP: The ISP has the dual crop block at the resizer input * @RKISP1_FEATURE_RSZ_CROP: The ISP supports cropping in the resizer * @RKISP1_FEATURE_MAIN_STRIDE: The ISP supports configurable stride on the main path + * @RKISP1_FEATURE_DMA_34BIT: The ISP uses 34-bit DMA addresses * * The ISP features are stored in a bitmask in &rkisp1_info.features and allow * the driver to implement support for features present in some ISP versions @@ -116,6 +117,7 @@ enum rkisp1_feature { RKISP1_FEATURE_DUAL_CROP = BIT(1), RKISP1_FEATURE_RSZ_CROP = BIT(2), RKISP1_FEATURE_MAIN_STRIDE = BIT(3), + RKISP1_FEATURE_DMA_34BIT = BIT(4), }; #define rkisp1_has_feature(rkisp1, feature) \ diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-dev.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-dev.c index 1a3ea5a4af05..2b13962c5c32 100644 --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-dev.c +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-dev.c @@ -516,7 +516,8 @@ static const struct rkisp1_info imx8mp_isp_info = { .isr_size = ARRAY_SIZE(imx8mp_isp_isrs), .isp_ver = IMX8MP_V10, .features = RKISP1_FEATURE_RSZ_CROP - | RKISP1_FEATURE_MAIN_STRIDE, + | RKISP1_FEATURE_MAIN_STRIDE + | RKISP1_FEATURE_DMA_34BIT, }; static const struct of_device_id rkisp1_of_match[] = { From patchwork Fri Nov 18 09:39:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Elder X-Patchwork-Id: 626332 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6461BC4332F for ; Fri, 18 Nov 2022 09:41:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241047AbiKRJlh (ORCPT ); Fri, 18 Nov 2022 04:41:37 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51810 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241181AbiKRJlE (ORCPT ); Fri, 18 Nov 2022 04:41:04 -0500 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8B686AF0B5; Fri, 18 Nov 2022 01:40:28 -0800 (PST) Received: from pyrite.tail37cf.ts.net (h175-177-042-159.catv02.itscom.jp [175.177.42.159]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 61CC2AF4; Fri, 18 Nov 2022 10:40:23 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1668764426; bh=vlEilDeP7g2oe4aEgGhDQ1m7gktQ5G5WmhU4D0o/ZZQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=XHcMnQwcYOPjqNZBAI4J5h+rOLFK64/beAnKmkc1cjGUVp5x7RjtOabSkYUgsKCEZ 0pI7HICfgST8A/JdQbyvt69ijNWxi9I4FGbghQmvUyj++JKL+8ddGLFRo0U2gHbbfR 04e6qigu/TtixoBKcTiVU3VDuCqbF480dKK/mXKo= From: Paul Elder To: linux-media@vger.kernel.org Cc: Paul Elder , Dafna Hirschfeld , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Helen Koike , Laurent Pinchart , linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 11/14] media: rkisp1: Fix RSZ_CTRL bits for i.MX8MP Date: Fri, 18 Nov 2022 18:39:28 +0900 Message-Id: <20221118093931.1284465-12-paul.elder@ideasonboard.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221118093931.1284465-1-paul.elder@ideasonboard.com> References: <20221118093931.1284465-1-paul.elder@ideasonboard.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The ISP that is integrated in the i.MX8MP supports cropping, which results in a different RSZ_CTRL register layout compared to the RK3399. Add new definitions for these bits, and use them when the RKISP1_FEATURE_RSZ_CROP feature is set. Signed-off-by: Paul Elder --- Changes since v2: - Condition on RKISP1_FEATURE_RSZ_CROP feature - Rename bits - Use the rkisp1_has_feature() macro --- drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h | 5 +++++ .../media/platform/rockchip/rkisp1/rkisp1-resizer.c | 10 ++++++++-- 2 files changed, 13 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h b/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h index 3dd1bfec288f..39b2ac58196e 100644 --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h @@ -168,6 +168,11 @@ #define RKISP1_CIF_RSZ_CTRL_CFG_UPD_AUTO BIT(9) #define RKISP1_CIF_RSZ_SCALER_FACTOR BIT(16) +/* For resizer instances that support cropping */ +#define RKISP1_CIF_RSZ_CTRL_CROP_ENABLE BIT(8) +#define RKISP1_CIF_RSZ_CTRL_CROP_CFG_UPD BIT(9) +#define RKISP1_CIF_RSZ_CTRL_CROP_CFG_UPD_AUTO BIT(10) + /* RSZ_CROP_[XY]_DIR */ #define RKISP1_CIF_RSZ_CROP_XY_DIR(start, end) ((end) << 16 | (start) << 0) diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c index cefc3cfb733c..7ff7b608fc3f 100644 --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c @@ -209,9 +209,15 @@ static void rkisp1_rsz_update_shadow(struct rkisp1_resizer *rsz, u32 ctrl_cfg = rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_CTRL); if (when == RKISP1_SHADOW_REGS_ASYNC) - ctrl_cfg |= RKISP1_CIF_RSZ_CTRL_CFG_UPD_AUTO; + if (rkisp1_has_feature(rsz->rkisp1, RSZ_CROP)) + ctrl_cfg |= RKISP1_CIF_RSZ_CTRL_CROP_CFG_UPD_AUTO; + else + ctrl_cfg |= RKISP1_CIF_RSZ_CTRL_CFG_UPD_AUTO; else - ctrl_cfg |= RKISP1_CIF_RSZ_CTRL_CFG_UPD; + if (rkisp1_has_feature(rsz->rkisp1, RSZ_CROP)) + ctrl_cfg |= RKISP1_CIF_RSZ_CTRL_CROP_CFG_UPD; + else + ctrl_cfg |= RKISP1_CIF_RSZ_CTRL_CFG_UPD; rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_CTRL, ctrl_cfg); } From patchwork Fri Nov 18 09:39:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Elder X-Patchwork-Id: 626331 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 010D1C43217 for ; Fri, 18 Nov 2022 09:42:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233315AbiKRJmQ (ORCPT ); Fri, 18 Nov 2022 04:42:16 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51604 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241107AbiKRJl0 (ORCPT ); Fri, 18 Nov 2022 04:41:26 -0500 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 83DB997089; Fri, 18 Nov 2022 01:40:40 -0800 (PST) Received: from pyrite.tail37cf.ts.net (h175-177-042-159.catv02.itscom.jp [175.177.42.159]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id B79A8CE1; Fri, 18 Nov 2022 10:40:35 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1668764439; bh=rsTVUhZ7ZI6UsQMfahLSuxDlhDEF5B7vCEr3t98B15M=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=BPWRwwZkjC9FzC+D3DSeZl54u6MeB1z2XeCJFsY2ndTK8H+9+X2beUZESLC/LkFiT z+G0NshynQOO6YZZQKpi6YgMG51M6YnN9ac94/xCHe3t5dmmnhhra/nsrDBrwxpHDd SX+nixP1/dIw/u9vGWRhmz7zlsyaaMXsK6+kVFKA= From: Paul Elder To: linux-media@vger.kernel.org Cc: Paul Elder , Dafna Hirschfeld , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Helen Koike , Laurent Pinchart , linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 14/14] media: rkisp1: Add UYVY as an output format Date: Fri, 18 Nov 2022 18:39:31 +0900 Message-Id: <20221118093931.1284465-15-paul.elder@ideasonboard.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221118093931.1284465-1-paul.elder@ideasonboard.com> References: <20221118093931.1284465-1-paul.elder@ideasonboard.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add support for UYVY as an output format. The uv_swap bit in the MI_XTD_FORMAT_CTRL register that is used for the NV formats does not work for packed YUV formats. Thus, UYVY support is implemented via byte-swapping. This method clearly does not work for implementing support for YVYU and VYUY. Signed-off-by: Paul Elder Reviewed-by: Laurent Pinchart Signed-off-by: Laurent Pinchart --- .../platform/rockchip/rkisp1/rkisp1-capture.c | 41 +++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c index 29565440b6e7..8a6a5d25a3b8 100644 --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c @@ -97,6 +97,12 @@ static const struct rkisp1_capture_fmt_cfg rkisp1_mp_fmts[] = { .uv_swap = 0, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUVINT, .mbus = MEDIA_BUS_FMT_YUYV8_2X8, + }, { + .fourcc = V4L2_PIX_FMT_UYVY, + .uv_swap = 0, + .yc_swap = 1, + .write_format = RKISP1_MI_CTRL_MP_WRITE_YUVINT, + .mbus = MEDIA_BUS_FMT_YUYV8_2X8, }, { .fourcc = V4L2_PIX_FMT_YUV422P, .uv_swap = 0, @@ -221,6 +227,13 @@ static const struct rkisp1_capture_fmt_cfg rkisp1_sp_fmts[] = { .write_format = RKISP1_MI_CTRL_SP_WRITE_INT, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV422, .mbus = MEDIA_BUS_FMT_YUYV8_2X8, + }, { + .fourcc = V4L2_PIX_FMT_UYVY, + .uv_swap = 0, + .yc_swap = 1, + .write_format = RKISP1_MI_CTRL_SP_WRITE_INT, + .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV422, + .mbus = MEDIA_BUS_FMT_YUYV8_2X8, }, { .fourcc = V4L2_PIX_FMT_YUV422P, .uv_swap = 0, @@ -442,6 +455,20 @@ static void rkisp1_mp_config(struct rkisp1_capture *cap) rkisp1_write(rkisp1, RKISP1_CIF_MI_XTD_FORMAT_CTRL, reg); } + /* + * U/V swapping with the MI_XTD_FORMAT_CTRL register only works for + * NV12/NV21 and NV16/NV61, so instead use byte swap to support UYVY. + * YVYU and VYUY cannot be supported with this method. + */ + if (rkisp1->info->features & RKISP1_FEATURE_MI_OUTPUT_ALIGN) { + reg = rkisp1_read(rkisp1, RKISP1_CIF_MI_OUTPUT_ALIGN_FORMAT); + if (cap->pix.cfg->yc_swap) + reg |= RKISP1_CIF_OUTPUT_ALIGN_FORMAT_MP_BYTE_SWAP_BYTES; + else + reg &= ~RKISP1_CIF_OUTPUT_ALIGN_FORMAT_MP_BYTE_SWAP_BYTES; + rkisp1_write(rkisp1, RKISP1_CIF_MI_OUTPUT_ALIGN_FORMAT, reg); + } + rkisp1_mi_config_ctrl(cap); reg = rkisp1_read(rkisp1, RKISP1_CIF_MI_CTRL); @@ -483,6 +510,20 @@ static void rkisp1_sp_config(struct rkisp1_capture *cap) rkisp1_write(rkisp1, RKISP1_CIF_MI_XTD_FORMAT_CTRL, reg); } + /* + * U/V swapping with the MI_XTD_FORMAT_CTRL register only works for + * NV12/NV21 and NV16/NV61, so instead use byte swap to support UYVY. + * YVYU and VYUY cannot be supported with this method. + */ + if (rkisp1->info->features & RKISP1_FEATURE_MI_OUTPUT_ALIGN) { + reg = rkisp1_read(rkisp1, RKISP1_CIF_MI_OUTPUT_ALIGN_FORMAT); + if (cap->pix.cfg->yc_swap) + reg |= RKISP1_CIF_OUTPUT_ALIGN_FORMAT_SP_BYTE_SWAP_BYTES; + else + reg &= ~RKISP1_CIF_OUTPUT_ALIGN_FORMAT_SP_BYTE_SWAP_BYTES; + rkisp1_write(rkisp1, RKISP1_CIF_MI_OUTPUT_ALIGN_FORMAT, reg); + } + rkisp1_mi_config_ctrl(cap); mi_ctrl = rkisp1_read(rkisp1, RKISP1_CIF_MI_CTRL);