From patchwork Wed Nov 16 10:20:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 625626 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 08B17C433FE for ; Wed, 16 Nov 2022 10:20:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233578AbiKPKUM (ORCPT ); Wed, 16 Nov 2022 05:20:12 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55986 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233319AbiKPKUJ (ORCPT ); Wed, 16 Nov 2022 05:20:09 -0500 Received: from mail-wm1-x332.google.com (mail-wm1-x332.google.com [IPv6:2a00:1450:4864:20::332]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6E69E205C5 for ; Wed, 16 Nov 2022 02:20:08 -0800 (PST) Received: by mail-wm1-x332.google.com with SMTP id h186-20020a1c21c3000000b003cfe48519a6so1278129wmh.0 for ; Wed, 16 Nov 2022 02:20:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=abLnCQfmT+XQT6aD06ckoOE5xV2tdrjNEbUU00A7GbU=; b=uS7ki5F34mhuwfL0SfdXPitiKSVZkMAIG7y611sNMJi6qXzh6/BTOuMINJQRLMJIyU QUwLURyU7Vw6Bxo7JaOSPYdBszqOdWabEau/5fZPFDbE5TFXS2ztTF/4RiPI2ohPNQWM jPU6mjdbhRu82oOrRcOB4urwV7n+kdnJozJ2rWBwbEjI7M9gfNt2a7PlHu6GGcXkaS5i 4qNfDomQp8jdSMowJrj6AV08ZsuVjnUYmR+B92OTXFrf0BXnyHBo1YjPK+q9Ohw+fmQu r0Gq2kpd/h9Gk/mHER2m2kOuQ1b56u5xBpsmQBvTxZovoJlWCmnECpJ7OsJwKf/L+157 5PDQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=abLnCQfmT+XQT6aD06ckoOE5xV2tdrjNEbUU00A7GbU=; b=7GWEenuBvaVU/K0l/rYaZN8uioUuiVu42MXzihIxNQiNXv53ca2PYJbs4St9AzE6Qn 1JPjgFP6DgzVXH4jWFPqpV4lrM4D3+Pg0BVb8YhSjRWc09TAlr3s2BTefrONnZIn2+t7 hPfR360MFbwoHge8xE3g5j68SZllBsSvGiHizSXN8WjYY2NDN/HCMM1ZkTIqtUCRCMPb LfUbIRnPhepoevnsscqu1YWcM0bSb/s74mFbwgcFnCcaez9Fkk3kM77jEz1OeChWDDnP BockpVdGMtYc6wN7M+zlB76QThV1usio2Bs3db6CHivQ6j9wWOe4IOWMTsu7/aSMLF0F QXig== X-Gm-Message-State: ANoB5pm68/l6S4X7cEtl2Au81Vfx3RVrHY7Plb8ktOvBrbEu9Mp0ZXfy m7YZP+4W7QV5z6uTro4nIEg3DA== X-Google-Smtp-Source: AA0mqf5gF84ZE8euD1zwPwjPj7xUiFfdK2JpKCMpW1Ikx2XVN8KYsocbCrdhtuQEUP6hNGg1Fmiswg== X-Received: by 2002:a05:600c:524a:b0:3cf:6a41:9aec with SMTP id fc10-20020a05600c524a00b003cf6a419aecmr1644226wmb.159.1668594006964; Wed, 16 Nov 2022 02:20:06 -0800 (PST) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:52eb:f6ff:feb3:451a]) by smtp.gmail.com with ESMTPSA id l18-20020a05600c4f1200b003c6f3f6675bsm1709900wmq.26.2022.11.16.02.20.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Nov 2022 02:20:06 -0800 (PST) From: Neil Armstrong Date: Wed, 16 Nov 2022 11:20:04 +0100 Subject: [PATCH 1/4] dt-bindings: remoteproc: qcom: adsp: document sm8550 adsp, cdsp & mpss compatible MIME-Version: 1.0 Message-Id: <20221114-narmstrong-sm8550-upstream-remoteproc-v1-1-104c34cb3b91@linaro.org> References: <20221114-narmstrong-sm8550-upstream-remoteproc-v1-0-104c34cb3b91@linaro.org> In-Reply-To: <20221114-narmstrong-sm8550-upstream-remoteproc-v1-0-104c34cb3b91@linaro.org> To: Krzysztof Kozlowski , Bjorn Andersson , Konrad Dybcio , Andy Gross , Manivannan Sadhasivam , Amol Maheshwari , Srinivas Kandagatla , Rob Herring , Mathieu Poirier Cc: devicetree@vger.kernel.org, Abel Vesa , linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, Neil Armstrong X-Mailer: b4 0.10.1 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This documents the compatible for the component used to boot the aDSP, cDSP and MPSS on the SM8550 SoC. The SM8550 boot process on SM8550 now requires a secondary "Devicetree" firmware to be passed along the main Firmware, and the cDSP a new power domain named "NSP". Signed-off-by: Neil Armstrong --- .../devicetree/bindings/remoteproc/qcom,adsp.yaml | 60 +++++++++++++++++++++- 1 file changed, 59 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml index db9e0f0c2bea..678cb73f10de 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml @@ -55,6 +55,9 @@ properties: - qcom,sm8450-cdsp-pas - qcom,sm8450-mpss-pas - qcom,sm8450-slpi-pas + - qcom,sm8550-adsp-pas + - qcom,sm8550-cdsp-pas + - qcom,sm8550-mpss-pas reg: maxItems: 1 @@ -116,8 +119,13 @@ properties: $ref: /schemas/types.yaml#/definitions/string description: Firmware name for the Hexagon core + qcom,dtb-firmware-name: + $ref: /schemas/types.yaml#/definitions/string + description: Devicetree Firmware name for the Hexagon core + memory-region: - maxItems: 1 + minItems: 1 + maxItems: 2 description: Reference to the reserved-memory for the Hexagon core qcom,qmp: @@ -212,6 +220,9 @@ allOf: - qcom,sm8450-cdsp-pas - qcom,sm8450-slpi-pas - qcom,sm8450-mpss-pas + - qcom,sm8550-adsp-pas + - qcom,sm8550-cdsp-pas + - qcom,sm8550-mpss-pas then: properties: clocks: @@ -327,6 +338,8 @@ allOf: - qcom,sm8450-adsp-pas - qcom,sm8450-cdsp-pas - qcom,sm8450-slpi-pas + - qcom,sm8550-adsp-pas + - qcom,sm8550-cdsp-pas then: properties: interrupts: @@ -347,6 +360,7 @@ allOf: - qcom,sm8150-mpss-pas - qcom,sm8350-mpss-pas - qcom,sm8450-mpss-pas + - qcom,sm8550-mpss-pas then: properties: interrupts: @@ -448,6 +462,7 @@ allOf: - qcom,sm8150-mpss-pas - qcom,sm8350-mpss-pas - qcom,sm8450-mpss-pas + - qcom,sm8550-mpss-pas then: properties: power-domains: @@ -475,6 +490,7 @@ allOf: - qcom,sm8350-slpi-pas - qcom,sm8450-adsp-pas - qcom,sm8450-slpi-pas + - qcom,sm8550-adsp-pas then: properties: power-domains: @@ -504,6 +520,25 @@ allOf: - const: cx - const: mxc + - if: + properties: + compatible: + contains: + enum: + - qcom,sm8550-cdsp-pas + then: + properties: + power-domains: + items: + - description: CX power domain + - description: MXC power domain + - description: NSP power domain + power-domain-names: + items: + - const: cx + - const: mxc + - const: nsp + - if: properties: compatible: @@ -573,6 +608,29 @@ allOf: properties: qcom,qmp: false + - if: + properties: + compatible: + contains: + enum: + - qcom,sm8550-adsp-pas + - qcom,sm8550-cdsp-pas + - qcom,sm8550-mpss-pas + then: + properties: + memory-region: + minItems: 2 + description: + First entry is a phandle for a reserved memory area that holds + the main Firmware for authentication, and second entry a phandle for a + reserved memory area that holds the Devicetree Firmware for authentication. + else: + properties: + qcom,dtb-firmware-name: false + + memory-region: + maxItems: 1 + examples: - | #include From patchwork Wed Nov 16 10:20:06 2022 Content-Type: text/plain; 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Wed, 16 Nov 2022 02:20:08 -0800 (PST) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:52eb:f6ff:feb3:451a]) by smtp.gmail.com with ESMTPSA id l18-20020a05600c4f1200b003c6f3f6675bsm1709900wmq.26.2022.11.16.02.20.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Nov 2022 02:20:08 -0800 (PST) From: Neil Armstrong Date: Wed, 16 Nov 2022 11:20:06 +0100 Subject: [PATCH 3/4] remoteproc: qcom_q6v5_pas: add support for dtb co-firmware loading MIME-Version: 1.0 Message-Id: <20221114-narmstrong-sm8550-upstream-remoteproc-v1-3-104c34cb3b91@linaro.org> References: <20221114-narmstrong-sm8550-upstream-remoteproc-v1-0-104c34cb3b91@linaro.org> In-Reply-To: <20221114-narmstrong-sm8550-upstream-remoteproc-v1-0-104c34cb3b91@linaro.org> To: Krzysztof Kozlowski , Bjorn Andersson , Konrad Dybcio , Andy Gross , Manivannan Sadhasivam , Amol Maheshwari , Srinivas Kandagatla , Rob Herring , Mathieu Poirier Cc: devicetree@vger.kernel.org, Abel Vesa , linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, Neil Armstrong X-Mailer: b4 0.10.1 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Starting from the SM8550 SoC, starting the aDSP, cDSP and MPSS will require loading a separate "Devicetree" firmware. In order to satisfy the load & authentication order required by the SM8550 SoC, the following is implemented: - "Devicetree" firmware request & load in dedicated memory - Q6V5 prepare - Power Domain & Clocks enable - "Devicetree" firmware authentication - Main firmware load in dedicated memory - Main firmware authentication - Q6V5 startup - "Devicetree" firmware metadata release - Main metadata release When booting older platforms, the "Devicetree" steps would be bypassed and the load & authentication order would still be valid. Signed-off-by: Neil Armstrong --- drivers/remoteproc/qcom_q6v5_pas.c | 134 +++++++++++++++++++++++++++++++++---- 1 file changed, 121 insertions(+), 13 deletions(-) diff --git a/drivers/remoteproc/qcom_q6v5_pas.c b/drivers/remoteproc/qcom_q6v5_pas.c index 6afd0941e552..e79a5fcbc986 100644 --- a/drivers/remoteproc/qcom_q6v5_pas.c +++ b/drivers/remoteproc/qcom_q6v5_pas.c @@ -35,7 +35,9 @@ struct adsp_data { int crash_reason_smem; const char *firmware_name; + const char *dtb_firmware_name; int pas_id; + int dtb_pas_id; unsigned int minidump_id; bool has_aggre2_clk; bool auto_boot; @@ -65,20 +67,29 @@ struct qcom_adsp { int proxy_pd_count; + const char *dtb_firmware_name; int pas_id; + int dtb_pas_id; unsigned int minidump_id; int crash_reason_smem; bool has_aggre2_clk; bool decrypt_shutdown; const char *info_name; + const struct firmware *firmware; + const struct firmware *dtb_firmware; + struct completion start_done; struct completion stop_done; phys_addr_t mem_phys; + phys_addr_t dtb_mem_phys; phys_addr_t mem_reloc; + phys_addr_t dtb_mem_reloc; void *mem_region; + void *dtb_mem_region; size_t mem_size; + size_t dtb_mem_size; struct qcom_rproc_glink glink_subdev; struct qcom_rproc_subdev smd_subdev; @@ -86,6 +97,7 @@ struct qcom_adsp { struct qcom_sysmon *sysmon; struct qcom_scm_pas_metadata pas_metadata; + struct qcom_scm_pas_metadata dtb_pas_metadata; }; static void adsp_minidump(struct rproc *rproc) @@ -160,6 +172,8 @@ static int adsp_unprepare(struct rproc *rproc) * here. */ qcom_scm_pas_metadata_release(&adsp->pas_metadata); + if (adsp->dtb_pas_id) + qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata); return 0; } @@ -169,20 +183,40 @@ static int adsp_load(struct rproc *rproc, const struct firmware *fw) struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv; int ret; - ret = qcom_mdt_pas_init(adsp->dev, fw, rproc->firmware, adsp->pas_id, - adsp->mem_phys, &adsp->pas_metadata); - if (ret) - return ret; + /* Store firmware handle to be used in adsp_start() */ + adsp->firmware = fw; - ret = qcom_mdt_load_no_init(adsp->dev, fw, rproc->firmware, adsp->pas_id, - adsp->mem_region, adsp->mem_phys, adsp->mem_size, - &adsp->mem_reloc); - if (ret) - return ret; + if (adsp->dtb_pas_id) { + ret = request_firmware(&adsp->dtb_firmware, adsp->dtb_firmware_name, adsp->dev); + if (ret) { + dev_err(adsp->dev, "request_firmware failed for %s: %d\n", + adsp->dtb_firmware_name, ret); + return ret; + } - qcom_pil_info_store(adsp->info_name, adsp->mem_phys, adsp->mem_size); + ret = qcom_mdt_pas_init(adsp->dev, adsp->dtb_firmware, adsp->dtb_firmware_name, + adsp->dtb_pas_id, adsp->dtb_mem_phys, + &adsp->dtb_pas_metadata); + if (ret) + goto release_dtb_firmware; + + ret = qcom_mdt_load_no_init(adsp->dev, adsp->dtb_firmware, adsp->dtb_firmware_name, + adsp->dtb_pas_id, adsp->dtb_mem_region, + adsp->dtb_mem_phys, adsp->dtb_mem_size, + &adsp->dtb_mem_reloc); + if (ret) + goto release_dtb_metadata; + } return 0; + +release_dtb_metadata: + qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata); + +release_dtb_firmware: + release_firmware(adsp->dtb_firmware); + + return ret; } static int adsp_start(struct rproc *rproc) @@ -218,24 +252,55 @@ static int adsp_start(struct rproc *rproc) goto disable_cx_supply; } + if (adsp->dtb_pas_id) { + ret = qcom_scm_pas_auth_and_reset(adsp->dtb_pas_id); + if (ret) { + dev_err(adsp->dev, + "failed to authenticate dtb image and release reset\n"); + goto disable_px_supply; + } + } + + ret = qcom_mdt_pas_init(adsp->dev, adsp->firmware, rproc->firmware, adsp->pas_id, + adsp->mem_phys, &adsp->pas_metadata); + if (ret) + goto disable_px_supply; + + ret = qcom_mdt_load_no_init(adsp->dev, adsp->firmware, rproc->firmware, adsp->pas_id, + adsp->mem_region, adsp->mem_phys, adsp->mem_size, + &adsp->mem_reloc); + if (ret) + goto release_pas_metadata; + + qcom_pil_info_store(adsp->info_name, adsp->mem_phys, adsp->mem_size); + ret = qcom_scm_pas_auth_and_reset(adsp->pas_id); if (ret) { dev_err(adsp->dev, "failed to authenticate image and release reset\n"); - goto disable_px_supply; + goto release_pas_metadata; } ret = qcom_q6v5_wait_for_start(&adsp->q6v5, msecs_to_jiffies(5000)); if (ret == -ETIMEDOUT) { dev_err(adsp->dev, "start timed out\n"); qcom_scm_pas_shutdown(adsp->pas_id); - goto disable_px_supply; + goto release_pas_metadata; } qcom_scm_pas_metadata_release(&adsp->pas_metadata); + if (adsp->dtb_pas_id) + qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata); + + /* Remove pointer to the loaded firmware, only valid in adsp_load() & adsp_start() */ + adsp->firmware = NULL; return 0; +release_pas_metadata: + qcom_scm_pas_metadata_release(&adsp->pas_metadata); + if (adsp->dtb_pas_id) + qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata); disable_px_supply: if (adsp->px_supply) regulator_disable(adsp->px_supply); @@ -251,6 +316,9 @@ static int adsp_start(struct rproc *rproc) disable_irqs: qcom_q6v5_unprepare(&adsp->q6v5); + /* Remove pointer to the loaded firmware, only valid in adsp_load() & adsp_start() */ + adsp->firmware = NULL; + return ret; } @@ -284,6 +352,12 @@ static int adsp_stop(struct rproc *rproc) if (ret) dev_err(adsp->dev, "failed to shutdown: %d\n", ret); + if (adsp->dtb_pas_id) { + ret = qcom_scm_pas_shutdown(adsp->dtb_pas_id); + if (ret) + dev_err(adsp->dev, "failed to shutdown dtb: %d\n", ret); + } + handover = qcom_q6v5_unprepare(&adsp->q6v5); if (handover) qcom_pas_handover(&adsp->q6v5); @@ -461,6 +535,28 @@ static int adsp_alloc_memory_region(struct qcom_adsp *adsp) return -EBUSY; } + if (!adsp->dtb_pas_id) + return 0; + + node = of_parse_phandle(adsp->dev->of_node, "memory-region", 1); + if (!node) { + dev_err(adsp->dev, "no dtb memory-region specified\n"); + return -EINVAL; + } + + ret = of_address_to_resource(node, 0, &r); + if (ret) + return ret; + + adsp->dtb_mem_phys = adsp->dtb_mem_reloc = r.start; + adsp->dtb_mem_size = resource_size(&r); + adsp->dtb_mem_region = devm_ioremap_wc(adsp->dev, adsp->dtb_mem_phys, adsp->dtb_mem_size); + if (!adsp->dtb_mem_region) { + dev_err(adsp->dev, "unable to map dtb memory region: %pa+%zx\n", + &r.start, adsp->dtb_mem_size); + return -EBUSY; + } + return 0; } @@ -469,7 +565,7 @@ static int adsp_probe(struct platform_device *pdev) const struct adsp_data *desc; struct qcom_adsp *adsp; struct rproc *rproc; - const char *fw_name; + const char *fw_name, *dtb_fw_name = NULL; const struct rproc_ops *ops = &adsp_ops; int ret; @@ -486,6 +582,14 @@ static int adsp_probe(struct platform_device *pdev) if (ret < 0 && ret != -EINVAL) return ret; + if (desc->dtb_firmware_name) { + dtb_fw_name = desc->dtb_firmware_name; + ret = of_property_read_string(pdev->dev.of_node, "qcom,dtb-firmware-name", + &dtb_fw_name); + if (ret < 0 && ret != -EINVAL) + return ret; + } + if (desc->minidump_id) ops = &adsp_minidump_ops; @@ -507,6 +611,10 @@ static int adsp_probe(struct platform_device *pdev) adsp->has_aggre2_clk = desc->has_aggre2_clk; adsp->info_name = desc->sysmon_name; adsp->decrypt_shutdown = desc->decrypt_shutdown; + if (dtb_fw_name) { + adsp->dtb_firmware_name = dtb_fw_name; + adsp->dtb_pas_id = desc->dtb_pas_id; + } platform_set_drvdata(pdev, adsp); ret = device_init_wakeup(adsp->dev, true);