From patchwork Thu Nov 10 15:17:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 623932 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 071B8C43217 for ; Thu, 10 Nov 2022 15:18:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231230AbiKJPR6 (ORCPT ); Thu, 10 Nov 2022 10:17:58 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34824 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231359AbiKJPRz (ORCPT ); Thu, 10 Nov 2022 10:17:55 -0500 Received: from mail-lj1-x22f.google.com (mail-lj1-x22f.google.com [IPv6:2a00:1450:4864:20::22f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 72FC931EC9 for ; Thu, 10 Nov 2022 07:17:51 -0800 (PST) Received: by mail-lj1-x22f.google.com with SMTP id x21so1367244ljg.10 for ; Thu, 10 Nov 2022 07:17:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=jbQznSb+wFqLy2HcBXlIBiqg0pLGuNPn6ZTMMPpMP08=; b=NJZBH+bUTAN6LToP/lQVUOtU6xRnQfGMSENBFt/kJwPlJ6KdryPRcgU/76Dy0p5pJl a9cvkEPin2scdvEY+2QhlW4WZ05lG/y4rPe8NVhVHm8djUOzZzev7iicmDH6RB6S6xnV 65cCN7/LvoINp2MYI7hy9D3AvCPgYn01m7By7F+LdSYPehenrruXyZ2DlCCK/0shgKNu qilIGasMItKDWAkz+PnwK+48jNr1Xf26UDUEQx1LoUNv3pp6F+zrIXuUilam7ejwbOOa ln7ip7h5RBTwg+vAdfDDkvo4HFzRWRavLIS9o4DmZEKvgDmG+0L5ALszzG3sHANTU8KT BNJw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=jbQznSb+wFqLy2HcBXlIBiqg0pLGuNPn6ZTMMPpMP08=; b=4OI67r/Mv8CC7P+171xazClLwCEgTrVFs6ARaUhSNX4AwcM9mLRq+dFNoLqf+e8A7q KO+2iBj3FpxOxF0DUxSfkmw+d9df8wsZ4y5WJW0CDcGopz4nbjm4NmuTToaY4S9WBoPP TfZx+s8gsDfCknI6wOQz5UF+hQsUXOcXR6AqHCYQmGnb7MFRu7hc/2X9Ez4z2MGSzUld qS8epXujAW0d1NmRkVh69JPwk7mHZzorTwxJvK3HOVogLUvEN6Pd6qNsSyoDNUfe8lkZ YAm+h4DuFoeMZONUvMZ/2CXPHXoUyQtLTlRhW2vAqBWqZefEVAS97Ng0k2FzFmVoo7hw GfKw== X-Gm-Message-State: ACrzQf0iDC+o+jXPz+n/QJVJkOrseE74NFczAPQyVJh+Zl/g3ViVGUez Efeyozv2ebZG+yrmCY4JU39lmg== X-Google-Smtp-Source: AMsMyM40MD54Ti3W926Yrdnye+Fcqn5AQBkXm00rZi7PD6JJvmEc8UiE+zZ0P/piCo8AhKh95I9yYA== X-Received: by 2002:a05:651c:50c:b0:277:31b0:8ba3 with SMTP id o12-20020a05651c050c00b0027731b08ba3mr9531076ljp.290.1668093469744; Thu, 10 Nov 2022 07:17:49 -0800 (PST) Received: from eriador.unikie.fi ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id p22-20020a2eb7d6000000b002774e7267a7sm2719591ljo.25.2022.11.10.07.17.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 10 Nov 2022 07:17:49 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski Cc: Philipp Zabel , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org Subject: [PATCH v7 1/4] dt-bindings: phy: qcom, *-qmp-ufs-phy: add clock-cells property Date: Thu, 10 Nov 2022 18:17:45 +0300 Message-Id: <20221110151748.795767-2-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221110151748.795767-1-dmitry.baryshkov@linaro.org> References: <20221110151748.795767-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add #clock-cells property to the QMP UFS PHYs to describe them as clock providers. The QMP PHY provides rx and tx symbol clocks for the GCC. Signed-off-by: Dmitry Baryshkov --- .../devicetree/bindings/phy/qcom,msm8996-qmp-ufs-phy.yaml | 3 +++ .../devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml | 3 +++ 2 files changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-ufs-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-ufs-phy.yaml index be41acbd3b6c..80a5348dbfde 100644 --- a/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-ufs-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-ufs-phy.yaml @@ -75,6 +75,9 @@ patternProperties: minItems: 3 maxItems: 6 + "#clock-cells": + const: 1 + "#phy-cells": const: 0 diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml index dde86a19f792..32ed1886fbae 100644 --- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml @@ -43,6 +43,9 @@ properties: vdda-pll-supply: true + "#clock-cells": + const: 1 + "#phy-cells": const: 0 From patchwork Thu Nov 10 15:17:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 623388 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1C2DAC43217 for ; Thu, 10 Nov 2022 15:18:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231365AbiKJPSC (ORCPT ); Thu, 10 Nov 2022 10:18:02 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34902 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231378AbiKJPR5 (ORCPT ); Thu, 10 Nov 2022 10:17:57 -0500 Received: from mail-lf1-x12e.google.com (mail-lf1-x12e.google.com [IPv6:2a00:1450:4864:20::12e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 070A5317C6 for ; Thu, 10 Nov 2022 07:17:52 -0800 (PST) Received: by mail-lf1-x12e.google.com with SMTP id l12so3855350lfp.6 for ; Thu, 10 Nov 2022 07:17:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=y93JMbDS7TCZqUPnYPX61/7g1utQYXApLn3dq22TrxU=; b=wRWhes+i45FVWkaP2RbQOZfAtoSXGa+d4hSoAgTqHq++rLCP4AleTXnOs9rzRTcSEg 9KTxfcVofTUJRlw4o9izwZlC43VmLxhzwz5J5PNPmk2lOwB54rsS5tF4N5D4mVBeCvwy muZlRGR/h9XRq+I8mysPxP0yufdne+8WePMhHUsNSUcMJwqy/WOyPimQB9xafZRc01A+ r8gVRtifBPhbVGEvFFd6KZuxgbQRZzFciRwAyBWAz6zmwQzboXljkKTXS6ouLUNztdzk axbFUuuyuIjkvfYyBszJ6dI7zB4gSZ7NE6yJQSCc9z95ztuB7rZ2X5BGIfeIosSUNs5Z zqIA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=y93JMbDS7TCZqUPnYPX61/7g1utQYXApLn3dq22TrxU=; b=IIj6uC9+6jG6qnZBj+uMcgmNxt/u5WC+kQ4k0hMhrtRDrvfzn8SRcTrv9JLGkoZeWe D+oZkk8PShIjb5utUT20jHc3Jik1Y+7urC/urbS855ISoLblajNDZBaNXFBYKmlDxz/a CCWW5huSicboA9JfghsTVH9GarYT/rOFp4jfkuMhrDAP/Ly2emDIlPU88GDXOYIQkp2e e8i5ripXmSk8o/skNb8synBMj3JWv3j/UgMevk6ZarR+4tpu2NhspHK/6DZ0nUUyUWgY /vbZopQjYN6HG1c9jPk2xMFsgIi6bCiKzZe1VaWs6myMJnMcKHmLod2wbNt64S2Fe3Z7 /06w== X-Gm-Message-State: ACrzQf02I3dUqy0UwMIUZtPaUFwbpYJFhpmz69J6O4Q8H99156fGSNnD K0ClE1qj/IvZCDNeAGcL2Ps+Nw== X-Google-Smtp-Source: AMsMyM51NCYdPzeJ0DVLsUbB7vzCw6INOY5T/UVzT15xYcYCb+lXPZgmdsCXgopNWuX/aWQ6uOQShw== X-Received: by 2002:a05:6512:4021:b0:4a2:4f21:5070 with SMTP id br33-20020a056512402100b004a24f215070mr1651074lfb.270.1668093470375; Thu, 10 Nov 2022 07:17:50 -0800 (PST) Received: from eriador.unikie.fi ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id p22-20020a2eb7d6000000b002774e7267a7sm2719591ljo.25.2022.11.10.07.17.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 10 Nov 2022 07:17:50 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski Cc: Philipp Zabel , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org Subject: [PATCH v7 2/4] phy: qcom-qmp-ufs: provide symbol clocks Date: Thu, 10 Nov 2022 18:17:46 +0300 Message-Id: <20221110151748.795767-3-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221110151748.795767-1-dmitry.baryshkov@linaro.org> References: <20221110151748.795767-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Register three UFS symbol clocks (ufs_rx_symbol_0_clk_src, ufs_rx_symbol_1_clk_src ufs_tx_symbol_0_clk_src). Register OF clock provider to let other devices link these clocks through the DT. Signed-off-by: Dmitry Baryshkov --- drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 64 +++++++++++++++++++++++++ 1 file changed, 64 insertions(+) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c index 189103d1bd18..78d7daf34667 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c @@ -1023,6 +1023,66 @@ static int qmp_ufs_clk_init(struct qmp_ufs *qmp) return devm_clk_bulk_get(dev, num, qmp->clks); } +static void phy_clk_release_provider(void *res) +{ + of_clk_del_provider(res); +} + +#define UFS_SYMBOL_CLOCKS 3 + +static int phy_symbols_clk_register(struct qmp_ufs *qmp, struct device_node *np) +{ + struct clk_hw_onecell_data *clk_data; + struct clk_hw *hw; + char name[64]; + int ret; + + clk_data = devm_kzalloc(qmp->dev, + struct_size(clk_data, hws, UFS_SYMBOL_CLOCKS), + GFP_KERNEL); + if (!clk_data) + return -ENOMEM; + + clk_data->num = UFS_SYMBOL_CLOCKS; + + snprintf(name, sizeof(name), "%s::rx_symbol_0", dev_name(qmp->dev)); + hw = devm_clk_hw_register_fixed_rate(qmp->dev, name, NULL, 0, 0); + if (IS_ERR(hw)) + return PTR_ERR(hw); + + clk_data->hws[0] = hw; + + snprintf(name, sizeof(name), "%s::rx_symbol_1", dev_name(qmp->dev)); + hw = devm_clk_hw_register_fixed_rate(qmp->dev, name, NULL, 0, 0); + if (IS_ERR(hw)) + return PTR_ERR(hw); + + clk_data->hws[1] = hw; + + snprintf(name, sizeof(name), "%s::tx_symbol_0", dev_name(qmp->dev)); + hw = devm_clk_hw_register_fixed_rate(qmp->dev, name, NULL, 0, 0); + if (IS_ERR(hw)) + return PTR_ERR(hw); + + clk_data->hws[2] = hw; + + ret = of_clk_add_hw_provider(np, of_clk_hw_onecell_get, clk_data); + if (ret) + return ret; + + /* + * Roll a devm action because the clock provider is the child node, but + * the child node is not actually a device. + */ + return devm_add_action_or_reset(qmp->dev, phy_clk_release_provider, np); +} + +static const struct phy_ops qcom_qmp_ufs_ops = { + .power_on = qmp_ufs_enable, + .power_off = qmp_ufs_disable, + .owner = THIS_MODULE, +}; + static int qmp_ufs_parse_dt_legacy(struct qmp_ufs *qmp, struct device_node *np) { struct platform_device *pdev = to_platform_device(qmp->dev); @@ -1135,6 +1195,10 @@ static int qmp_ufs_probe(struct platform_device *pdev) if (ret) goto err_node_put; + ret = phy_symbols_clk_register(qmp, np); + if (ret) + goto err_node_put; + qmp->phy = devm_phy_create(dev, np, &qcom_qmp_ufs_phy_ops); if (IS_ERR(qmp->phy)) { ret = PTR_ERR(qmp->phy); From patchwork Thu Nov 10 15:17:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 623931 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D86A4C4167B for ; Thu, 10 Nov 2022 15:18:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231334AbiKJPSB (ORCPT ); Thu, 10 Nov 2022 10:18:01 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34900 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231373AbiKJPR5 (ORCPT ); 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Thu, 10 Nov 2022 07:17:50 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski Cc: Philipp Zabel , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org Subject: [PATCH v7 3/4] arm64: dts: qcom: sm8450: fix gcc clocks order to follow the schema Date: Thu, 10 Nov 2022 18:17:47 +0300 Message-Id: <20221110151748.795767-4-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221110151748.795767-1-dmitry.baryshkov@linaro.org> References: <20221110151748.795767-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Move the sleep_clk to make sure the gcc device node follows the schema. Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sm8450.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index d32f08df743d..efb01fefe9c7 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -720,13 +720,13 @@ gcc: clock-controller@100000 { #reset-cells = <1>; #power-domain-cells = <1>; clocks = <&rpmhcc RPMH_CXO_CLK>, + <&sleep_clk>, <&pcie0_lane>, - <&pcie1_lane>, - <&sleep_clk>; + <&pcie1_lane>; clock-names = "bi_tcxo", + "sleep_clk", "pcie_0_pipe_clk", - "pcie_1_pipe_clk", - "sleep_clk"; + "pcie_1_pipe_clk"; }; gpi_dma2: dma-controller@800000 { From patchwork Thu Nov 10 15:17:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 623930 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D3B28C433FE for ; Thu, 10 Nov 2022 15:18:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231358AbiKJPSG (ORCPT ); Thu, 10 Nov 2022 10:18:06 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35080 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231387AbiKJPR5 (ORCPT ); Thu, 10 Nov 2022 10:17:57 -0500 Received: from mail-lj1-x233.google.com (mail-lj1-x233.google.com [IPv6:2a00:1450:4864:20::233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7DBF732066 for ; Thu, 10 Nov 2022 07:17:53 -0800 (PST) Received: by mail-lj1-x233.google.com with SMTP id d3so1395844ljl.1 for ; Thu, 10 Nov 2022 07:17:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=LtplPWhl0am0iTs1s0a4EgsN8KYFRyCRiL1FwQXo6jw=; b=d3vN8e+52vpBABKHE0DUydfrjrEKxeKzkpdLDosLTA9JQaoFh1H/vXBp9Kyj7CBtxC lvaj29kcdEndblItLdZjm94z6ENqHLK6H99b/KYEREz9ifzWV/Tn/KiMeGBBUjW+uUaV CfqGVaahouIVFUs+Z/rpkIrB8xFQ687gX1zkOv3zqBYc5Ac4Qv2cCj4XPE0BQOszcHYo /pwY8HexiP9hhdb38rr/CmNDRfLiT1u8bKNxMNXVx0h2I0ga+zMFSEaUS0qc8M/VW+EN 3ty6HVIpTaOhfiLmaysb1bxn7/DAHi5fuuQPw1sIAX2L35ilv696y1CCLzF+jl7dro/1 xrZA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=LtplPWhl0am0iTs1s0a4EgsN8KYFRyCRiL1FwQXo6jw=; b=c8QFSBhYSnv0q5Qa50rV6zGAJcUoxNQAyo9Tn+QmT2W7JJomqxq+gh+5sd39e8KAOJ IvGKnLuqkvupTke5VJQhjfCbOJVnMRsZld85qq3jKPttJCf6j4cE/MRJ4AoyP5PphZWB FRBB6Ersfl6AXe2W0rgrJrsn38RRx8vXYDYGCwyf9rV/Nmdd2LKlbicRr+brVyhKCFeo coij5BPN0jwUkjruGmNWgE1y53L7zrA/MsJLADkh0Hd1/72M5jkaHX7RDUtXXqYZr3y7 Oyf7JwP81/vtpk1cNw1FxqZmNWA4GT09x4kEg43MrHuSE15cu6OZXfdxq5ULJpkfRgXP 3GGA== X-Gm-Message-State: ACrzQf3Svog0lJEm3E+0Vj4CtOr6znBLq6ICmLvzjgzR/gTz8zef4tJT 2FdIEyVRdrGw499jdesW26wmDw== X-Google-Smtp-Source: AMsMyM7pgu5y4nnkz0dgtPIpEynTqwXqjBIx84tCp8pJgQfBPZvnA2gVPYySltm/4XvH04tL/yNvjA== X-Received: by 2002:a05:651c:160d:b0:26e:90a5:1521 with SMTP id f13-20020a05651c160d00b0026e90a51521mr9259566ljq.39.1668093471866; Thu, 10 Nov 2022 07:17:51 -0800 (PST) Received: from eriador.unikie.fi ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id p22-20020a2eb7d6000000b002774e7267a7sm2719591ljo.25.2022.11.10.07.17.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 10 Nov 2022 07:17:51 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski Cc: Philipp Zabel , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org Subject: [PATCH v7 4/4] arm64: dts: qcom: use UFS symbol clocks provided by PHY Date: Thu, 10 Nov 2022 18:17:48 +0300 Message-Id: <20221110151748.795767-5-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221110151748.795767-1-dmitry.baryshkov@linaro.org> References: <20221110151748.795767-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Remove manually created symbol clocks and replace them with clocks provided by PHY. Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 5 ++++- arch/arm64/boot/dts/qcom/sm8350.dtsi | 25 ++++--------------------- arch/arm64/boot/dts/qcom/sm8450.dtsi | 15 +++++++++++++-- 3 files changed, 21 insertions(+), 24 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index c0a2baffa49d..935ba6e6bc15 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -699,7 +699,9 @@ gcc: clock-controller@300000 { <&pciephy_1>, <&pciephy_2>, <&ssusb_phy_0>, - <0>, <0>, <0>; + <&ufsphy_lane 0>, + <&ufsphy_lane 1>, + <&ufsphy_lane 2>; clock-names = "cxo", "cxo2", "sleep_clk", @@ -2019,6 +2021,7 @@ ufsphy_lane: phy@627400 { reg = <0x627400 0x12c>, <0x627600 0x200>, <0x627c00 0x1b4>; + #clock-cells = <1>; #phy-cells = <0>; }; }; diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi index 90a26f406bf3..51ca006dc5c1 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -37,24 +37,6 @@ sleep_clk: sleep-clk { clock-frequency = <32000>; #clock-cells = <0>; }; - - ufs_phy_rx_symbol_0_clk: ufs-phy-rx-symbol-0 { - compatible = "fixed-clock"; - clock-frequency = <1000>; - #clock-cells = <0>; - }; - - ufs_phy_rx_symbol_1_clk: ufs-phy-rx-symbol-1 { - compatible = "fixed-clock"; - clock-frequency = <1000>; - #clock-cells = <0>; - }; - - ufs_phy_tx_symbol_0_clk: ufs-phy-tx-symbol-0 { - compatible = "fixed-clock"; - clock-frequency = <1000>; - #clock-cells = <0>; - }; }; cpus { @@ -661,9 +643,9 @@ gcc: clock-controller@100000 { <0>, <0>, <0>, - <&ufs_phy_rx_symbol_0_clk>, - <&ufs_phy_rx_symbol_1_clk>, - <&ufs_phy_tx_symbol_0_clk>, + <&ufs_mem_phy_lanes 0>, + <&ufs_mem_phy_lanes 1>, + <&ufs_mem_phy_lanes 2>, <0>, <0>; }; @@ -2389,6 +2371,7 @@ ufs_mem_phy_lanes: phy@1d87400 { <0 0x01d87c00 0 0x1dc>, <0 0x01d87800 0 0x108>, <0 0x01d87a00 0 0x1e0>; + #clock-cells = <1>; #phy-cells = <0>; }; }; diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index efb01fefe9c7..95c01391972a 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -722,11 +722,21 @@ gcc: clock-controller@100000 { clocks = <&rpmhcc RPMH_CXO_CLK>, <&sleep_clk>, <&pcie0_lane>, - <&pcie1_lane>; + <&pcie1_lane>, + <0>, + <&ufs_mem_phy_lanes 0>, + <&ufs_mem_phy_lanes 1>, + <&ufs_mem_phy_lanes 2>, + <0>; clock-names = "bi_tcxo", "sleep_clk", "pcie_0_pipe_clk", - "pcie_1_pipe_clk"; + "pcie_1_pipe_clk", + "pcie_1_phy_aux_clk", + "ufs_phy_rx_symbol_0_clk", + "ufs_phy_rx_symbol_1_clk", + "ufs_phy_tx_symbol_0_clk", + "usb3_phy_wrapper_gcc_usb30_pipe_clk"; }; gpi_dma2: dma-controller@800000 { @@ -3166,6 +3176,7 @@ ufs_mem_phy_lanes: phy@1d87400 { <0 0x01d87c00 0 0x1dc>, <0 0x01d87800 0 0x108>, <0 0x01d87a00 0 0x1e0>; + #clock-cells = <1>; #phy-cells = <0>; }; };