From patchwork Wed Nov 9 06:55:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matt Ranostay X-Patchwork-Id: 623131 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F0250C43217 for ; Wed, 9 Nov 2022 06:56:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229752AbiKIG4P (ORCPT ); Wed, 9 Nov 2022 01:56:15 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53992 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229488AbiKIG4P (ORCPT ); Wed, 9 Nov 2022 01:56:15 -0500 Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 41F941D0D8; Tue, 8 Nov 2022 22:56:14 -0800 (PST) Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 2A96tv8D095409; Wed, 9 Nov 2022 00:55:57 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1667976957; bh=mKUDdJKT+Ky4ObyLz8kIj9aWEi7c/KxZ4F/S8X4K74o=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=WbSrjh4/UqNEMRV6Z2veW6wpKAbPfkWZB7xzPrGvCZF/UYpYEhKHvsCVFs1TPhJLi CWH4rczVPCPN8ne/X85/LAskI4kamXVtXQC6CitL4dKFXQan+FuuY+4Q+h3M9cT/re WT0jsdqebD8kpC7hSkOiuFd9wBbN1WfTWnheWGEc= Received: from DFLE107.ent.ti.com (dfle107.ent.ti.com [10.64.6.28]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 2A96tvUS091524 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 9 Nov 2022 00:55:57 -0600 Received: from DFLE100.ent.ti.com (10.64.6.21) by DFLE107.ent.ti.com (10.64.6.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Wed, 9 Nov 2022 00:55:57 -0600 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Wed, 9 Nov 2022 00:55:57 -0600 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 2A96tsUq029738; Wed, 9 Nov 2022 00:55:56 -0600 From: Matt Ranostay To: , , , , , , , , CC: , , , , Matt Ranostay Subject: [PATCH v3 1/7] Documentation: tps6594x: Add DT bindings for the TPS6594x PMIC Date: Tue, 8 Nov 2022 22:55:40 -0800 Message-ID: <20221109065546.24912-2-mranostay@ti.com> X-Mailer: git-send-email 2.38.GIT In-Reply-To: <20221109065546.24912-1-mranostay@ti.com> References: <20221109065546.24912-1-mranostay@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Signed-off-by: Matt Ranostay --- .../devicetree/bindings/mfd/ti,tps6594x.yaml | 67 +++++++++++++++++++ 1 file changed, 67 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/ti,tps6594x.yaml diff --git a/Documentation/devicetree/bindings/mfd/ti,tps6594x.yaml b/Documentation/devicetree/bindings/mfd/ti,tps6594x.yaml new file mode 100644 index 000000000000..be87f0037bf9 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/ti,tps6594x.yaml @@ -0,0 +1,67 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/ti,tps6594x.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TPS6594x Power Management Integrated Circuit (PMIC) + +maintainers: + - Keerthy + +properties: + compatible: + contains: + enum: + - ti,tps6594x + + reg: + const: 0x48 + description: I2C slave address + + ti,system-power-controller: + type: boolean + description: PMIC is controlling the system power. + + rtc: + type: object + $ref: /schemas/rtc/rtc.yaml# + unevaluatedProperties: false + properties: + compatible: + const: ti,tps6594x-rtc + + gpio: + type: object + unevaluatedProperties: false + properties: + compatible: + const: ti,tps6594x-gpio + +additionalProperties: false + +required: + - compatible + - reg + +examples: + - | + i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + pmic: pmic@48 { + compatible = "ti,tps6594x"; + reg = <0x48>; + + rtc { + compatible = "ti,tps6594x-rtc"; + }; + + gpio { + compatible = "ti,tps6594x-gpio"; + }; + }; + }; + +... From patchwork Wed Nov 9 06:55:42 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matt Ranostay X-Patchwork-Id: 623130 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DF183C43219 for ; Wed, 9 Nov 2022 06:56:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229806AbiKIG4f (ORCPT ); Wed, 9 Nov 2022 01:56:35 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54124 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229554AbiKIG4d (ORCPT ); Wed, 9 Nov 2022 01:56:33 -0500 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0DE4A1DA58; Tue, 8 Nov 2022 22:56:31 -0800 (PST) Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 2A96u9nG094845; Wed, 9 Nov 2022 00:56:09 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1667976969; bh=2I9D0z5EcfXn1L3QlWvR7842WCuURZEYWCZfdD2MvJY=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=QqqQr4KJu4BQXSPsahwMQT8qanXdQ/4x+aVxyfoeUHZ1tL+5V5HRJElBQWzcCTEfp CPsNQNf3rd9XxZkKYDU+86RyhD8sGtKPLRDU84aatQ+YBO9/8Nv+NczLLL/MTjTWuf VCa8wDwQrGGX/2hkRDatWfBaTYFY5ottdZVA0/KY= Received: from DLEE113.ent.ti.com (dlee113.ent.ti.com [157.170.170.24]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 2A96u9FX117947 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 9 Nov 2022 00:56:09 -0600 Received: from DLEE103.ent.ti.com (157.170.170.33) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Wed, 9 Nov 2022 00:56:08 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Wed, 9 Nov 2022 00:56:08 -0600 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 2A96u5hK116509; Wed, 9 Nov 2022 00:56:07 -0600 From: Matt Ranostay To: , , , , , , , , CC: , , , , Keerthy , Matt Ranostay Subject: [PATCH v3 3/7] rtc: rtc-tps6594x: Add support for TPS6594X PMIC RTC Date: Tue, 8 Nov 2022 22:55:42 -0800 Message-ID: <20221109065546.24912-4-mranostay@ti.com> X-Mailer: git-send-email 2.38.GIT In-Reply-To: <20221109065546.24912-1-mranostay@ti.com> References: <20221109065546.24912-1-mranostay@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org From: Keerthy Add support for TPS6594X PMIC RTC. However, currently only get/set of time + date functionality is supported. Signed-off-by: Keerthy Signed-off-by: Matt Ranostay --- drivers/rtc/Kconfig | 10 ++ drivers/rtc/Makefile | 1 + drivers/rtc/rtc-tps6594x.c | 181 +++++++++++++++++++++++++++++++++++++ 3 files changed, 192 insertions(+) create mode 100644 drivers/rtc/rtc-tps6594x.c diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index 35298c651730..0adb2c2570b8 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig @@ -588,6 +588,16 @@ config RTC_DRV_TPS65910 This driver can also be built as a module. If so, the module will be called rtc-tps65910. +config RTC_DRV_TPS6594X + tristate "TI TPS6594X RTC driver" + depends on MFD_TPS6594X + help + If you say yes here you get support for the RTC of TI TPS6594X series PMIC + chips. + + This driver can also be built as a module. If so, the module + will be called rtc-tps6594x. + config RTC_DRV_RC5T583 tristate "RICOH 5T583 RTC driver" depends on MFD_RC5T583 diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile index c2d474985919..cf46d88bc4b0 100644 --- a/drivers/rtc/Makefile +++ b/drivers/rtc/Makefile @@ -176,6 +176,7 @@ obj-$(CONFIG_RTC_DRV_TEST) += rtc-test.o obj-$(CONFIG_RTC_DRV_TI_K3) += rtc-ti-k3.o obj-$(CONFIG_RTC_DRV_TPS6586X) += rtc-tps6586x.o obj-$(CONFIG_RTC_DRV_TPS65910) += rtc-tps65910.o +obj-$(CONFIG_RTC_DRV_TPS6594X) += rtc-tps6594x.o obj-$(CONFIG_RTC_DRV_TWL4030) += rtc-twl.o obj-$(CONFIG_RTC_DRV_V3020) += rtc-v3020.o obj-$(CONFIG_RTC_DRV_VT8500) += rtc-vt8500.o diff --git a/drivers/rtc/rtc-tps6594x.c b/drivers/rtc/rtc-tps6594x.c new file mode 100644 index 000000000000..e9f904d0a769 --- /dev/null +++ b/drivers/rtc/rtc-tps6594x.c @@ -0,0 +1,181 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * rtc-tps6594x.c -- TPS6594x Real Time Clock driver. + * + * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com + * + * TODO: alarm support + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct tps6594x_rtc { + struct rtc_device *rtc; + struct device *dev; +}; + +#define TPS6594X_NUM_TIME_REGS (TPS6594X_RTC_YEARS - TPS6594X_RTC_SECONDS + 1) + +static int tps6594x_rtc_read_time(struct device *dev, struct rtc_time *tm) +{ + unsigned char rtc_data[TPS6594X_NUM_TIME_REGS]; + struct tps6594x *tps6594x = dev_get_drvdata(dev->parent); + int ret; + + /* Reset TPS6594X_RTC_CTRL_REG_GET_TIME bit to zero, required for latch */ + ret = regmap_update_bits(tps6594x->regmap, TPS6594X_RTC_CTRL_1, + TPS6594X_RTC_CTRL_REG_GET_TIME, 0); + if (ret < 0) { + dev_err(dev, "RTC CTRL reg update failed, err: %d\n", ret); + return ret; + } + + /* Copy RTC counting registers to static registers or latches */ + ret = regmap_update_bits(tps6594x->regmap, TPS6594X_RTC_CTRL_1, + TPS6594X_RTC_CTRL_REG_GET_TIME, TPS6594X_RTC_CTRL_REG_GET_TIME); + if (ret < 0) { + dev_err(dev, "RTC CTRL reg update failed, err: %d\n", ret); + return ret; + } + + ret = regmap_bulk_read(tps6594x->regmap, TPS6594X_RTC_SECONDS, + rtc_data, TPS6594X_NUM_TIME_REGS); + if (ret < 0) { + dev_err(dev, "RTC_SECONDS reg read failed, err = %d\n", ret); + return ret; + } + + tm->tm_sec = bcd2bin(rtc_data[0]); + tm->tm_min = bcd2bin(rtc_data[1]); + tm->tm_hour = bcd2bin(rtc_data[2]); + tm->tm_mday = bcd2bin(rtc_data[3]); + tm->tm_mon = bcd2bin(rtc_data[4]) - 1; + tm->tm_year = bcd2bin(rtc_data[5]) + 100; + + return ret; +} + +static int tps6594x_rtc_set_time(struct device *dev, struct rtc_time *tm) +{ + unsigned char rtc_data[TPS6594X_NUM_TIME_REGS]; + struct tps6594x *tps6594x = dev_get_drvdata(dev->parent); + int ret, retries = 5; + unsigned int val; + + rtc_data[0] = bin2bcd(tm->tm_sec); + rtc_data[1] = bin2bcd(tm->tm_min); + rtc_data[2] = bin2bcd(tm->tm_hour); + rtc_data[3] = bin2bcd(tm->tm_mday); + rtc_data[4] = bin2bcd(tm->tm_mon + 1); + rtc_data[5] = bin2bcd(tm->tm_year - 100); + + /* Stop RTC while updating the RTC time registers */ + ret = regmap_update_bits(tps6594x->regmap, TPS6594X_RTC_CTRL_1, + TPS6594X_RTC_CTRL_REG_STOP_RTC, 0); + if (ret < 0) { + dev_err(dev, "RTC stop failed, err = %d\n", ret); + return ret; + } + + /* Waiting till RTC isn't running */ + do { + ret = regmap_read(tps6594x->regmap, TPS6594X_RTC_STATUS, &val); + if (ret < 0) { + dev_err(dev, "RTC_STATUS reg read failed, err = %d\n", ret); + return ret; + } + msleep(20); + } while (--retries && (val & TPS6594X_RTC_STATUS_RUN)); + + if (!retries) { + dev_err(dev, "RTC_STATUS is still RUNNING\n"); + return -ETIMEDOUT; + } + + ret = regmap_bulk_write(tps6594x->regmap, TPS6594X_RTC_SECONDS, + rtc_data, TPS6594X_NUM_TIME_REGS); + if (ret < 0) { + dev_err(dev, "RTC_SECONDS reg write failed, err = %d\n", ret); + return ret; + } + + /* Start back RTC */ + ret = regmap_update_bits(tps6594x->regmap, TPS6594X_RTC_CTRL_1, + TPS6594X_RTC_CTRL_REG_STOP_RTC, + TPS6594X_RTC_CTRL_REG_STOP_RTC); + if (ret < 0) + dev_err(dev, "RTC start failed, err = %d\n", ret); + + return ret; +} + +static const struct rtc_class_ops tps6594x_rtc_ops = { + .read_time = tps6594x_rtc_read_time, + .set_time = tps6594x_rtc_set_time, +}; + +static int tps6594x_rtc_probe(struct platform_device *pdev) +{ + struct tps6594x *tps6594x = dev_get_drvdata(pdev->dev.parent); + struct tps6594x_rtc *tps6594x_rtc = NULL; + int ret; + + tps6594x_rtc = devm_kzalloc(&pdev->dev, sizeof(struct tps6594x_rtc), GFP_KERNEL); + if (!tps6594x_rtc) + return -ENOMEM; + + tps6594x_rtc->dev = &pdev->dev; + platform_set_drvdata(pdev, tps6594x_rtc); + + /* Start RTC */ + ret = regmap_update_bits(tps6594x->regmap, TPS6594X_RTC_CTRL_1, + TPS6594X_RTC_CTRL_REG_STOP_RTC, + TPS6594X_RTC_CTRL_REG_STOP_RTC); + if (ret < 0) { + dev_err(&pdev->dev, "RTC_CTRL write failed, err = %d\n", ret); + return ret; + } + + tps6594x_rtc->rtc = devm_rtc_device_register(&pdev->dev, pdev->name, + &tps6594x_rtc_ops, THIS_MODULE); + if (IS_ERR(tps6594x_rtc->rtc)) { + ret = PTR_ERR(tps6594x_rtc->rtc); + dev_err(&pdev->dev, "RTC register failed, err = %d\n", ret); + return ret; + } + + return 0; +} + +#ifdef CONFIG_OF +static const struct of_device_id of_tps6594x_rtc_match[] = { + { .compatible = "ti,tps6594x-rtc", }, + {}, +}; +MODULE_DEVICE_TABLE(of, of_tps6594x_rtc_match); +#endif + +static struct platform_driver tps6594x_rtc_driver = { + .probe = tps6594x_rtc_probe, + .driver = { + .name = "tps6594x-rtc", + .of_match_table = of_match_ptr(of_tps6594x_rtc_match), + }, +}; + +module_platform_driver(tps6594x_rtc_driver); + +MODULE_ALIAS("platform:tps6594x_rtc"); +MODULE_DESCRIPTION("TI TPS6594x series RTC driver"); +MODULE_AUTHOR("Keerthy J "); +MODULE_LICENSE("GPL"); From patchwork Wed Nov 9 06:55:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matt Ranostay X-Patchwork-Id: 623128 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 61D61C4167D for ; Wed, 9 Nov 2022 06:56:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229837AbiKIG4l (ORCPT ); Wed, 9 Nov 2022 01:56:41 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54206 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229824AbiKIG4j (ORCPT ); Wed, 9 Nov 2022 01:56:39 -0500 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9F3BB1DF0F; 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Wed, 9 Nov 2022 00:56:13 -0600 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 2A96uAEE030003; Wed, 9 Nov 2022 00:56:12 -0600 From: Matt Ranostay To: , , , , , , , , CC: , , , , Matt Ranostay , Keerthy Subject: [PATCH v3 4/7] gpio: tps6594x: add GPIO support for TPS6594x PMIC Date: Tue, 8 Nov 2022 22:55:43 -0800 Message-ID: <20221109065546.24912-5-mranostay@ti.com> X-Mailer: git-send-email 2.38.GIT In-Reply-To: <20221109065546.24912-1-mranostay@ti.com> References: <20221109065546.24912-1-mranostay@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add support for TPS6594X PMICs GPIO interface that has 11 that can be configured as input or outputs. Tested-by: Keerthy Signed-off-by: Matt Ranostay --- drivers/gpio/Kconfig | 7 ++ drivers/gpio/Makefile | 1 + drivers/gpio/gpio-tps6594x.c | 142 +++++++++++++++++++++++++++++++++++ include/linux/mfd/tps6594x.h | 6 ++ 4 files changed, 156 insertions(+) create mode 100644 drivers/gpio/gpio-tps6594x.c diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 8c756cb29214..0225e6bddf0a 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -1405,6 +1405,13 @@ config GPIO_TPS65912 help This driver supports TPS65912 GPIO chip. +config GPIO_TPS6594X + tristate "TI TPS6594X GPIO driver" + depends on MFD_TPS6594X + help + Select this option to enable GPIO driver for the TPS6954X + PMIC chip family. There are 11 GPIOs that can be configured. + config GPIO_TPS68470 tristate "TPS68470 GPIO" depends on INTEL_SKL_INT3472 diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 8629e9eaf79e..e67a9b787b09 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -158,6 +158,7 @@ obj-$(CONFIG_GPIO_TPS65218) += gpio-tps65218.o obj-$(CONFIG_GPIO_TPS6586X) += gpio-tps6586x.o obj-$(CONFIG_GPIO_TPS65910) += gpio-tps65910.o obj-$(CONFIG_GPIO_TPS65912) += gpio-tps65912.o +obj-$(CONFIG_GPIO_TPS6594X) += gpio-tps6594x.o obj-$(CONFIG_GPIO_TPS68470) += gpio-tps68470.o obj-$(CONFIG_GPIO_TQMX86) += gpio-tqmx86.o obj-$(CONFIG_GPIO_TS4800) += gpio-ts4800.o diff --git a/drivers/gpio/gpio-tps6594x.c b/drivers/gpio/gpio-tps6594x.c new file mode 100644 index 000000000000..f530ac17f73f --- /dev/null +++ b/drivers/gpio/gpio-tps6594x.c @@ -0,0 +1,142 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * GPIO driver for TI TPS6594x PMICs + * + * Copyright (C) 2022 Texas Instruments Incorporated - http://www.ti.com/ + */ + +#include +#include +#include +#include + +#include +#include + +#define GPIO_CFG_MASK BIT(0) +#define NGPIOS_PER_REG 8 + +struct tps6594x_gpio { + struct gpio_chip gpio_chip; + struct tps6594x *tps; +}; + +static int tps6594x_gpio_get_direction(struct gpio_chip *gc, unsigned int offset) +{ + struct tps6594x_gpio *gpio = gpiochip_get_data(gc); + int ret, val; + + ret = regmap_read(gpio->tps->regmap, TPS6594X_GPIO1_CONF + offset, &val); + if (ret) + return ret; + + if (val & GPIO_CFG_MASK) + return GPIO_LINE_DIRECTION_OUT; + + return GPIO_LINE_DIRECTION_IN; +} + +static int tps6594x_gpio_direction_input(struct gpio_chip *gc, unsigned int offset) +{ + struct tps6594x_gpio *gpio = gpiochip_get_data(gc); + + return regmap_update_bits(gpio->tps->regmap, TPS6594X_GPIO1_CONF + offset, + GPIO_CFG_MASK, 0); +} + +static int tps6594x_gpio_direction_output(struct gpio_chip *gc, unsigned int offset, int value) +{ + struct tps6594x_gpio *gpio = gpiochip_get_data(gc); + unsigned int reg = TPS6594X_GPIO_OUT_1, shift = offset; + + if (shift >= NGPIOS_PER_REG) { + reg = TPS6594X_GPIO_OUT_2; + shift -= NGPIOS_PER_REG; + } + + regmap_update_bits(gpio->tps->regmap, reg, BIT(shift), value ? BIT(shift) : 0); + + return regmap_update_bits(gpio->tps->regmap, TPS6594X_GPIO1_CONF + offset, + GPIO_CFG_MASK, GPIO_CFG_MASK); +} + +static int tps6594x_gpio_get(struct gpio_chip *gc, unsigned int offset) +{ + struct tps6594x_gpio *gpio = gpiochip_get_data(gc); + unsigned int reg = TPS6594X_GPIO_IN_1; + int ret, val; + + if (offset >= NGPIOS_PER_REG) { + reg = TPS6594X_GPIO_IN_2; + offset -= NGPIOS_PER_REG; + } + + ret = regmap_read(gpio->tps->regmap, reg, &val); + if (ret) + return ret; + + return !!(val & BIT(offset)); +} + +static void tps6594x_gpio_set(struct gpio_chip *gc, unsigned int offset, + int value) +{ + struct tps6594x_gpio *gpio = gpiochip_get_data(gc); + unsigned int reg = TPS6594X_GPIO_OUT_1; + + if (offset >= NGPIOS_PER_REG) { + reg = TPS6594X_GPIO_OUT_2; + offset -= NGPIOS_PER_REG; + } + + regmap_update_bits(gpio->tps->regmap, reg, BIT(offset), value ? BIT(offset) : 0); +} + +static const struct gpio_chip template_chip = { + .label = "tps6594x-gpio", + .owner = THIS_MODULE, + .get_direction = tps6594x_gpio_get_direction, + .direction_input = tps6594x_gpio_direction_input, + .direction_output = tps6594x_gpio_direction_output, + .get = tps6594x_gpio_get, + .set = tps6594x_gpio_set, + .base = -1, + .ngpio = 11, + .can_sleep = true, +}; + +static int tps6594x_gpio_probe(struct platform_device *pdev) +{ + struct tps6594x *tps = dev_get_drvdata(pdev->dev.parent); + struct tps6594x_gpio *gpio; + + gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL); + if (!gpio) + return -ENOMEM; + + gpio->tps = dev_get_drvdata(pdev->dev.parent); + gpio->gpio_chip = template_chip; + gpio->gpio_chip.parent = tps->dev; + + return devm_gpiochip_add_data(&pdev->dev, &gpio->gpio_chip, gpio); +} + +static const struct of_device_id of_tps6594x_gpio_match[] = { + { .compatible = "ti,tps6594x-gpio", }, + {}, +}; +MODULE_DEVICE_TABLE(of, of_tps6594x_gpio_match); + +static struct platform_driver tps6594x_gpio_driver = { + .driver = { + .name = "tps6594x-gpio", + .of_match_table = of_match_ptr(of_tps6594x_gpio_match), + }, + .probe = tps6594x_gpio_probe, +}; +module_platform_driver(tps6594x_gpio_driver); + +MODULE_ALIAS("platform:tps6594x-gpio"); +MODULE_AUTHOR("Matt Ranostay "); +MODULE_DESCRIPTION("TPS6594X GPIO driver"); +MODULE_LICENSE("GPL"); diff --git a/include/linux/mfd/tps6594x.h b/include/linux/mfd/tps6594x.h index 5a6af0da9223..c2440f5f43d3 100644 --- a/include/linux/mfd/tps6594x.h +++ b/include/linux/mfd/tps6594x.h @@ -21,6 +21,12 @@ #define TPS6594X_FSM_I2C_TRIGGERS 0x85 #define TPS6594X_FSM_NSLEEP_TRIGGERS 0x86 +#define TPS6594X_GPIO1_CONF 0x31 +#define TPS6594X_GPIO_OUT_1 0x3d +#define TPS6594X_GPIO_OUT_2 0x3e +#define TPS6594X_GPIO_IN_1 0x3f +#define TPS6594X_GPIO_IN_2 0x40 + #define TPS6594X_RTC_SECONDS 0xb5 #define TPS6594X_RTC_MINUTES 0xb6 #define TPS6594X_RTC_HOURS 0xb7 From patchwork Wed Nov 9 06:55:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matt Ranostay X-Patchwork-Id: 623129 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C96F0C352A1 for ; Wed, 9 Nov 2022 06:56:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229817AbiKIG4h (ORCPT ); Wed, 9 Nov 2022 01:56:37 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54142 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229554AbiKIG4g (ORCPT ); Wed, 9 Nov 2022 01:56:36 -0500 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4A2AE1DA58; Tue, 8 Nov 2022 22:56:36 -0800 (PST) Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 2A96uJrT034523; Wed, 9 Nov 2022 00:56:19 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1667976979; bh=cDGS+tQXKjWXPg6qNR/iYrL37iBJHv+ZSCGWXLGBWSw=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=tyvSXg1HTJoQ/a/AO0KurFcVUMf1Oi3peaUBvkiQt+6GJVP6LQr+0E+ndOEwYNZuH YWluXkXg4wX/Y/aX8mPLx0jXhFec80yOpBtfc+wLwkyAsf8+DCcuRXoej5dD+wymFO xvPo846oM2eUByXTdlttuyS5KqTP/cxYwuHbl27E= Received: from DFLE104.ent.ti.com (dfle104.ent.ti.com [10.64.6.25]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 2A96uIag118028 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 9 Nov 2022 00:56:19 -0600 Received: from DFLE100.ent.ti.com (10.64.6.21) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Wed, 9 Nov 2022 00:56:18 -0600 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Wed, 9 Nov 2022 00:56:18 -0600 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 2A96uF13089878; Wed, 9 Nov 2022 00:56:17 -0600 From: Matt Ranostay To: , , , , , , , , CC: , , , , Keerthy , Matt Ranostay Subject: [PATCH v3 5/7] arm64: dts: ti: k3-j7200-common-proc-board: Add TPS6594x PMIC node Date: Tue, 8 Nov 2022 22:55:44 -0800 Message-ID: <20221109065546.24912-6-mranostay@ti.com> X-Mailer: git-send-email 2.38.GIT In-Reply-To: <20221109065546.24912-1-mranostay@ti.com> References: <20221109065546.24912-1-mranostay@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org From: Keerthy Add TPS6594x PMIC, GPIO, and RTC definitions for J7200 common processor board device tree. Signed-off-by: Keerthy Signed-off-by: Matt Ranostay --- .../boot/dts/ti/k3-j7200-common-proc-board.dts | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts index 6240856e4863..9514751739fe 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts @@ -333,3 +333,20 @@ &pcie1_ep { num-lanes = <2>; status = "disabled"; }; + +&wkup_i2c0 { + status = "okay"; + tps6594x: tps6594x@48 { + compatible = "ti,tps6594x"; + reg = <0x48>; + ti,system-power-controller; + + rtc { + compatible = "ti,tps6594x-rtc"; + }; + + gpio { + compatible = "ti,tps6594x-gpio"; + }; + }; +};