From patchwork Wed Nov 9 11:12:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 623088 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 62AFBC4332F for ; Wed, 9 Nov 2022 11:12:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229617AbiKILMo (ORCPT ); Wed, 9 Nov 2022 06:12:44 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57730 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229540AbiKILMn (ORCPT ); Wed, 9 Nov 2022 06:12:43 -0500 Received: from mail-ed1-x52e.google.com (mail-ed1-x52e.google.com [IPv6:2a00:1450:4864:20::52e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0B36F22B3C for ; Wed, 9 Nov 2022 03:12:43 -0800 (PST) Received: by mail-ed1-x52e.google.com with SMTP id 21so26727107edv.3 for ; Wed, 09 Nov 2022 03:12:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=LdDDG+VwCgLPntFF4oa/ykOGwGyduN4fHiF8yU6o5TA=; b=w4s581JvQ2Mn8GOCY2YVAROxVhZovQ9F6aNxHdQUXuymakEOCP2ZNLp6bqPiYK7s6A 4BW3fGjCZuZwV5NgN9p8Vg9pir2tqs3jr/ebZJPupmDhMxMXpJhTrMRCcVrYmypedaEE ee8A3Isajf/DU8pb9GPHuqc1u8s3bLijg/X/0inlV3eVtSSMl1mhQJZIdQQOknulHBFs 6AgTOizdTJY77Iyilk3DbIagWrgza8v513pO8KYfT1CM6Z/spqAYZdDMZsXnlrP7RXt6 qvl73H5cSVpXUFxRJFB/4qwcz/cBhYWfLKzvRdwr57mWPxV+Em9gbbnZUXecwwcYYkmG aLlg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=LdDDG+VwCgLPntFF4oa/ykOGwGyduN4fHiF8yU6o5TA=; b=SYjTmTVd1QZOBRANUKf6n7QemzdVK3O4T831q8XjooV49JEGBMjHXTbj/7D/QE74Qt i7yZcR+g5AoFEbEZ5g4HXjpgz+iSC5X0XyFmfFiBF2XrIjQ/isBsoutD/WIs2GPXjT4B VbxbdYvu9+fFz18NPe6/wG7pvCgiKzgx+fajIU8lnF6Ajw4pzz65xqeMNvZFB8giX3Jp L2fMYy7+FYHB8dxvrth6uBRPtU4Hh5FiIe9jcWTp9440maF0w+wcM27Pq0FJhMKYq3hD 0sk3QksRKMEQKzfa4z5ewdCqnf71b506QRuCtY4wEwTbmQ9d5Jqws9HhX8Zhsk2xRbSI qLLQ== X-Gm-Message-State: ACrzQf1uw19ofX6SpPhQFY68pLhQTUlf1HPL/44xg6Eq4mNVTb6k32H1 vhb+blS4w8rYZUEJ3xNR6eEB+g== X-Google-Smtp-Source: AMsMyM6s7MoJlv0Fg8yZvsH1IMDvfa7NtIwgSGlQvWA4gVOn/ZBLMC2W12W0VttsA8gaNjq3FwuIZw== X-Received: by 2002:aa7:ca50:0:b0:461:9845:d9d2 with SMTP id j16-20020aa7ca50000000b004619845d9d2mr59012120edt.163.1667992361655; Wed, 09 Nov 2022 03:12:41 -0800 (PST) Received: from localhost.localdomain ([194.29.137.22]) by smtp.gmail.com with ESMTPSA id k8-20020a1709062a4800b007ad9c826d75sm5825899eje.61.2022.11.09.03.12.40 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 09 Nov 2022 03:12:41 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: patches@linaro.org, Konrad Dybcio , Will Deacon , Robin Murphy , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 01/10] dt-bindings: arm-smmu: Allow up to 3 power-domains Date: Wed, 9 Nov 2022 12:12:26 +0100 Message-Id: <20221109111236.46003-2-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.32.0 (Apple Git-132) In-Reply-To: <20221109111236.46003-1-konrad.dybcio@linaro.org> References: <20221109111236.46003-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Some SMMUs require that a vote is held on as much as 3 separate PDs (hello Qualcomm). Allow it in bindings. Signed-off-by: Konrad Dybcio --- Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml index 9066e6df1ba1..1897d0d4d820 100644 --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml @@ -159,7 +159,7 @@ properties: through the TCU's programming interface. power-domains: - maxItems: 1 + maxItems: 3 nvidia,memory-controller: description: | From patchwork Wed Nov 9 11:12:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 623087 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 71763C4332F for ; Wed, 9 Nov 2022 11:12:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229640AbiKILMu (ORCPT ); Wed, 9 Nov 2022 06:12:50 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57844 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229770AbiKILMt (ORCPT ); Wed, 9 Nov 2022 06:12:49 -0500 Received: from mail-ed1-x52d.google.com (mail-ed1-x52d.google.com [IPv6:2a00:1450:4864:20::52d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A012327CCC for ; Wed, 9 Nov 2022 03:12:48 -0800 (PST) Received: by mail-ed1-x52d.google.com with SMTP id a5so26660719edb.11 for ; Wed, 09 Nov 2022 03:12:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=dw8yiTzUnE0/1jed/kvyGb1dCoZQTp6ZbqhV1sxsfZ0=; b=LgW7dKax1lUQHPezWxwMRSeDeHZcYqMQBQqKjPC55A582VnN+e75uJI772OUM4vS6A zf9WuuxvZUZ9YCXKczzJ4tNiiiZXrkaAjARV7vJfp80FasOdqBIqIRaCLavH07eQGFj9 iIlBLdHzhkbGnrHkDVR+fE7/l3m4V+YSkRJdc2QOCip4Wjhf+LlfWEMhCaYqP9tjGL1i Uc57G1u09ZU+8s0WakgNHJ+I9azokFhmdQjx9yqO3yDpiOqT4BbfUp7FzWUvjlRVnjUl uxH55k5Cf7gpVa0/FLQsgx6mFFvxA+gUYTJIvvobMeJEK+H7sXBSWxfkM5IW1WuNzq6p Wncw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=dw8yiTzUnE0/1jed/kvyGb1dCoZQTp6ZbqhV1sxsfZ0=; b=VLr/nbYqK6kiW7Qsn+KEHZxpZlJdwzX49+T5JRt1F4U6ei4hjKGwnfujVkBHnGhu4f vKM8uN3aujc+FXWBtSRHqjbsUxU04Y9fbSS7EID9ryY7/ZLOX4YJ5tpI5//2JYohvdON woRfeVHxkoeCYUAczcFtAV+33efkTRjiuIfyolX0Pv2HII7QZNJ2orHTM8NH85ZCPL7o F0yfojIl+oyk07H+1+mmbnDmMP59F/SwJ7WVc6FyZ1lSCb565/hFhm+ep5bV6eFL2hlU 1qpaK7Vvx8kYLR5h5KxNL4iX0T7Qfb9c/sNBBdzSZDK7+5cbI9XBLN0oayrVSHgFtt3R s0eA== X-Gm-Message-State: ACrzQf1yBXf6+mxqZzE2Qe98nzf0nFq1jFp/ClYqxsZLB+a5Gc7YRq6n obmu4lekcLnOoplK/wMku0IrJw== X-Google-Smtp-Source: AMsMyM4AkeeOBGLFE9c17vhZZpE95yA+NmUlhsM0m0/uy0qQjk/oLXIWqskqcLe4+RlXjAkxr4ZVnA== X-Received: by 2002:a50:c302:0:b0:463:26d6:25fb with SMTP id a2-20020a50c302000000b0046326d625fbmr55347903edb.204.1667992367157; Wed, 09 Nov 2022 03:12:47 -0800 (PST) Received: from localhost.localdomain ([194.29.137.22]) by smtp.gmail.com with ESMTPSA id k8-20020a1709062a4800b007ad9c826d75sm5825899eje.61.2022.11.09.03.12.45 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 09 Nov 2022 03:12:46 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: patches@linaro.org, Konrad Dybcio , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 03/10] arm64: dts: qcom: Add a device tree for PMK8350 on SID6 Date: Wed, 9 Nov 2022 12:12:28 +0100 Message-Id: <20221109111236.46003-4-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.32.0 (Apple Git-132) In-Reply-To: <20221109111236.46003-1-konrad.dybcio@linaro.org> References: <20221109111236.46003-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org PMK8350 is shipped on SID6 with some SoCs, for example with SM6375. Add a DT with the SID changed to allow it to work. Unfortunately, the entire DT needs to be copied even if the diff is very little, as the node names are not unique. Including pm6125 and pmk8350 together for example, would make pmk8350 overwrite the pm6125 node, as both are defined as 'pmic@0'. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/pmk8350_sid6.dtsi | 73 ++++++++++++++++++++++ 1 file changed, 73 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/pmk8350_sid6.dtsi diff --git a/arch/arm64/boot/dts/qcom/pmk8350_sid6.dtsi b/arch/arm64/boot/dts/qcom/pmk8350_sid6.dtsi new file mode 100644 index 000000000000..00390f8b9c97 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/pmk8350_sid6.dtsi @@ -0,0 +1,73 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2022, Linaro Limited + */ + +#include +#include +#include +#include + +&spmi_bus { + pmk8350: pmic@6 { + compatible = "qcom,pmk8350", "qcom,spmi-pmic"; + reg = <0x6 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pmk8350_pon: pon@1300 { + compatible = "qcom,pm8998-pon"; + reg = <0x1300>; + + pon_pwrkey: pwrkey { + compatible = "qcom,pmk8350-pwrkey"; + interrupts = <0x6 0x13 0x7 IRQ_TYPE_EDGE_BOTH>; + linux,code = ; + status = "disabled"; + }; + + pon_resin: resin { + compatible = "qcom,pmk8350-resin"; + interrupts = <0x6 0x13 0x6 IRQ_TYPE_EDGE_BOTH>; + status = "disabled"; + }; + }; + + pmk8350_vadc: adc@3100 { + compatible = "qcom,spmi-adc7"; + reg = <0x3100>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0x6 0x31 0x0 IRQ_TYPE_EDGE_RISING>; + #io-channel-cells = <1>; + }; + + pmk8350_adc_tm: adc-tm@3400 { + compatible = "qcom,adc-tm7"; + reg = <0x3400>; + interrupts = <0x6 0x34 0x0 IRQ_TYPE_EDGE_RISING>; + #address-cells = <1>; + #size-cells = <0>; + #thermal-sensor-cells = <1>; + status = "disabled"; + }; + + pmk8350_rtc: rtc@6100 { + compatible = "qcom,pmk8350-rtc"; + reg = <0x6100>, <0x6200>; + reg-names = "rtc", "alarm"; + interrupts = <0x6 0x62 0x1 IRQ_TYPE_EDGE_RISING>; + status = "disabled"; + }; + + pmk8350_gpios: gpio@b000 { + compatible = "qcom,pmk8350-gpio", "qcom,spmi-gpio"; + reg = <0xb000>; + gpio-controller; + gpio-ranges = <&pmk8350_gpios 0 0 4>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; +}; From patchwork Wed Nov 9 11:12:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 623086 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 99B8EC4332F for ; Wed, 9 Nov 2022 11:13:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230143AbiKILNC (ORCPT ); Wed, 9 Nov 2022 06:13:02 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57954 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229624AbiKILMz (ORCPT ); Wed, 9 Nov 2022 06:12:55 -0500 Received: from mail-ej1-x62c.google.com (mail-ej1-x62c.google.com [IPv6:2a00:1450:4864:20::62c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A18322935C for ; Wed, 9 Nov 2022 03:12:51 -0800 (PST) Received: by mail-ej1-x62c.google.com with SMTP id ft34so9381343ejc.12 for ; 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Wed, 09 Nov 2022 03:12:50 -0800 (PST) Received: from localhost.localdomain ([194.29.137.22]) by smtp.gmail.com with ESMTPSA id k8-20020a1709062a4800b007ad9c826d75sm5825899eje.61.2022.11.09.03.12.49 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 09 Nov 2022 03:12:49 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: patches@linaro.org, Konrad Dybcio , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 05/10] arm64: dts: qcom: sm6375: Add pin configs for some QUP configurations Date: Wed, 9 Nov 2022 12:12:30 +0100 Message-Id: <20221109111236.46003-6-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.32.0 (Apple Git-132) In-Reply-To: <20221109111236.46003-1-konrad.dybcio@linaro.org> References: <20221109111236.46003-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add the pin setup for SPI/I2C configurations that are supported downstream. I can guesstimate the correct settings for other buses, but: - I have no hardware to test it on - Some QUPs are straight up missing pin funcs in TLMM - Vendors probably didn't really care and used whatever was there in the reference design and BSP - should any other be used, they can be configured at a later time Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm6375.dtsi | 43 ++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6375.dtsi b/arch/arm64/boot/dts/qcom/sm6375.dtsi index 62a64dd731a0..952156891476 100644 --- a/arch/arm64/boot/dts/qcom/sm6375.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6375.dtsi @@ -519,6 +519,49 @@ tlmm: pinctrl@500000 { gpio-controller; #interrupt-cells = <2>; #gpio-cells = <2>; + + qup_i2c0_default: qup-i2c0-default-state { + pins = "gpio0", "gpio1"; + function = "qup00"; + drive-strength = <2>; + bias-pull-up; + }; + + qup_i2c1_default: qup-i2c1-default-state { + pins = "gpio61", "gpio62"; + function = "qup01"; + drive-strength = <2>; + bias-pull-up; + }; + + qup_i2c2_default: qup-i2c2-default-state { + pins = "gpio45", "gpio46"; + function = "qup02"; + drive-strength = <2>; + bias-pull-up; + }; + + qup_i2c8_default: qup-i2c8-default-state { + pins = "gpio19", "gpio20"; + /* TLMM, GCC and vendor DT all have different indices.. */ + function = "qup12"; + drive-strength = <2>; + bias-pull-up; + }; + + qup_i2c10_default: qup-i2c10-default-state { + pins = "gpio4", "gpio5"; + function = "qup10"; + drive-strength = <2>; + bias-pull-up; + }; + + qup_spi0_default: qup-spi0-default-state { + pins = "gpio0", "gpio1", "gpio2", "gpio3"; + function = "qup00"; + drive-strength = <6>; + bias-disable; + }; }; gcc: clock-controller@1400000 { From patchwork Wed Nov 9 11:12:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 623085 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9527AC433FE for ; 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Wed, 09 Nov 2022 03:12:53 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: patches@linaro.org, Konrad Dybcio , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 07/10] arm64: dts: qcom: sm6375-pdx225: Enable QUPs & GPI DMA Date: Wed, 9 Nov 2022 12:12:32 +0100 Message-Id: <20221109111236.46003-8-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.32.0 (Apple Git-132) In-Reply-To: <20221109111236.46003-1-konrad.dybcio@linaro.org> References: <20221109111236.46003-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Enable QUPs & GPI DMA on the Xperia 10 IV. Signed-off-by: Konrad Dybcio --- .../qcom/sm6375-sony-xperia-murray-pdx225.dts | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6375-sony-xperia-murray-pdx225.dts b/arch/arm64/boot/dts/qcom/sm6375-sony-xperia-murray-pdx225.dts index 450d4a557df1..6a0f4c0bf7ad 100644 --- a/arch/arm64/boot/dts/qcom/sm6375-sony-xperia-murray-pdx225.dts +++ b/arch/arm64/boot/dts/qcom/sm6375-sony-xperia-murray-pdx225.dts @@ -65,6 +65,22 @@ vph_pwr: vph-pwr-regulator { }; }; +&gpi_dma0 { + status = "okay"; +}; + +&gpi_dma1 { + status = "okay"; +}; + +&qupv3_id_0 { + status = "okay"; +}; + +&qupv3_id_1 { + status = "okay"; +}; + &tlmm { gpio-reserved-ranges = <13 4>; }; From patchwork Wed Nov 9 11:12:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 623084 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AC3C0C433FE for ; Wed, 9 Nov 2022 11:13:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230095AbiKILNc (ORCPT ); Wed, 9 Nov 2022 06:13:32 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58316 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230099AbiKILNM (ORCPT ); Wed, 9 Nov 2022 06:13:12 -0500 Received: from mail-ej1-x631.google.com (mail-ej1-x631.google.com [IPv6:2a00:1450:4864:20::631]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 998512A279 for ; Wed, 9 Nov 2022 03:12:57 -0800 (PST) Received: by mail-ej1-x631.google.com with SMTP id t25so45710021ejb.8 for ; Wed, 09 Nov 2022 03:12:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=qBu0DAqnkYkL46/OegDUIMhoEPze3QFWuGsvoEBwl2o=; b=gVtzcJ1byX8sZ9YhGkkBHz4BPLUdhB/GBMuoiJKeMG3vwJnn0sVv9lpDp6qHnhtFwn 7Pk59pAhnJJTq+tYRRWQ5ChctRlux3yUChdvGcPwwhHVCimfKK/7XnJFuaqp3g048hGe 7RkOT20iOCiBQa5oIAbpX76l26IfatlYmP0fsESP3KeT3ogJBW3l/4jlKqBRD0QpVtbs p7Q7dvXsp46DFfN2fsiWbqt3hpUZ1yrD1EXWKVRIVzTUNrMPL3MnXDfuaZ9hf9Tk3RlD Fbugwhrm09Qq6G5JzGX6H+qAy323n1sj7NcWyQDGwRznHy5tfGOLddL6F9gNMKQew0Cz x/pA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=qBu0DAqnkYkL46/OegDUIMhoEPze3QFWuGsvoEBwl2o=; b=BdnWt1lrQbou0xV/KmGI3nbDAs/VJHeFSKEtPKLDwF0AAL4X1SLQvvHtexhE9Pg1SD 16W/LZpEwWOTbNudGTdtXil1XGub1vr2MKFY4PQn3eryBt4MgS7V9jRB3tJwf8MnNmUv 5ZUVuCymSiGdAHJLpxFAuIbDaSNu7kBcp3eq1/3foVbHkzhgvxcM/rbGIGn7HezEOMzx UWmemXacz1eMRGWVy97dPjwyraLGHPzeMlUQvazC6syTzo2PFbR1+bbXvjdayS5cwu5X J7uCq1CsI+xXY27cNgvOl2xLYlLDqBtpAX9gw2bUxsEtWsReXb6nCle4o9bWP24k89M3 VE/w== X-Gm-Message-State: ACrzQf3YU4IseKTVuUNgqteLysc/TbUCVOeRMcqYdD8C7uW62y+KzW39 BB7r5cB8n1htfA5NzdJoumQ+mQ== X-Google-Smtp-Source: AMsMyM4w7fwX852mFaI/PVuvOoFvMYsBNRUhjoiOvMM3yx/cLRntUQ2JTgNFVwUtnEKMfdSWZ6ac8A== X-Received: by 2002:a17:906:5a49:b0:7ad:d063:901a with SMTP id my9-20020a1709065a4900b007add063901amr48974054ejc.323.1667992376546; Wed, 09 Nov 2022 03:12:56 -0800 (PST) Received: from localhost.localdomain ([194.29.137.22]) by smtp.gmail.com with ESMTPSA id k8-20020a1709062a4800b007ad9c826d75sm5825899eje.61.2022.11.09.03.12.55 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 09 Nov 2022 03:12:56 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: patches@linaro.org, Konrad Dybcio , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 09/10] arm64: dts: qcom: sm6375-pdx225: Configure SMD RPM regulators Date: Wed, 9 Nov 2022 12:12:34 +0100 Message-Id: <20221109111236.46003-10-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.32.0 (Apple Git-132) In-Reply-To: <20221109111236.46003-1-konrad.dybcio@linaro.org> References: <20221109111236.46003-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Configure regulators present on the Xperia 10 IV that are reachable via SMD RPM. Signed-off-by: Konrad Dybcio --- .../qcom/sm6375-sony-xperia-murray-pdx225.dts | 182 ++++++++++++++++++ 1 file changed, 182 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6375-sony-xperia-murray-pdx225.dts b/arch/arm64/boot/dts/qcom/sm6375-sony-xperia-murray-pdx225.dts index d34b4b96e1b9..17094e588a3a 100644 --- a/arch/arm64/boot/dts/qcom/sm6375-sony-xperia-murray-pdx225.dts +++ b/arch/arm64/boot/dts/qcom/sm6375-sony-xperia-murray-pdx225.dts @@ -95,6 +95,188 @@ &pon_resin { status = "okay"; }; +&rpm_requests { + regulators-0 { + compatible = "qcom,rpm-pm6125-regulators"; + + pm6125_s5: s5 { + regulator-min-microvolt = <382000>; + regulator-max-microvolt = <1120000>; + }; + + pm6125_s6: s6 { + regulator-min-microvolt = <320000>; + regulator-max-microvolt = <1374000>; + }; + + pm6125_s7: s7 { + regulator-min-microvolt = <1574000>; + regulator-max-microvolt = <2040000>; + }; + + /* + * S8 is VDD_GFX + * L1 is VDD_LPI_CX + */ + + pm6125_l2: l2 { + regulator-min-microvolt = <1170000>; + regulator-max-microvolt = <1304000>; + }; + + pm6125_l3: l3 { + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1300000>; + }; + + pm6125_l4: l4 { + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1300000>; + }; + + pm6125_l5: l5 { + regulator-min-microvolt = <1650000>; + regulator-max-microvolt = <3050000>; + }; + + pm6125_l6: l6 { + regulator-min-microvolt = <1080000>; + regulator-max-microvolt = <1304000>; + }; + + pm6125_l7: l7 { + regulator-min-microvolt = <720000>; + regulator-max-microvolt = <1050000>; + }; + + pm6125_l8: l8 { + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1304000>; + }; + + pm6125_l9: l9 { + regulator-min-microvolt = <1504000>; + regulator-max-microvolt = <2000000>; + }; + + pm6125_l10: l10 { + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <1980000>; + }; + + pm6125_l11: l11 { + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <1980000>; + }; + + pm6125_l12: l12 { + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <2000000>; + }; + + pm6125_l13: l13 { + regulator-min-microvolt = <1650000>; + regulator-max-microvolt = <1980000>; + }; + + pm6125_l14: l14 { + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <1900000>; + }; + + pm6125_l15: l15 { + regulator-min-microvolt = <1650000>; + regulator-max-microvolt = <3544000>; + }; + + pm6125_l16: l16 { + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <1980000>; + }; + + /* L17 is VDD_LPI_MX */ + + pm6125_l18: l18 { + regulator-min-microvolt = <830000>; + regulator-max-microvolt = <920000>; + }; + + pm6125_l19: l19 { + regulator-min-microvolt = <1624000>; + regulator-max-microvolt = <3304000>; + }; + + pm6125_l20: l20 { + regulator-min-microvolt = <1624000>; + regulator-max-microvolt = <3304000>; + }; + + pm6125_l21: l21 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3400000>; + }; + + pm6125_l22: l22 { + regulator-min-microvolt = <2704000>; + regulator-max-microvolt = <3544000>; + }; + + pm6125_l23: l23 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3400000>; + }; + + pm6125_l24: l24 { + regulator-min-microvolt = <2704000>; + regulator-max-microvolt = <3544000>; + }; + }; + + regulators-1 { + compatible = "qcom,rpm-pmr735a-regulators"; + + /* + * S1 is VDD_MX + * S2 is VDD_CX + */ + + pmr735a_l1: l1 { + regulator-min-microvolt = <570000>; + regulator-max-microvolt = <650000>; + }; + + pmr735a_l2: l2 { + regulator-min-microvolt = <352000>; + regulator-max-microvolt = <796000>; + }; + + pmr735a_l3: l3 { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1200000>; + }; + + pmr735a_l4: l4 { + regulator-min-microvolt = <1504000>; + regulator-max-microvolt = <2000000>; + }; + + pmr735a_l5: l5 { + regulator-min-microvolt = <751000>; + regulator-max-microvolt = <824000>; + }; + + pmr735a_l6: l6 { + regulator-min-microvolt = <504000>; + regulator-max-microvolt = <868000>; + }; + + pmr735a_l7: l7 { + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3544000>; + }; + }; +}; + &qupv3_id_0 { status = "okay"; };