From patchwork Mon Nov 7 05:35:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Samuel Holland X-Patchwork-Id: 622454 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EA16AC4332F for ; Mon, 7 Nov 2022 05:36:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230478AbiKGFgA (ORCPT ); Mon, 7 Nov 2022 00:36:00 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54090 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230394AbiKGFf6 (ORCPT ); Mon, 7 Nov 2022 00:35:58 -0500 Received: from out3-smtp.messagingengine.com (out3-smtp.messagingengine.com [66.111.4.27]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0FA021E2; Sun, 6 Nov 2022 21:35:58 -0800 (PST) Received: from compute5.internal (compute5.nyi.internal [10.202.2.45]) by mailout.nyi.internal (Postfix) with ESMTP id 76AA75C00E2; Mon, 7 Nov 2022 00:35:57 -0500 (EST) Received: from mailfrontend2 ([10.202.2.163]) by compute5.internal (MEProxy); Mon, 07 Nov 2022 00:35:57 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sholland.org; h= cc:cc:content-transfer-encoding:date:date:from:from:in-reply-to :in-reply-to:message-id:mime-version:references:reply-to:sender :subject:subject:to:to; s=fm1; t=1667799357; x=1667885757; bh=XO S3JN6XNHJjuLSX9mYtAFmUbNNKkKhsMQg7RXfIvl8=; b=lcQTpLQ2lKPVay2JKO AA+dZXwjhdR1FAIPE4vfd4d9H5SkVJ5RG1sZjZ4hbIB/qbggMBT66yUs3g3h4aGD uCIyTa5TQp15XO87DcuG1aQyZj9mtgZPAZPb5WjHE2Adkxx7oTLzri3i/bv1fPDm 4w51JMvyDBhCTzwoaSz0S1K6S9AQoWBnpmVKXD16c3/Vss7/Mwri0en+wnyb45Zp +Ox4xC+lOK3j0l3HtEjYrcBg2jcjFLFi1Fr4DgohYtZAsJxztVIg467KgcJa3k3s xtK0eAvhhY9XKaTOWqtFFvgrO5a4DUHGkdADBQ9qRvhM38PRpXz99xkablY3jX5O 7Byw== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding:date:date :feedback-id:feedback-id:from:from:in-reply-to:in-reply-to :message-id:mime-version:references:reply-to:sender:subject :subject:to:to:x-me-proxy:x-me-proxy:x-me-sender:x-me-sender :x-sasl-enc; s=fm3; t=1667799357; x=1667885757; bh=XOS3JN6XNHJju LSX9mYtAFmUbNNKkKhsMQg7RXfIvl8=; b=dTaH4BYcqDFA+iJYWY4osHn0IA528 daRlsgfbclwP1n5+wDMzhNKMKkhieWDoEkn+RXUFDeBloKfuBLIltQ7iXfQOxTCx ukx17uWmWfLSERGJBAo2SFnWdNp6LIIS8BuLBAztOESAafBxd/Zv9yDTvmPFxK/n 5SfVTqXPdofDOZjtJ1Q4EKmrcpCZuF+DPoa7KtoQW9p+aWWj7LLcRuEcb0qdplIT E14dXws7Wn+A5ZGEbL5qBlm8TRT3TWBpA5Pa8yCADwWwTXhym6JsiOIE/ZyZxwUo PLpzGGKDv1iwVMlaQur+hanuyHV1A6h8tf/EHfXM6XbziPgzNdMGVjFug== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvgedrvdejgdekgecutefuodetggdotefrodftvf curfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfghnecu uegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmdenuc fjughrpefhvfevufffkffojghfggfgsedtkeertdertddtnecuhfhrohhmpefurghmuhgv lhcujfholhhlrghnugcuoehsrghmuhgvlhesshhhohhllhgrnhgurdhorhhgqeenucggtf frrghtthgvrhhnpedukeetueduhedtleetvefguddvvdejhfefudelgfduveeggeehgfdu feeitdevteenucevlhhushhtvghrufhiiigvpedunecurfgrrhgrmhepmhgrihhlfhhroh hmpehsrghmuhgvlhesshhhohhllhgrnhgurdhorhhg X-ME-Proxy: Feedback-ID: i0ad843c9:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Mon, 7 Nov 2022 00:35:56 -0500 (EST) From: Samuel Holland To: Chen-Yu Tsai , Jernej Skrabec , Maxime Ripard Cc: Samuel Holland , Daniel Vetter , David Airlie , Jagan Teki , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-sunxi@lists.linux.dev, Krzysztof Kozlowski Subject: [PATCH v2 2/4] dt-bindings: display: sun6i-dsi: Add the A100 variant Date: Sun, 6 Nov 2022 23:35:50 -0600 Message-Id: <20221107053552.2330-3-samuel@sholland.org> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20221107053552.2330-1-samuel@sholland.org> References: <20221107053552.2330-1-samuel@sholland.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The "40nm" MIPI DSI controller found in the A100 and D1 SoCs has the same register layout as previous SoC integrations. However, its module clock now comes from the TCON, which means it no longer runs at a fixed rate, so this needs to be distinguished in the driver. The controller also now uses pins on Port D instead of dedicated pins, so it drops the separate power domain. Acked-by: Krzysztof Kozlowski Signed-off-by: Samuel Holland --- Removal of the vcc-dsi-supply is maybe a bit questionable. Since there is no "VCC-DSI" pin anymore, it's not obvious which pin actually does power the DSI controller/PHY. Possibly power comes from VCC-PD or VCC-IO or VCC-LVDS. So far, all boards have all of these as always-on supplies, so it is hard to test. (no changes since v1) .../display/allwinner,sun6i-a31-mipi-dsi.yaml | 28 +++++++++++++++---- 1 file changed, 23 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml b/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml index bf9bfe8f88ae..c731fbdc2fe0 100644 --- a/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml +++ b/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml @@ -12,9 +12,14 @@ maintainers: properties: compatible: - enum: - - allwinner,sun6i-a31-mipi-dsi - - allwinner,sun50i-a64-mipi-dsi + oneOf: + - enum: + - allwinner,sun6i-a31-mipi-dsi + - allwinner,sun50i-a64-mipi-dsi + - allwinner,sun50i-a100-mipi-dsi + - items: + - const: allwinner,sun20i-d1-mipi-dsi + - const: allwinner,sun50i-a100-mipi-dsi reg: maxItems: 1 @@ -59,7 +64,6 @@ required: - phys - phy-names - resets - - vcc-dsi-supply - port allOf: @@ -68,7 +72,9 @@ allOf: properties: compatible: contains: - const: allwinner,sun6i-a31-mipi-dsi + enum: + - allwinner,sun6i-a31-mipi-dsi + - allwinner,sun50i-a100-mipi-dsi then: properties: @@ -83,6 +89,18 @@ allOf: clocks: maxItems: 1 + - if: + properties: + compatible: + contains: + enum: + - allwinner,sun6i-a31-mipi-dsi + - allwinner,sun50i-a64-mipi-dsi + + then: + required: + - vcc-dsi-supply + unevaluatedProperties: false examples: From patchwork Mon Nov 7 05:35:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Samuel Holland X-Patchwork-Id: 622453 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C196AC4332F for ; Mon, 7 Nov 2022 05:36:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231128AbiKGFgK (ORCPT ); Mon, 7 Nov 2022 00:36:10 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54160 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230480AbiKGFgB (ORCPT ); Mon, 7 Nov 2022 00:36:01 -0500 Received: from out3-smtp.messagingengine.com (out3-smtp.messagingengine.com [66.111.4.27]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5A8FA6461; Sun, 6 Nov 2022 21:36:00 -0800 (PST) Received: from compute5.internal (compute5.nyi.internal [10.202.2.45]) by mailout.nyi.internal (Postfix) with ESMTP id C40E25C010F; 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Mon, 7 Nov 2022 00:35:58 -0500 (EST) From: Samuel Holland To: Chen-Yu Tsai , Jernej Skrabec , Maxime Ripard Cc: Samuel Holland , Daniel Vetter , David Airlie , Jagan Teki , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-sunxi@lists.linux.dev Subject: [PATCH v2 4/4] drm/sun4i: dsi: Add the A100 variant Date: Sun, 6 Nov 2022 23:35:52 -0600 Message-Id: <20221107053552.2330-5-samuel@sholland.org> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20221107053552.2330-1-samuel@sholland.org> References: <20221107053552.2330-1-samuel@sholland.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The A100 variant of the MIPI DSI controller now gets its module clock from the TCON via the TCON TOP, so the clock rate cannot be set to a fixed value. Otherwise, it appears to be the same as the A31 variant. Reviewed-by: Jernej Skrabec Signed-off-by: Samuel Holland --- (no changes since v1) drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c index f22c96cc8408..760ff05eabf4 100644 --- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c +++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c @@ -1223,6 +1223,10 @@ static const struct sun6i_dsi_variant sun6i_a31_mipi_dsi_variant = { static const struct sun6i_dsi_variant sun50i_a64_mipi_dsi_variant = { }; +static const struct sun6i_dsi_variant sun50i_a100_mipi_dsi_variant = { + .has_mod_clk = true, +}; + static const struct of_device_id sun6i_dsi_of_table[] = { { .compatible = "allwinner,sun6i-a31-mipi-dsi", @@ -1232,6 +1236,10 @@ static const struct of_device_id sun6i_dsi_of_table[] = { .compatible = "allwinner,sun50i-a64-mipi-dsi", .data = &sun50i_a64_mipi_dsi_variant, }, + { + .compatible = "allwinner,sun50i-a100-mipi-dsi", + .data = &sun50i_a100_mipi_dsi_variant, + }, { } }; MODULE_DEVICE_TABLE(of, sun6i_dsi_of_table);