From patchwork Thu Nov 3 07:09:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 621121 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AD215C4332F for ; Thu, 3 Nov 2022 07:09:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230304AbiKCHJn (ORCPT ); Thu, 3 Nov 2022 03:09:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44630 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230199AbiKCHJh (ORCPT ); Thu, 3 Nov 2022 03:09:37 -0400 Received: from mail-pj1-x102d.google.com (mail-pj1-x102d.google.com [IPv6:2607:f8b0:4864:20::102d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 81460B03 for ; Thu, 3 Nov 2022 00:09:36 -0700 (PDT) Received: by mail-pj1-x102d.google.com with SMTP id d13-20020a17090a3b0d00b00213519dfe4aso1021675pjc.2 for ; Thu, 03 Nov 2022 00:09:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=JN29pqfeXaCY6uUhTSSm/1Wk5X+qrDwD0Uu9gTvsA5c=; b=WAJBi08HUJdLEcCYBwpzGLPrA17DQIosO0uIXICBRb5YTpvUzviUauqGIJSQ5gG6Zp EdKue3qFmNhgrKUISX7xmNT2EpOtYo8sk7n89NlZ1VLet4vq/OYh3/d4suV2GW6MhWqP efAJ2EvqA2Gkjg2GyI2qmF2SNcBzhg0w3S62cv5uyzO6MNrKkV5gUIq1U3iugl7dkTLi kk38nOWJU5Bvq/NIwbK4vMi7RzKidAT+D9MYX1NXPwOiRXL4eVTLH83ofbTJPOJ994qO sNkBDyNRqA+0cXAVPTet9eeboU8O5KKTj7Sr+OWFZfshRKvgkyLCDI6u+DAqXF82XrPg WeQA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=JN29pqfeXaCY6uUhTSSm/1Wk5X+qrDwD0Uu9gTvsA5c=; b=gPxjpEatC+IhT+RagLR4+e2ZXK0WR20UZBecrHLLzcuR9byVHVYTjW21mqOqoVR7Jx M4zpqkTvjVbe3X2681WAV4BkB+70jr0J7siBxPHLQpPOyNYH++uGe5EJZam8M8Q+Sci0 onqL0XCACMFQRSreKIakTzR0QxhFq/o75wjUcFVWEytw6pPAtXnLH8kJo8jIQolv22oL 0zQrrlVcjlBTFfv9UTX3TB7/E030uNgU72Wpa4coczGS/8UYaGb3oXWCwiSHIJUBeKa7 +lLyZf+GDHrvCZ1NpRfRLTbOW6b3Jv/tQzTeRCi7fBJ5WpwXh64HY2zas+7xpetpKg7l gVLQ== X-Gm-Message-State: ACrzQf2rpW/pC/50WHEVjP2bnCMLtbIxPvkS5c+J3sGqab46WxZlsL+8 zQlXceg29lHETuq4rWgbKqo6 X-Google-Smtp-Source: AMsMyM6HXnJxpKMYizHiMqAatZKfYXDWe+ZyAR2r709UgzHQTWiRA8S+VgAxM3gn7AVUAu+TrZiJnQ== X-Received: by 2002:a17:902:f64f:b0:179:edcc:2bf4 with SMTP id m15-20020a170902f64f00b00179edcc2bf4mr28759311plg.70.1667459375972; Thu, 03 Nov 2022 00:09:35 -0700 (PDT) Received: from localhost.localdomain ([117.193.208.64]) by smtp.gmail.com with ESMTPSA id s9-20020a170903214900b00186748fe6ccsm9451244ple.214.2022.11.03.00.09.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Nov 2022 00:09:34 -0700 (PDT) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@somainline.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, johan+linaro@kernel.org, quic_jprakash@quicinc.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, steev@kali.org, Manivannan Sadhasivam , Krzysztof Kozlowski , Rob Herring Subject: [PATCH v3 01/12] dt-bindings: iio: qcom: adc7-pm8350: Allow specifying SID for channels Date: Thu, 3 Nov 2022 12:39:00 +0530 Message-Id: <20221103070911.20019-2-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221103070911.20019-1-manivannan.sadhasivam@linaro.org> References: <20221103070911.20019-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org As per the new ADC7 architecture used by the Qualcomm PMICs, each PMIC has the static Slave ID (SID) assigned by default. The primary PMIC PMK8350 is responsible for collecting the temperature/voltage data from the slave PMICs and exposing them via it's registers. For getting the measurements from the slave PMICs, PMK8350 uses the channel ID encoded with the SID of the relevant PMIC. So far, the dt-binding for the slave PMIC PM8350 assumed that there will be only one PM8350 in a system. So it harcoded SID 1 with channel IDs. But this got changed in platforms such as Lenovo X13s where there are a couple of PM8350 PMICs available. So to address multiple PM8350s, change the binding to accept the SID specified by the user and use it for encoding the channel ID. It should be noted that, even though the SID is static it is not globally unique. Only the primary PMIC has the unique SID id 0. Reviewed-by: Krzysztof Kozlowski Acked-by: Rob Herring Signed-off-by: Manivannan Sadhasivam --- .../bindings/thermal/qcom-spmi-adc-tm5.yaml | 6 +- .../dt-bindings/iio/qcom,spmi-adc7-pm8350.h | 90 +++++++++---------- 2 files changed, 46 insertions(+), 50 deletions(-) diff --git a/Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm5.yaml b/Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm5.yaml index feb390d50696..d20569b9b763 100644 --- a/Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm5.yaml +++ b/Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm5.yaml @@ -222,8 +222,8 @@ examples: qcom,hw-settle-time = <200>; }; - conn-therm@47 { - reg = ; + conn-therm@147 { + reg = ; qcom,ratiometric; qcom,hw-settle-time = <200>; }; @@ -247,7 +247,7 @@ examples: conn-therm@1 { reg = <1>; - io-channels = <&pmk8350_vadc PM8350_ADC7_AMUX_THM4_100K_PU>; + io-channels = <&pmk8350_vadc PM8350_ADC7_AMUX_THM4_100K_PU(1)>; qcom,avg-samples = <2>; qcom,ratiometric; qcom,hw-settle-time-us = <200>; diff --git a/include/dt-bindings/iio/qcom,spmi-adc7-pm8350.h b/include/dt-bindings/iio/qcom,spmi-adc7-pm8350.h index 9426f27a1946..09fd169ad18e 100644 --- a/include/dt-bindings/iio/qcom,spmi-adc7-pm8350.h +++ b/include/dt-bindings/iio/qcom,spmi-adc7-pm8350.h @@ -6,62 +6,58 @@ #ifndef _DT_BINDINGS_QCOM_SPMI_VADC_PM8350_H #define _DT_BINDINGS_QCOM_SPMI_VADC_PM8350_H -#ifndef PM8350_SID -#define PM8350_SID 1 -#endif - /* ADC channels for PM8350_ADC for PMIC7 */ -#define PM8350_ADC7_REF_GND (PM8350_SID << 8 | 0x0) -#define PM8350_ADC7_1P25VREF (PM8350_SID << 8 | 0x01) -#define PM8350_ADC7_VREF_VADC (PM8350_SID << 8 | 0x02) -#define PM8350_ADC7_DIE_TEMP (PM8350_SID << 8 | 0x03) - -#define PM8350_ADC7_AMUX_THM1 (PM8350_SID << 8 | 0x04) -#define PM8350_ADC7_AMUX_THM2 (PM8350_SID << 8 | 0x05) -#define PM8350_ADC7_AMUX_THM3 (PM8350_SID << 8 | 0x06) -#define PM8350_ADC7_AMUX_THM4 (PM8350_SID << 8 | 0x07) -#define PM8350_ADC7_AMUX_THM5 (PM8350_SID << 8 | 0x08) -#define PM8350_ADC7_GPIO1 (PM8350_SID << 8 | 0x0a) -#define PM8350_ADC7_GPIO2 (PM8350_SID << 8 | 0x0b) -#define PM8350_ADC7_GPIO3 (PM8350_SID << 8 | 0x0c) -#define PM8350_ADC7_GPIO4 (PM8350_SID << 8 | 0x0d) +#define PM8350_ADC7_REF_GND(sid) ((sid) << 8 | 0x0) +#define PM8350_ADC7_1P25VREF(sid) ((sid) << 8 | 0x01) +#define PM8350_ADC7_VREF_VADC(sid) ((sid) << 8 | 0x02) +#define PM8350_ADC7_DIE_TEMP(sid) ((sid) << 8 | 0x03) + +#define PM8350_ADC7_AMUX_THM1(sid) ((sid) << 8 | 0x04) +#define PM8350_ADC7_AMUX_THM2(sid) ((sid) << 8 | 0x05) +#define PM8350_ADC7_AMUX_THM3(sid) ((sid) << 8 | 0x06) +#define PM8350_ADC7_AMUX_THM4(sid) ((sid) << 8 | 0x07) +#define PM8350_ADC7_AMUX_THM5(sid) ((sid) << 8 | 0x08) +#define PM8350_ADC7_GPIO1(sid) ((sid) << 8 | 0x0a) +#define PM8350_ADC7_GPIO2(sid) ((sid) << 8 | 0x0b) +#define PM8350_ADC7_GPIO3(sid) ((sid) << 8 | 0x0c) +#define PM8350_ADC7_GPIO4(sid) ((sid) << 8 | 0x0d) /* 30k pull-up1 */ -#define PM8350_ADC7_AMUX_THM1_30K_PU (PM8350_SID << 8 | 0x24) -#define PM8350_ADC7_AMUX_THM2_30K_PU (PM8350_SID << 8 | 0x25) -#define PM8350_ADC7_AMUX_THM3_30K_PU (PM8350_SID << 8 | 0x26) -#define PM8350_ADC7_AMUX_THM4_30K_PU (PM8350_SID << 8 | 0x27) -#define PM8350_ADC7_AMUX_THM5_30K_PU (PM8350_SID << 8 | 0x28) -#define PM8350_ADC7_GPIO1_30K_PU (PM8350_SID << 8 | 0x2a) -#define PM8350_ADC7_GPIO2_30K_PU (PM8350_SID << 8 | 0x2b) -#define PM8350_ADC7_GPIO3_30K_PU (PM8350_SID << 8 | 0x2c) -#define PM8350_ADC7_GPIO4_30K_PU (PM8350_SID << 8 | 0x2d) +#define PM8350_ADC7_AMUX_THM1_30K_PU(sid) ((sid) << 8 | 0x24) +#define PM8350_ADC7_AMUX_THM2_30K_PU(sid) ((sid) << 8 | 0x25) +#define PM8350_ADC7_AMUX_THM3_30K_PU(sid) ((sid) << 8 | 0x26) +#define PM8350_ADC7_AMUX_THM4_30K_PU(sid) ((sid) << 8 | 0x27) +#define PM8350_ADC7_AMUX_THM5_30K_PU(sid) ((sid) << 8 | 0x28) +#define PM8350_ADC7_GPIO1_30K_PU(sid) ((sid) << 8 | 0x2a) +#define PM8350_ADC7_GPIO2_30K_PU(sid) ((sid) << 8 | 0x2b) +#define PM8350_ADC7_GPIO3_30K_PU(sid) ((sid) << 8 | 0x2c) +#define PM8350_ADC7_GPIO4_30K_PU(sid) ((sid) << 8 | 0x2d) /* 100k pull-up2 */ -#define PM8350_ADC7_AMUX_THM1_100K_PU (PM8350_SID << 8 | 0x44) -#define PM8350_ADC7_AMUX_THM2_100K_PU (PM8350_SID << 8 | 0x45) -#define PM8350_ADC7_AMUX_THM3_100K_PU (PM8350_SID << 8 | 0x46) -#define PM8350_ADC7_AMUX_THM4_100K_PU (PM8350_SID << 8 | 0x47) -#define PM8350_ADC7_AMUX_THM5_100K_PU (PM8350_SID << 8 | 0x48) -#define PM8350_ADC7_GPIO1_100K_PU (PM8350_SID << 8 | 0x4a) -#define PM8350_ADC7_GPIO2_100K_PU (PM8350_SID << 8 | 0x4b) -#define PM8350_ADC7_GPIO3_100K_PU (PM8350_SID << 8 | 0x4c) -#define PM8350_ADC7_GPIO4_100K_PU (PM8350_SID << 8 | 0x4d) +#define PM8350_ADC7_AMUX_THM1_100K_PU(sid) ((sid) << 8 | 0x44) +#define PM8350_ADC7_AMUX_THM2_100K_PU(sid) ((sid) << 8 | 0x45) +#define PM8350_ADC7_AMUX_THM3_100K_PU(sid) ((sid) << 8 | 0x46) +#define PM8350_ADC7_AMUX_THM4_100K_PU(sid) ((sid) << 8 | 0x47) +#define PM8350_ADC7_AMUX_THM5_100K_PU(sid) ((sid) << 8 | 0x48) +#define PM8350_ADC7_GPIO1_100K_PU(sid) ((sid) << 8 | 0x4a) +#define PM8350_ADC7_GPIO2_100K_PU(sid) ((sid) << 8 | 0x4b) +#define PM8350_ADC7_GPIO3_100K_PU(sid) ((sid) << 8 | 0x4c) +#define PM8350_ADC7_GPIO4_100K_PU(sid) ((sid) << 8 | 0x4d) /* 400k pull-up3 */ -#define PM8350_ADC7_AMUX_THM1_400K_PU (PM8350_SID << 8 | 0x64) -#define PM8350_ADC7_AMUX_THM2_400K_PU (PM8350_SID << 8 | 0x65) -#define PM8350_ADC7_AMUX_THM3_400K_PU (PM8350_SID << 8 | 0x66) -#define PM8350_ADC7_AMUX_THM4_400K_PU (PM8350_SID << 8 | 0x67) -#define PM8350_ADC7_AMUX_THM5_400K_PU (PM8350_SID << 8 | 0x68) -#define PM8350_ADC7_GPIO1_400K_PU (PM8350_SID << 8 | 0x6a) -#define PM8350_ADC7_GPIO2_400K_PU (PM8350_SID << 8 | 0x6b) -#define PM8350_ADC7_GPIO3_400K_PU (PM8350_SID << 8 | 0x6c) -#define PM8350_ADC7_GPIO4_400K_PU (PM8350_SID << 8 | 0x6d) +#define PM8350_ADC7_AMUX_THM1_400K_PU(sid) ((sid) << 8 | 0x64) +#define PM8350_ADC7_AMUX_THM2_400K_PU(sid) ((sid) << 8 | 0x65) +#define PM8350_ADC7_AMUX_THM3_400K_PU(sid) ((sid) << 8 | 0x66) +#define PM8350_ADC7_AMUX_THM4_400K_PU(sid) ((sid) << 8 | 0x67) +#define PM8350_ADC7_AMUX_THM5_400K_PU(sid) ((sid) << 8 | 0x68) +#define PM8350_ADC7_GPIO1_400K_PU(sid) ((sid) << 8 | 0x6a) +#define PM8350_ADC7_GPIO2_400K_PU(sid) ((sid) << 8 | 0x6b) +#define PM8350_ADC7_GPIO3_400K_PU(sid) ((sid) << 8 | 0x6c) +#define PM8350_ADC7_GPIO4_400K_PU(sid) ((sid) << 8 | 0x6d) /* 1/3 Divider */ -#define PM8350_ADC7_GPIO4_DIV3 (PM8350_SID << 8 | 0x8d) +#define PM8350_ADC7_GPIO4_DIV3(sid) ((sid) << 8 | 0x8d) -#define PM8350_ADC7_VPH_PWR (PM8350_SID << 8 | 0x8e) +#define PM8350_ADC7_VPH_PWR(sid) ((sid) << 8 | 0x8e) #endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PM8350_H */ From patchwork Thu Nov 3 07:09:01 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 621460 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org 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linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, steev@kali.org, Manivannan Sadhasivam , Krzysztof Kozlowski Subject: [PATCH v3 02/12] arm64: dts: qcom: sc8280xp-pmics: Add temp alarm for PM8280_{1/2} PMICs Date: Thu, 3 Nov 2022 12:39:01 +0530 Message-Id: <20221103070911.20019-3-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221103070911.20019-1-manivannan.sadhasivam@linaro.org> References: <20221103070911.20019-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add support for temperature alarm feature in the PM8280_{1/2} PMICs. Reviewed-by: Konrad Dybcio Reviewed-by: Krzysztof Kozlowski Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi index 24836b6b9bbc..5de47b1434a4 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi @@ -33,6 +33,13 @@ pmc8280_1: pmic@1 { #address-cells = <1>; #size-cells = <0>; + pm8280_1_temp_alarm: temp-alarm@a00 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0xa00>; + interrupts = <0x1 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells = <0>; + }; + pmc8280_1_gpios: gpio@8800 { compatible = "qcom,pm8350-gpio", "qcom,spmi-gpio"; reg = <0x8800>; @@ -78,6 +85,13 @@ pmc8280_2: pmic@3 { #address-cells = <1>; #size-cells = <0>; + pm8280_2_temp_alarm: temp-alarm@a00 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0xa00>; + interrupts = <0x2 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells = <0>; + }; + pmc8280_2_gpios: gpio@8800 { compatible = "qcom,pm8350-gpio", "qcom,spmi-gpio"; reg = <0x8800>; From patchwork Thu Nov 3 07:09:02 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 621120 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D788BC43219 for ; Thu, 3 Nov 2022 07:10:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230526AbiKCHJ7 (ORCPT ); Thu, 3 Nov 2022 03:09:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44666 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230387AbiKCHJu (ORCPT ); Thu, 3 Nov 2022 03:09:50 -0400 Received: from mail-pf1-x435.google.com (mail-pf1-x435.google.com [IPv6:2607:f8b0:4864:20::435]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 548C1B1C7 for ; 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Temperature trip points are inherited from PM8350 PMIC. Reviewed-by: Konrad Dybcio Reviewed-by: Krzysztof Kozlowski Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi | 44 ++++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi index 5de47b1434a4..397ff4995003 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi @@ -7,6 +7,50 @@ #include #include +/ { + thermal-zones { + pm8280_1_thermal: pm8280-1-thermal { + polling-delay-passive = <100>; + polling-delay = <0>; + thermal-sensors = <&pm8280_1_temp_alarm>; + + trips { + trip0 { + temperature = <95000>; + hysteresis = <0>; + type = "passive"; + }; + + trip1 { + temperature = <115000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; + + pm8280_2_thermal: pm8280-2-thermal { + polling-delay-passive = <100>; + polling-delay = <0>; + thermal-sensors = <&pm8280_2_temp_alarm>; + + trips { + trip0 { + temperature = <95000>; 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Thu, 03 Nov 2022 00:09:51 -0700 (PDT) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@somainline.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, johan+linaro@kernel.org, quic_jprakash@quicinc.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, steev@kali.org, Manivannan Sadhasivam , Krzysztof Kozlowski Subject: [PATCH v3 04/12] arm64: dts: qcom: sc8280xp-pmics: Add support for PMK8280 RESIN input Date: Thu, 3 Nov 2022 12:39:03 +0530 Message-Id: <20221103070911.20019-5-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221103070911.20019-1-manivannan.sadhasivam@linaro.org> References: <20221103070911.20019-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The RESIN input can be used to reset the PMK8280 PMIC. Enabling the RESIN block allows the PMK8280 to detect reset input via RESIN_N pin. Reviewed-by: Konrad Dybcio Reviewed-by: Krzysztof Kozlowski Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi index 397ff4995003..4a3464f5e6e9 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi @@ -68,6 +68,12 @@ pmk8280_pon_pwrkey: pwrkey { linux,code = ; status = "disabled"; }; + + pmk8280_pon_resin: resin { + compatible = "qcom,pmk8350-resin"; + interrupts = <0x0 0x13 0x6 IRQ_TYPE_EDGE_BOTH>; + status = "disabled"; + }; }; }; From patchwork Thu Nov 3 07:09:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 621119 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 43D06C433FE for ; Thu, 3 Nov 2022 07:10:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230370AbiKCHKP (ORCPT ); Thu, 3 Nov 2022 03:10:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45162 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230525AbiKCHJ7 (ORCPT ); Thu, 3 Nov 2022 03:09:59 -0400 Received: from mail-pf1-x42d.google.com (mail-pf1-x42d.google.com [IPv6:2607:f8b0:4864:20::42d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F1A4F6374 for ; Thu, 3 Nov 2022 00:09:57 -0700 (PDT) Received: by mail-pf1-x42d.google.com with SMTP id 130so835822pfu.8 for ; Thu, 03 Nov 2022 00:09:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=JthYgOPJ8wLY+kJmpPo6YRkYw++3oIBC9/8kQpa43wk=; b=oqa2VR9xM7LgVSNeC59MrGPOve0uvlM/fYcJg4WIl+XyrrmYrNORIBh0taFvj7UFIH /izDRvXpS7JYP8andHnU7pV2PSKeLlDucZzPBloaRZ1/NFKMrVCSysRxRcmJ582IHFHg jUAUtquqZkHh1PrfSinyLc/L17ETX98Zf5WB440e5zfby9z+mkSwgDn1IzQfEXtt3tbE hDx9UY8UVQdNAuH+rtlF46qViU+fiXrteEQBE5WfxZXAx4xMR6AmbyXfY9tWmuP2tWI5 8Xyxd/0zzSsE7jhYyI+uiphql2CRxUcCa/eb9twN6rXwS5QCdtjkR2WmUvoC8/zQbjsR oh5g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=JthYgOPJ8wLY+kJmpPo6YRkYw++3oIBC9/8kQpa43wk=; b=XSCcx39hIRRqFD0n1cncp01wieEkRAGo/NTohiayjXkgzKoAHlE0HvKYQbq7AIEpvK HvKx94VCd/UtBo0u0nkVwDZdyJw50f09Ixw4vZOBzd88kJD1255mLAAemulUpJAkDfoy q+T6vo6RzlP/gXW9LgKZ0Qy/JJkG4kJ/GFuRQXgaXwWsPdRtYVbWRANzOGz2BCBbEWKM k32MVC3f3ucnAknJ7rNmBWspOAY+mNRsW7y8gQ23rEdoBZMkFvUBZ/BjnfoEoGZETE5y xN36yx7VQva//lJi3HZMOBfHk1jzk0xUu7XrB9IN2lC5B6jBmMsYtx8WPqoFK+ZfrYWC yuOg== X-Gm-Message-State: ACrzQf0N2QY2DUIuMgVdL/6EJmCJlVYMV8OWPJDCuvqGmTEkYNqWMoIc ORYN9yQVstKLyB2XTO1P/Zo1 X-Google-Smtp-Source: AMsMyM6cUWZGog+Q3n/SQktIYFBOMxAyQ0e5FfsXA2Ts0Vfp96sI51AJBJh1v2hEToxAkBP4nZowGA== X-Received: by 2002:a05:6a00:1253:b0:56d:8742:a9ff with SMTP id u19-20020a056a00125300b0056d8742a9ffmr18618778pfi.5.1667459397638; Thu, 03 Nov 2022 00:09:57 -0700 (PDT) Received: from localhost.localdomain ([117.193.208.64]) by smtp.gmail.com with ESMTPSA id s9-20020a170903214900b00186748fe6ccsm9451244ple.214.2022.11.03.00.09.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Nov 2022 00:09:56 -0700 (PDT) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@somainline.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, johan+linaro@kernel.org, quic_jprakash@quicinc.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, steev@kali.org, Manivannan Sadhasivam , Krzysztof Kozlowski Subject: [PATCH v3 05/12] arm64: dts: qcom: sc8280xp-pmics: Add PMK8280 ADC7 block Date: Thu, 3 Nov 2022 12:39:04 +0530 Message-Id: <20221103070911.20019-6-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221103070911.20019-1-manivannan.sadhasivam@linaro.org> References: <20221103070911.20019-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add support for ADC7 block available in PMK8280 for reading the temperature via the AMUX pins. Reviewed-by: Krzysztof Kozlowski Reviewed-by: Konrad Dybcio Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi index 4a3464f5e6e9..b1cdde2f7861 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi @@ -75,6 +75,16 @@ pmk8280_pon_resin: resin { status = "disabled"; }; }; + + pmk8280_vadc: adc@3100 { + compatible = "qcom,spmi-adc7"; + reg = <0x3100>; + interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; + #address-cells = <1>; + #size-cells = <0>; + #io-channel-cells = <1>; + status = "disabled"; + }; }; pmc8280_1: pmic@1 { From patchwork Thu Nov 3 07:09:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 621458 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6A9A8C43217 for ; Thu, 3 Nov 2022 07:10:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231231AbiKCHK1 (ORCPT ); Thu, 3 Nov 2022 03:10:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45068 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230433AbiKCHKF (ORCPT ); Thu, 3 Nov 2022 03:10:05 -0400 Received: from mail-pj1-x102c.google.com (mail-pj1-x102c.google.com [IPv6:2607:f8b0:4864:20::102c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C9B3EB03 for ; Thu, 3 Nov 2022 00:10:03 -0700 (PDT) Received: by mail-pj1-x102c.google.com with SMTP id k5so817287pjo.5 for ; Thu, 03 Nov 2022 00:10:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ZeYJbVuqGDHsqyzLjF7twJNYqifLyyH6qytnIHxb/r8=; b=ok6MJ8U8j3Ib/3c3DFsgqYs512jMCHBXC90uoLjbsNw4brDmgL6WGJnQmP8NzBw05w OYqiVx5SrGdUB/PJJeMCQuGp/ytOlxQM2U4LStKDfGNVAeh+Ruifm3a6ua8/iVwqxF9O wfidHGKY8mejBmqgOLT01uCW0GLP1nWp9A2fH6GsqEeizoj/Vy0orTh5gEi0ugHc2QgF LIWysYAKJ0BD7mSQWPwNc7BQ/RweiJxQvwMrTriU2scSiJPsa283BL2UhUgmbwCwqtLx KWiPqOvoob6N6Aq96wvFHfczjabY7uTSyvcnwL5Xm2xjUkn5xRVxaZvzzVE1NVOcnP/o 4qJQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ZeYJbVuqGDHsqyzLjF7twJNYqifLyyH6qytnIHxb/r8=; b=w648z3jKjj04phPPPfiM+LTJEbrvyfsqnM2qXycCVKiToAxUXp5ZN2z+h6oC4mfcsf HVr7Icdbu8CrHv6XO8qQbVvF0Qf/jDAlVO5os9fl9kPn64CfJATyXzufNZ3kekelw5ET 1ixhwyfLu9XW1BwFx/DGlpJsEczMWw5gdpPD6f1mTDh6oH2DykdHusnUiDMFRNFFwMUr u6NFxrrJVcVlHpf8g/M6y9KYZjWRWuE/pW4C5thTkNqS8yaSROgSUdCKuv4X9tNgK5Kq MPYohoMkfGf5gcZZr35fgyqo1zwzwMNswFxhP+tsyJ1JlJEQCs5Eb2lkdIqWdYrghZY9 MQZA== X-Gm-Message-State: ACrzQf2Vt+uEp+3oK1hhpVvKfenYOCfW1Ss2nmln5WEp9d+r7NemnD+K jSF0S4FYmpDi1sKn5R9KGoNY X-Google-Smtp-Source: AMsMyM7UQRq6LAbXGQYzFOlC5kKEyTXF5VB6Esa/Ig/9liB2l3kmJ8rROJCDU8/I0JLtrK+idxqiHA== X-Received: by 2002:a17:90b:690:b0:213:d98f:ed6a with SMTP id m16-20020a17090b069000b00213d98fed6amr21353026pjz.37.1667459403119; Thu, 03 Nov 2022 00:10:03 -0700 (PDT) Received: from localhost.localdomain ([117.193.208.64]) by smtp.gmail.com with ESMTPSA id s9-20020a170903214900b00186748fe6ccsm9451244ple.214.2022.11.03.00.09.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Nov 2022 00:10:02 -0700 (PDT) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@somainline.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, johan+linaro@kernel.org, quic_jprakash@quicinc.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, steev@kali.org, Manivannan Sadhasivam , Krzysztof Kozlowski Subject: [PATCH v3 06/12] arm64: dts: qcom: sc8280xp-pmics: Add support for TM5 block in PMK8280 Date: Thu, 3 Nov 2022 12:39:05 +0530 Message-Id: <20221103070911.20019-7-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221103070911.20019-1-manivannan.sadhasivam@linaro.org> References: <20221103070911.20019-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Thermal Monitoring block ADC5 (TM5) in PMK8280 can be used to monitor the temperature from secondary PMICs like PM8280. Reviewed-by: Konrad Dybcio Reviewed-by: Krzysztof Kozlowski Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi index b1cdde2f7861..f2c0b71b5d8e 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi @@ -85,6 +85,16 @@ pmk8280_vadc: adc@3100 { #io-channel-cells = <1>; status = "disabled"; }; + + pmk8280_adc_tm: adc-tm@3400 { + compatible = "qcom,spmi-adc-tm5-gen2"; + reg = <0x3400>; + interrupts = <0x0 0x34 0x0 IRQ_TYPE_EDGE_RISING>; + #address-cells = <1>; + #size-cells = <0>; + #thermal-sensor-cells = <1>; + status = "disabled"; + }; }; pmc8280_1: pmic@1 { From patchwork Thu Nov 3 07:09:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 621118 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 944E9C43217 for ; Thu, 3 Nov 2022 07:10:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230491AbiKCHKi (ORCPT ); Thu, 3 Nov 2022 03:10:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44796 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231182AbiKCHKK (ORCPT ); Thu, 3 Nov 2022 03:10:10 -0400 Received: from mail-pf1-x431.google.com (mail-pf1-x431.google.com [IPv6:2607:f8b0:4864:20::431]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 19B1A11C16 for ; Thu, 3 Nov 2022 00:10:09 -0700 (PDT) Received: by mail-pf1-x431.google.com with SMTP id z26so856874pff.1 for ; Thu, 03 Nov 2022 00:10:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=vFJpBjb6QP5w8jom1mD9aX3bwJzFPKeDTupRGJObZls=; b=UDVMH3hseinsmZ/5eokoX7zXybLKWNJ4j4JXaTJxc2oysEHWNIOh0GAfaeUtRymNdb PhFGcFHbg2Shm1sjCS8j3+nyLcw2nG4gUBCYolwhVxLtOupGJmmyTvzHix1iS+I876gb p+iaaRufs3P6aZA6zzAUy95Jr7ln8jPbv4LSX9RP8ZII5GXxTaP+pAyXLYicPoy+4Wsk AlIuzu99Qv6PlHIURb+uEZy9i/3u/+Yj5S+gXEdFJhfVqB3Xdvlb2K++eESGhK9FiNIa GYAU1uE/4l2gydnPSgCL/uFy4xsIvAlyNhQyXA2Wtn2/TRmLG4KTPX2WdsSDY7Jadxyl Z+qQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=vFJpBjb6QP5w8jom1mD9aX3bwJzFPKeDTupRGJObZls=; b=x0Z5Pyj8WpkmBQSRpc9v+H96k2OnCXknl1z2yip+7rd1tqfMLPK0lmSAC6mJA9Mp28 9I0QwL9K8Ai1UX5QliESsC3x7snZG8YKByecLU11NqkrH0xEXbNuJ11yk1xJ85kcv9SD KPfyeJaIzDcdFGT/AEajUOwYnmLMevEeUZNHmxpO6uw8AdE46Rj8PbL/HrNVOmFfye4j 35oiK/WTJuoKzBZRfTF0hEf4mFllY4lEWYTKuBWFLB3wLMw1MlMThC+GFuc9roAFPTzd 9FFBjxt0xpEEVBlZWY2WOnfImA6QMX65qTVWwX9tfOaXfF6iaXODV7hXMvRrhejCthjD Z0VA== X-Gm-Message-State: ACrzQf2WQFA8I/AlXrYiRv1E6Q+F02ftaODFBpe/A6UlgGp2ueQundot p3qUaDX06Kwoas2qrh0USLVg X-Google-Smtp-Source: AMsMyM6iiObOsWJMJK9MuUxyP+cAg9bjkkTqruFArtt7Gmmd/coTKc7heUxnbM2RVLKJz97SzGt92g== X-Received: by 2002:a63:cc:0:b0:463:6cb7:4f5d with SMTP id 195-20020a6300cc000000b004636cb74f5dmr24593969pga.489.1667459408606; Thu, 03 Nov 2022 00:10:08 -0700 (PDT) Received: from localhost.localdomain ([117.193.208.64]) by smtp.gmail.com with ESMTPSA id s9-20020a170903214900b00186748fe6ccsm9451244ple.214.2022.11.03.00.10.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Nov 2022 00:10:07 -0700 (PDT) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@somainline.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, johan+linaro@kernel.org, quic_jprakash@quicinc.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, steev@kali.org, Manivannan Sadhasivam , Krzysztof Kozlowski Subject: [PATCH v3 07/12] arm64: dts: qcom: sc8280xp-x13s: Enable PMK8280 RESIN input Date: Thu, 3 Nov 2022 12:39:06 +0530 Message-Id: <20221103070911.20019-8-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221103070911.20019-1-manivannan.sadhasivam@linaro.org> References: <20221103070911.20019-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Enable resetting the PMK8280 through RESIN block in SC8280XP X13s. Reviewed-by: Konrad Dybcio Reviewed-by: Krzysztof Kozlowski Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts index b2b744bb8a53..6aa8cf6d9776 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts @@ -169,6 +169,10 @@ &pmk8280_pon_pwrkey { status = "okay"; }; +&pmk8280_pon_resin { + status = "okay"; +}; + &qup0 { status = "okay"; }; From patchwork Thu Nov 3 07:09:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 621457 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9BC38C433FE for ; Thu, 3 Nov 2022 07:10:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231272AbiKCHKk (ORCPT ); Thu, 3 Nov 2022 03:10:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44818 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230497AbiKCHKR (ORCPT ); Thu, 3 Nov 2022 03:10:17 -0400 Received: from mail-pg1-x532.google.com (mail-pg1-x532.google.com [IPv6:2607:f8b0:4864:20::532]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AA7C3D61 for ; Thu, 3 Nov 2022 00:10:14 -0700 (PDT) Received: by mail-pg1-x532.google.com with SMTP id 64so920819pgc.5 for ; Thu, 03 Nov 2022 00:10:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=p5R9xZuZbY/XGHJi8KmbLI1THL0sZLR4+LZJSp8iZfo=; b=bA2sspvLerepZQqeJC8DXv9+AoK6QpZ17X0J0n2MTOWqMdDgWVIW+kUsfdh7OdO+nm XTY4ieqgvYb85arBe0P67vKSYgULeLCn0g7m6DxZbn92S4wOQAPiYWJMXasAkCDbdTOv YX8OoUnZamoFvnKDm6WPdM34vht0JYjNcy0H6jqeupQszC3K/cV1Eilly/F4BLSqFmhq 50NeKgfdWkNu2fk0J0wqlKSzvnj7kbHDPb/d5YxPhIPD1QboO6uDWJc7u/DMCEaEpyf0 iw2Ynuf9Kwm23rSGcaCDdj3Uj3jsccl9GMGI1HmWoBeyBCuXVMedXslR7P53wIJtMGmf xRzg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=p5R9xZuZbY/XGHJi8KmbLI1THL0sZLR4+LZJSp8iZfo=; b=8DR3CWHLLqn1GSUmhaEN3AFaMP4+EmWP12a6j6ItHo1X4NDqOinZDZ/1QoM3O2Mpch JoW+3Edqw2oi7+tvBNRgHDTFefLHC6fSPk43vzbfoPxU82LOpnCyceTXgt0cL3Qy0Jj2 QMrBi0cxBrbCGAK2GjqHjwbT6mT3Beh1GXhOCMoS14u+aivBha5UfD7u7ERXuTnO3Rcs KdBlPpjKl5abSF96X851jMxojAXmzGI/irLy8Hw1EtP9N570VaQvwVwe7FR21LXVVsUS soFb0cOxpw+adi5qsKtx3saH70QmqFMCeuSMhExhCKL/mllSlVPSTXCinueBhq0SS7sr u9Lw== X-Gm-Message-State: ACrzQf3cvGaVKKZGP3bWWzbsxbxiGXM0uNk5d2TCP+AFBaKfN/BkHvjT eEPONWh+JGxFDd3ZAxiT0ynfps0NNPuF X-Google-Smtp-Source: AMsMyM5DPwKdObP5xKIO4NyXX3G8rEjDfz5BQI1doZU0JU9V2+0L72bQfauMLXw2Pjkbk5U0dgz2vQ== X-Received: by 2002:a65:458a:0:b0:46f:33df:46b0 with SMTP id o10-20020a65458a000000b0046f33df46b0mr24516191pgq.564.1667459413946; Thu, 03 Nov 2022 00:10:13 -0700 (PDT) Received: from localhost.localdomain ([117.193.208.64]) by smtp.gmail.com with ESMTPSA id s9-20020a170903214900b00186748fe6ccsm9451244ple.214.2022.11.03.00.10.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Nov 2022 00:10:12 -0700 (PDT) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@somainline.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, johan+linaro@kernel.org, quic_jprakash@quicinc.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, steev@kali.org, Manivannan Sadhasivam , Krzysztof Kozlowski Subject: [PATCH v3 08/12] arm64: dts: qcom: sc8280xp-x13s: Add PMK8280 VADC channels Date: Thu, 3 Nov 2022 12:39:07 +0530 Message-Id: <20221103070911.20019-9-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221103070911.20019-1-manivannan.sadhasivam@linaro.org> References: <20221103070911.20019-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add VADC channels for measuring the on-chip die temperature and external crystal osciallator temperature of PMK8280. Reviewed-by: Krzysztof Kozlowski Reviewed-by: Konrad Dybcio Signed-off-by: Manivannan Sadhasivam --- .../dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts index 6aa8cf6d9776..cc51739e7dc5 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts @@ -7,6 +7,7 @@ /dts-v1/; #include +#include #include #include "sc8280xp.dtsi" @@ -173,6 +174,23 @@ &pmk8280_pon_resin { status = "okay"; }; +&pmk8280_vadc { + status = "okay"; + + pmic-die-temp@3 { + reg = ; + label = "pmk8280_die_temp"; + qcom,pre-scaling = <1 1>; + }; + + xo-therm@44 { + reg = ; + label = "pmk8280_xo_therm"; + qcom,hw-settle-time = <200>; + qcom,ratiometric; + }; +}; + &qup0 { status = "okay"; }; From patchwork Thu Nov 3 07:09:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 621117 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E2A82C433FE for ; Thu, 3 Nov 2022 07:10:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231290AbiKCHKt (ORCPT ); Thu, 3 Nov 2022 03:10:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45028 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231219AbiKCHKX (ORCPT ); Thu, 3 Nov 2022 03:10:23 -0400 Received: from mail-pf1-x42a.google.com (mail-pf1-x42a.google.com [IPv6:2607:f8b0:4864:20::42a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 441041261D for ; Thu, 3 Nov 2022 00:10:19 -0700 (PDT) Received: by mail-pf1-x42a.google.com with SMTP id 130so836479pfu.8 for ; Thu, 03 Nov 2022 00:10:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=gnwKnhoKUlY7xET1bNEuzraf9yho7HItYeI5FvzEIfw=; b=WrYcgJGWt1T9PEyXIgOyGmnFkUA9lXikNQrOQAnFWENMCETUd6AdNPDplYEoYAYWvk uruuAvIc359dmswBwGj5WCVCSp2obW5D8eZKm2g5IRBIySpclIZugyYTX4wIkYBmFkb7 TY+1kXvpQ+CzCTL+PhOBiPqEIhXQOqauSJFLJBzhHT2GB01yaoMoSwO9uA9RnO++EMvb RvfgxukVNeNTRDpIVJ5bGwzWPjF26nk9nA+/OehSOcf/UQJhmW96qH/Aru7mxxDUKdRI gwHzsTf8Xd/PCN3w6zyMVTtej7rj/2QxAgcoQvJBKNE3/W8PNpijqKsNR+bZK3IrLcXI yiiQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=gnwKnhoKUlY7xET1bNEuzraf9yho7HItYeI5FvzEIfw=; b=Os6T9GNpphNNFhafi4PWFQkX8m0Lg/KwdWHoyjx5b/TSr4ZhbNy3nE8WFLbHx4lwM0 uTtN+8liXDU1rG2tfTk5njPIdwGOfZ6GjaFgp6ntRs44LDxhpbiKEluXCxqj6RS7AlRc YHUa+MYPGolV5PFO34AamoscZzBXDtXPUakMWx79j1sXciPO9U3QM47YDNfAUU8djAvL GgbCmRuXW2VlZoeZT30iMrbJLf8peuEojuq0SJSLqB0P4smXXmwtIPfdvz6WVVc7SJvr KtHRAeCCc+s9TtARlqmnW2M96/n94pDwOoAPnn2oloZd7yo4WuRMSha3swNzuI1BJoFq bs7w== X-Gm-Message-State: ACrzQf2I6JrZWD1sRRixmgGib2B9M1SjOWjX6i0iQ07kN64YmWEWqSi3 HciQwPGY1Z1ujkSogKSUFsSy X-Google-Smtp-Source: AMsMyM40mVo0CltvJT60fFeyvKfdSMWET/rabM/OzqjFocKP0BVjgUw0qY9gdkbDIy9HHAQ52OjVkg== X-Received: by 2002:aa7:8887:0:b0:56d:41a9:dbb7 with SMTP id z7-20020aa78887000000b0056d41a9dbb7mr23712407pfe.82.1667459419375; Thu, 03 Nov 2022 00:10:19 -0700 (PDT) Received: from localhost.localdomain ([117.193.208.64]) by smtp.gmail.com with ESMTPSA id s9-20020a170903214900b00186748fe6ccsm9451244ple.214.2022.11.03.00.10.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Nov 2022 00:10:18 -0700 (PDT) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@somainline.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, johan+linaro@kernel.org, quic_jprakash@quicinc.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, steev@kali.org, Manivannan Sadhasivam , Krzysztof Kozlowski Subject: [PATCH v3 09/12] arm64: dts: qcom: sc8280xp-x13s: Add PM8280_{1/2} VADC channels Date: Thu, 3 Nov 2022 12:39:08 +0530 Message-Id: <20221103070911.20019-10-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221103070911.20019-1-manivannan.sadhasivam@linaro.org> References: <20221103070911.20019-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add VADC channels of PM8280_{1/2} PMICs for measuring the on-chip die temperature and external thermistors connected to the AMUX pins. The measurements are collected by the primary PMIC PMK8280 from the secondary PMICs PM8280_{1/2} and exposed over the PMK8280's VADC channels. Reviewed-by: Konrad Dybcio Reviewed-by: Krzysztof Kozlowski Signed-off-by: Manivannan Sadhasivam --- .../qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 61 +++++++++++++++++++ 1 file changed, 61 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts index cc51739e7dc5..bb96c350eb09 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts @@ -7,6 +7,7 @@ /dts-v1/; #include +#include #include #include @@ -189,6 +190,66 @@ xo-therm@44 { qcom,hw-settle-time = <200>; qcom,ratiometric; }; + + pmic-die-temp@103 { + reg = ; + label = "pm8280_1_die_temp"; + qcom,pre-scaling = <1 1>; + }; + + sys-therm1@144 { + reg = ; + qcom,hw-settle-time = <200>; + qcom,ratiometric; + }; + + sys-therm2@145 { + reg = ; + qcom,hw-settle-time = <200>; + qcom,ratiometric; + }; + + sys-therm3@146 { + reg = ; + qcom,hw-settle-time = <200>; + qcom,ratiometric; + }; + + sys-therm4@147 { + reg = ; + qcom,hw-settle-time = <200>; + qcom,ratiometric; + }; + + pmic-die-temp@303 { + reg = ; + label = "pm8250_2_die_temp"; + qcom,pre-scaling = <1 1>; + }; + + sys-therm5@344 { + reg = ; + qcom,hw-settle-time = <200>; + qcom,ratiometric; + }; + + sys-therm6@345 { + reg = ; + qcom,hw-settle-time = <200>; + qcom,ratiometric; + }; + + sys-therm7@346 { + reg = ; + qcom,hw-settle-time = <200>; + qcom,ratiometric; + }; + + sys-therm8@347 { + reg = ; + qcom,hw-settle-time = <200>; + qcom,ratiometric; + }; }; &qup0 { From patchwork Thu Nov 3 07:09:09 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 621456 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0B046C433FE for ; Thu, 3 Nov 2022 07:11:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229826AbiKCHLD (ORCPT ); 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Thu, 03 Nov 2022 00:10:23 -0700 (PDT) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@somainline.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, johan+linaro@kernel.org, quic_jprakash@quicinc.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, steev@kali.org, Manivannan Sadhasivam , Krzysztof Kozlowski Subject: [PATCH v3 10/12] arm64: dts: qcom: sc8280xp-x13s: Add PMR735A VADC channel Date: Thu, 3 Nov 2022 12:39:09 +0530 Message-Id: <20221103070911.20019-11-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221103070911.20019-1-manivannan.sadhasivam@linaro.org> References: <20221103070911.20019-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add VADC channel of PMR735A for measuring the on-chip die temperature. Reviewed-by: Krzysztof Kozlowski Reviewed-by: Konrad Dybcio Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts index bb96c350eb09..d0077c7a7a6e 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts @@ -9,6 +9,7 @@ #include #include #include +#include #include #include "sc8280xp.dtsi" @@ -250,6 +251,12 @@ sys-therm8@347 { qcom,hw-settle-time = <200>; qcom,ratiometric; }; + + pmic-die-temp@403 { + reg = ; + label = "pmr735a_die_temp"; + qcom,pre-scaling = <1 1>; + }; }; &qup0 { From patchwork Thu Nov 3 07:09:10 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 621116 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 60937C433FE for ; Thu, 3 Nov 2022 07:11:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230220AbiKCHLJ (ORCPT ); Thu, 3 Nov 2022 03:11:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44818 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230373AbiKCHKk (ORCPT ); Thu, 3 Nov 2022 03:10:40 -0400 Received: from mail-pl1-x62e.google.com (mail-pl1-x62e.google.com [IPv6:2607:f8b0:4864:20::62e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E9F4F18385 for ; Thu, 3 Nov 2022 00:10:30 -0700 (PDT) Received: by mail-pl1-x62e.google.com with SMTP id l2so1061505pld.13 for ; Thu, 03 Nov 2022 00:10:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=YXjotbp4XPu3PRod81r/QLTNrvEzekXOSUQtWFcnvmc=; b=Ec4ehpQPDSgFfP8mfI8RI+xV6KG4sj0UTy630JsqYuku/HBDM0IANsjY4eIbKIEkrR 5wavJWBm0FQud0qz1tnGM0KSTUGIboYTGiosfzfGuWVwHCVTGwNa+r4kvzQckrDvQJQp 4fLPMszttJq/MW87OVeAkJbpJJB6AmZwsgh44tVuPFgDJK0o80TsFynG/W5i/AN9Gex5 qsg2fqnnvO3IdaIkE9MGNl7VhGULksDNKdQv2qYDB1Y/V0eFVsJeAZY889RTFABQ/hK8 HiqNQcxkZOlwjazW6UeVQIEcefYznYTy55odulSj3dAKPs929jvfm8mVnKsqc5cXTlFf ZUYA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=YXjotbp4XPu3PRod81r/QLTNrvEzekXOSUQtWFcnvmc=; b=mTNShEtL3J5lj8xCDPMcL3H3MQfFgB+seM8xgJu9exr+Ao/V47FOZwczjLjDjlaGg6 imtdGGyTYw+5BLXHJkDVdUvDDG1NAUcGOMFcEy9lKFnHFqIZMNdv8J7tqs5yxLhXvAue h2ghVEPkD2RKjP9KK4ozE/xcChVOLnMuJpAQC1zOUX4KpgDchbVSi7SPs31aWSFIefHU w3l7MGaxXK+B9rNbSaWUVTDtz/m3vY06WCJVnxSfW2G0XlI+IUbjluHpOu+MAuw4Tv17 bpBL9y30durArz5/iGTCc2dyeeZxbQUW+8y7SipXP1NFqB6BntkQK7jsmx5Qmw88kfMD rz1w== X-Gm-Message-State: ACrzQf25ilIEjXnSvEsFJpAyS2Xta+h7R7mm+9VOvkaCPftgTmPRfzX6 NSOiNEsgMq6l2NBPBN1uvMDl X-Google-Smtp-Source: AMsMyM7zubYthMkUto1azMsYnDoXByeydIcgwBc/9BEZI/xY+68+/TfnRWaOtO9ZIVmNGrdqrj3URw== X-Received: by 2002:a17:90b:3510:b0:214:2af4:f8ae with SMTP id ls16-20020a17090b351000b002142af4f8aemr7906107pjb.173.1667459430076; Thu, 03 Nov 2022 00:10:30 -0700 (PDT) Received: from localhost.localdomain ([117.193.208.64]) by smtp.gmail.com with ESMTPSA id s9-20020a170903214900b00186748fe6ccsm9451244ple.214.2022.11.03.00.10.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Nov 2022 00:10:29 -0700 (PDT) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@somainline.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, johan+linaro@kernel.org, quic_jprakash@quicinc.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, steev@kali.org, Manivannan Sadhasivam , Krzysztof Kozlowski Subject: [PATCH v3 11/12] arm64: dts: qcom: sc8280xp-x13s: Add PM8280_{1/2} ADC_TM5 channels Date: Thu, 3 Nov 2022 12:39:10 +0530 Message-Id: <20221103070911.20019-12-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221103070911.20019-1-manivannan.sadhasivam@linaro.org> References: <20221103070911.20019-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add ADC_TM5 channels of PM8280_{1/2} for monitoring the temperature from external thermistors connected to AMUX pins. The temperture measurements are collected from the PMK8280's VADC channels that expose the measurements from secondary PMICs PM8280_{1/2}. Reviewed-by: Krzysztof Kozlowski Reviewed-by: Konrad Dybcio Signed-off-by: Manivannan Sadhasivam --- .../qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 68 +++++++++++++++++++ 1 file changed, 68 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts index d0077c7a7a6e..fdeb7718a596 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts @@ -259,6 +259,74 @@ pmic-die-temp@403 { }; }; +&pmk8280_adc_tm { + status = "okay"; + + sys-therm@0 { + reg = <0>; + io-channels = <&pmk8280_vadc PM8350_ADC7_AMUX_THM1_100K_PU(1)>; + qcom,hw-settle-time-us = <200>; + qcom,avg-samples = <2>; + qcom,ratiometric; + }; + + sys-therm@1 { + reg = <1>; + io-channels = <&pmk8280_vadc PM8350_ADC7_AMUX_THM2_100K_PU(1)>; + qcom,hw-settle-time-us = <200>; + qcom,avg-samples = <2>; + qcom,ratiometric; + }; + + sys-therm@2 { + reg = <2>; + io-channels = <&pmk8280_vadc PM8350_ADC7_AMUX_THM3_100K_PU(1)>; + qcom,hw-settle-time-us = <200>; + qcom,avg-samples = <2>; + qcom,ratiometric; + }; + + sys-therm@3 { + reg = <3>; + io-channels = <&pmk8280_vadc PM8350_ADC7_AMUX_THM4_100K_PU(1)>; + qcom,hw-settle-time-us = <200>; + qcom,avg-samples = <2>; + qcom,ratiometric; + }; + + sys-therm@4 { + reg = <4>; + io-channels = <&pmk8280_vadc PM8350_ADC7_AMUX_THM1_100K_PU(3)>; + qcom,hw-settle-time-us = <200>; + qcom,avg-samples = <2>; + qcom,ratiometric; + }; + + sys-therm@5 { + reg = <5>; + io-channels = <&pmk8280_vadc PM8350_ADC7_AMUX_THM2_100K_PU(3)>; + qcom,hw-settle-time-us = <200>; + qcom,avg-samples = <2>; + qcom,ratiometric; + }; + + sys-therm@6 { + reg = <6>; + io-channels = <&pmk8280_vadc PM8350_ADC7_AMUX_THM3_100K_PU(3)>; + qcom,hw-settle-time-us = <200>; + qcom,avg-samples = <2>; + qcom,ratiometric; + }; + + sys-therm@7 { + reg = <7>; + io-channels = <&pmk8280_vadc PM8350_ADC7_AMUX_THM4_100K_PU(3)>; + qcom,hw-settle-time-us = <200>; + qcom,avg-samples = <2>; + qcom,ratiometric; + }; +}; + &qup0 { status = "okay"; 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Thu, 03 Nov 2022 00:10:35 -0700 (PDT) Received: from localhost.localdomain ([117.193.208.64]) by smtp.gmail.com with ESMTPSA id s9-20020a170903214900b00186748fe6ccsm9451244ple.214.2022.11.03.00.10.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Nov 2022 00:10:34 -0700 (PDT) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@somainline.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, johan+linaro@kernel.org, quic_jprakash@quicinc.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, steev@kali.org, Manivannan Sadhasivam Subject: [PATCH v3 12/12] arm64: dts: qcom: sc8280xp-x13s: Add thermal zone support Date: Thu, 3 Nov 2022 12:39:11 +0530 Message-Id: <20221103070911.20019-13-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221103070911.20019-1-manivannan.sadhasivam@linaro.org> References: <20221103070911.20019-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add thermal zone support by making use of the thermistor SYS_THERM6. Based on experiments, this thermistor seems to reflect the actual surface temperature of the laptop. For the cooling device, all BIG CPU cores are throttle down to keep the temperature at a sane level. Signed-off-by: Manivannan Sadhasivam --- .../qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 46 +++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts index fdeb7718a596..7d2b53ceaa54 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts @@ -29,6 +29,52 @@ backlight { pinctrl-0 = <&edp_bl_en>, <&edp_bl_pwm>; }; + thermal-zones { + skin-temp-thermal { + polling-delay-passive = <250>; + polling-delay = <0>; + thermal-sensors = <&pmk8280_adc_tm 5>; + + trips { + skin_temp_alert0: trip-point0 { + temperature = <55000>; + hysteresis = <1000>; + type = "passive"; + }; + + skin_temp_alert1: trip-point1 { + temperature = <58000>; + hysteresis = <1000>; + type = "passive"; + }; + + skin-temp-crit { + temperature = <73000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&skin_temp_alert0>; + cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + + map1 { + trip = <&skin_temp_alert1>; + cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + }; + vreg_edp_bl: regulator-edp-bl { compatible = "regulator-fixed";