From patchwork Tue Nov 1 18:09:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vibhore Vardhan X-Patchwork-Id: 620775 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 89E00C4332F for ; Tue, 1 Nov 2022 18:09:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230132AbiKASJp (ORCPT ); Tue, 1 Nov 2022 14:09:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55468 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229995AbiKASJo (ORCPT ); Tue, 1 Nov 2022 14:09:44 -0400 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 40FF51CFD1; Tue, 1 Nov 2022 11:09:42 -0700 (PDT) Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 2A1I9ZNJ032058; Tue, 1 Nov 2022 13:09:35 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1667326175; bh=98NsNHJ9mWZw9/Smvouol/zmoEAz5/KbOnhXrW9NNDQ=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=a1y32Cef02dYf8Rg2KvQwoqJQJimyWgJJlceKYU765HBBkGB1+078UO1P1xlu9znQ KnDkNEmwsjDfzdTtvsKU4incWax6mJaEDOcyYpvjHu/dqfEwNRlqsFvg+8CkYkCihd AwJCtTD/2TYNOtFCSipp98eoGf82w2kpKl8ghnhM= Received: from DLEE102.ent.ti.com (dlee102.ent.ti.com [157.170.170.32]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 2A1I9Z2s017618 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 1 Nov 2022 13:09:35 -0500 Received: from DLEE109.ent.ti.com (157.170.170.41) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Tue, 1 Nov 2022 13:09:35 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Tue, 1 Nov 2022 13:09:35 -0500 Received: from maitri.dhcp.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 2A1I9ZVn008602; Tue, 1 Nov 2022 13:09:35 -0500 From: Vibhore Vardhan To: , , , , , , CC: , , , Subject: [PATCH RESEND 2/5] cpufreq: dt-platdev: Blacklist ti,am625 SoC Date: Tue, 1 Nov 2022 13:09:32 -0500 Message-ID: <20221101180935.139268-3-vibhore@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221101180935.139268-1-vibhore@ti.com> References: <20221101180935.139268-1-vibhore@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Dave Gerlach Add ti,am625 SoC to the blacklist as the ti-cpufreq driver will handle creating the cpufreq-dt platform device after it completes so it is not created twice. Signed-off-by: Dave Gerlach Signed-off-by: Vibhore Vardhan --- drivers/cpufreq/cpufreq-dt-platdev.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c index 6ac3800db450..85ee11f79840 100644 --- a/drivers/cpufreq/cpufreq-dt-platdev.c +++ b/drivers/cpufreq/cpufreq-dt-platdev.c @@ -160,6 +160,7 @@ static const struct of_device_id blocklist[] __initconst = { { .compatible = "ti,am43", }, { .compatible = "ti,dra7", }, { .compatible = "ti,omap3", }, + { .compatible = "ti,am625", }, { .compatible = "qcom,ipq8064", }, { .compatible = "qcom,apq8064", }, From patchwork Tue Nov 1 18:09:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vibhore Vardhan X-Patchwork-Id: 620774 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4FD41C4332F for ; Tue, 1 Nov 2022 18:09:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230527AbiKASJr (ORCPT ); Tue, 1 Nov 2022 14:09:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55482 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230235AbiKASJp (ORCPT ); Tue, 1 Nov 2022 14:09:45 -0400 Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 978FB1CFD1; Tue, 1 Nov 2022 11:09:44 -0700 (PDT) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 2A1I9ZrA080819; Tue, 1 Nov 2022 13:09:35 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1667326175; bh=BPG/F+3Sh+TQG++pXDZ8DxsxEXgdsc+7p+whnLFJT8I=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=jwQHqvtjOH1nDxzcPME7hPq3zX388I7KwOWuvO4tw5lgaGf5lwEglXHr8BSUSx8/z B2ePm3C72jKvVXxNGrVVz/IQMI3ckj32bu+q2gWSc7z5gwuPeNxKsibF3kAtJTeUrF yPdN1l5kZuRCMsuYolDnbbmAinZrEW4ciKCl6yRk= Received: from DLEE112.ent.ti.com (dlee112.ent.ti.com [157.170.170.23]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 2A1I9Ziw117490 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 1 Nov 2022 13:09:35 -0500 Received: from DLEE101.ent.ti.com (157.170.170.31) by DLEE112.ent.ti.com (157.170.170.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Tue, 1 Nov 2022 13:09:35 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE101.ent.ti.com (157.170.170.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Tue, 1 Nov 2022 13:09:35 -0500 Received: from maitri.dhcp.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 2A1I9ZVp008602; Tue, 1 Nov 2022 13:09:35 -0500 From: Vibhore Vardhan To: , , , , , , CC: , , , Subject: [PATCH RESEND 4/5] cpufreq: ti: Enable ti-cpufreq for ARCH_K3 Date: Tue, 1 Nov 2022 13:09:34 -0500 Message-ID: <20221101180935.139268-5-vibhore@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221101180935.139268-1-vibhore@ti.com> References: <20221101180935.139268-1-vibhore@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Dave Gerlach Make ti-cpufreq driver depend on ARCH_K3 and set it to `default y` so it is always enabled for platforms that it depends on. Signed-off-by: Dave Gerlach Signed-off-by: Vibhore Vardhan --- drivers/cpufreq/Kconfig.arm | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm index 82e5de1f6f8c..be590f498e6a 100644 --- a/drivers/cpufreq/Kconfig.arm +++ b/drivers/cpufreq/Kconfig.arm @@ -340,8 +340,8 @@ config ARM_TEGRA194_CPUFREQ config ARM_TI_CPUFREQ bool "Texas Instruments CPUFreq support" - depends on ARCH_OMAP2PLUS - default ARCH_OMAP2PLUS + depends on ARCH_OMAP2PLUS || ARCH_K3 + default y help This driver enables valid OPPs on the running platform based on values contained within the SoC in use. Enable this in order to From patchwork Tue Nov 1 18:09:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vibhore Vardhan X-Patchwork-Id: 620773 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4CD1DC43219 for ; Tue, 1 Nov 2022 18:09:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230370AbiKASJs (ORCPT ); Tue, 1 Nov 2022 14:09:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55488 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230425AbiKASJp (ORCPT ); Tue, 1 Nov 2022 14:09:45 -0400 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BF14B1D0E8; Tue, 1 Nov 2022 11:09:44 -0700 (PDT) Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 2A1I9aTH083738; Tue, 1 Nov 2022 13:09:36 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1667326176; bh=aHfPf+ay0vTuzra6DofDgrduM8g8o28Yub+/Uu/B19Q=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=JEcSkaHC0ykuoH7zYS+XXHizmjO16pr52Iia2v2KstNUeKlbq4Dlaoa2t0/rUEdDE LaQ0QaThHIzm5m7CkqX0Bjeoruuh3m9+oayawUri/itWVr7KVegvHOTn52BsSVfl3Q 2JljI14U7FQI6qUSiYEiocfHYiH5eGQLXLtmN+ls= Received: from DLEE109.ent.ti.com (dlee109.ent.ti.com [157.170.170.41]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 2A1I9alH017625 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 1 Nov 2022 13:09:36 -0500 Received: from DLEE103.ent.ti.com (157.170.170.33) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Tue, 1 Nov 2022 13:09:35 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Tue, 1 Nov 2022 13:09:35 -0500 Received: from maitri.dhcp.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 2A1I9ZVq008602; Tue, 1 Nov 2022 13:09:35 -0500 From: Vibhore Vardhan To: , , , , , , CC: , , , Subject: [PATCH RESEND 5/5] arm64: dts: ti: k3-am625-sk: Add 1.4GHz OPP Date: Tue, 1 Nov 2022 13:09:35 -0500 Message-ID: <20221101180935.139268-6-vibhore@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221101180935.139268-1-vibhore@ti.com> References: <20221101180935.139268-1-vibhore@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The 1.4 GHz OPP requires supported silicon variant (T speed grade) and also VDD_CORE to be at 0.85V. All production revisions of the AM625-SK have both so we can enable the 1.4 GHz OPP for it. Any other boards based on this design should verify that they have the right silicon variant and the right power tree before adding 1.4 GHz support in their board dts file. Signed-off-by: Vibhore Vardhan --- arch/arm64/boot/dts/ti/k3-am625-sk.dts | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am625-sk.dts b/arch/arm64/boot/dts/ti/k3-am625-sk.dts index 93a5f0817efc..4620ef5e19bb 100644 --- a/arch/arm64/boot/dts/ti/k3-am625-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am625-sk.dts @@ -31,6 +31,15 @@ chosen { bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000"; }; + opp-table { + /* Add 1.4GHz OPP for am625-sk board. Requires VDD_CORE to be at 0.85V */ + opp-1400000000 { + opp-hz = /bits/ 64 <1400000000>; + opp-supported-hw = <0x01 0x0004>; + clock-latency-ns = <6000000>; + }; + }; + memory@80000000 { device_type = "memory"; /* 2G RAM */