From patchwork Sun Oct 30 07:32:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marijn Suijten X-Patchwork-Id: 620668 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D74E8FA3746 for ; Sun, 30 Oct 2022 07:32:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229958AbiJ3Hcx (ORCPT ); Sun, 30 Oct 2022 03:32:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58218 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229728AbiJ3Hcs (ORCPT ); Sun, 30 Oct 2022 03:32:48 -0400 Received: from relay04.th.seeweb.it (relay04.th.seeweb.it [IPv6:2001:4b7a:2000:18::165]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2583F301; Sun, 30 Oct 2022 00:32:44 -0700 (PDT) Received: from localhost.localdomain (94-209-172-39.cable.dynamic.v4.ziggo.nl [94.209.172.39]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by m-r1.th.seeweb.it (Postfix) with ESMTPSA id 240B41F948; Sun, 30 Oct 2022 08:32:42 +0100 (CET) From: Marijn Suijten To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, AngeloGioacchino Del Regno , Konrad Dybcio , Martin Botka , Jami Kettunen , Marijn Suijten , Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Luca Weiss , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 01/10] arm64: dts: qcom: sm6350: Add resets for SDHCI 1/2 Date: Sun, 30 Oct 2022 08:32:23 +0100 Message-Id: <20221030073232.22726-2-marijn.suijten@somainline.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221030073232.22726-1-marijn.suijten@somainline.org> References: <20221030073232.22726-1-marijn.suijten@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Make sure the SDHCI hardware is properly reset before interacting with it, to protect against any possibly indeterminate state left by the bootloader. Suggested-by: Konrad Dybcio Signed-off-by: Marijn Suijten --- arch/arm64/boot/dts/qcom/sm6350.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi index c39de7d3ace0..a3ae765d9781 100644 --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi @@ -490,6 +490,7 @@ sdhc_1: mmc@7c4000 { <&gcc GCC_SDCC1_APPS_CLK>, <&rpmhcc RPMH_CXO_CLK>; clock-names = "iface", "core", "xo"; + resets = <&gcc GCC_SDCC1_BCR>; qcom,dll-config = <0x000f642c>; qcom,ddr-config = <0x80040868>; power-domains = <&rpmhpd SM6350_CX>; @@ -1068,6 +1069,7 @@ sdhc_2: mmc@8804000 { <&gcc GCC_SDCC2_APPS_CLK>, <&rpmhcc RPMH_CXO_CLK>; clock-names = "iface", "core", "xo"; + resets = <&gcc GCC_SDCC2_BCR>; interconnects = <&aggre2_noc MASTER_SDCC_2 0 &clk_virt SLAVE_EBI_CH0 0>, <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_SDCC_2 0>; interconnect-names = "sdhc-ddr", "cpu-sdhc"; From patchwork Sun Oct 30 07:32:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marijn Suijten X-Patchwork-Id: 620108 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 015D1C38A02 for ; Sun, 30 Oct 2022 07:32:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229992AbiJ3Hcy (ORCPT ); Sun, 30 Oct 2022 03:32:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58232 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229741AbiJ3Hct (ORCPT ); Sun, 30 Oct 2022 03:32:49 -0400 Received: from relay03.th.seeweb.it (relay03.th.seeweb.it [5.144.164.164]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 56EFD307; Sun, 30 Oct 2022 00:32:45 -0700 (PDT) Received: from localhost.localdomain (94-209-172-39.cable.dynamic.v4.ziggo.nl [94.209.172.39]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by m-r1.th.seeweb.it (Postfix) with ESMTPSA id CBDC41F969; Sun, 30 Oct 2022 08:32:42 +0100 (CET) From: Marijn Suijten To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, AngeloGioacchino Del Regno , Konrad Dybcio , Martin Botka , Jami Kettunen , Marijn Suijten , Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Luca Weiss , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 02/10] arm64: dts: qcom: sm6350: Add pinctrl for SDHCI 2 Date: Sun, 30 Oct 2022 08:32:24 +0100 Message-Id: <20221030073232.22726-3-marijn.suijten@somainline.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221030073232.22726-1-marijn.suijten@somainline.org> References: <20221030073232.22726-1-marijn.suijten@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Use the generic pin functions specifically for sdc2. Signed-off-by: Marijn Suijten Reviewed-by: Luca Weiss Tested-by: Luca Weiss # sm7225-fairphone-fp4 --- arch/arm64/boot/dts/qcom/sm6350.dtsi | 44 ++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi index a3ae765d9781..b98b881ebe7e 100644 --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi @@ -1074,6 +1074,10 @@ sdhc_2: mmc@8804000 { <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_SDCC_2 0>; interconnect-names = "sdhc-ddr", "cpu-sdhc"; + pinctrl-0 = <&sdc2_on_state>; + pinctrl-1 = <&sdc2_off_state>; + pinctrl-names = "default", "sleep"; + qcom,dll-config = <0x0007642c>; qcom,ddr-config = <0x80040868>; power-domains = <&rpmhpd SM6350_CX>; @@ -1316,6 +1320,46 @@ tlmm: pinctrl@f100000 { #interrupt-cells = <2>; gpio-ranges = <&tlmm 0 0 157>; + sdc2_off_state: sdc2-off-state { + clk-pins { + pins = "sdc2_clk"; + drive-strength = <2>; + bias-disable; + }; + + cmd-pins { + pins = "sdc2_cmd"; + drive-strength = <2>; + bias-pull-up; + }; + + data-pins { + pins = "sdc2_data"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + sdc2_on_state: sdc2-on-state { + clk-pins { + pins = "sdc2_clk"; + drive-strength = <16>; + bias-disable; + }; + + cmd-pins { + pins = "sdc2_cmd"; + drive-strength = <10>; + bias-pull-up; + }; + + data-pins { + pins = "sdc2_data"; + drive-strength = <10>; + bias-pull-up; + }; + }; + qup_uart9_default: qup-uart9-default-state { pins = "gpio25", "gpio26"; function = "qup13_f2"; From patchwork Sun Oct 30 07:32:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marijn Suijten X-Patchwork-Id: 620667 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 028FCFA374C for ; Sun, 30 Oct 2022 07:32:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229741AbiJ3Hcy (ORCPT ); Sun, 30 Oct 2022 03:32:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58254 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229867AbiJ3Hct (ORCPT ); Sun, 30 Oct 2022 03:32:49 -0400 Received: from relay03.th.seeweb.it (relay03.th.seeweb.it [5.144.164.164]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 94F492670 for ; Sun, 30 Oct 2022 00:32:45 -0700 (PDT) Received: from localhost.localdomain (94-209-172-39.cable.dynamic.v4.ziggo.nl [94.209.172.39]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by m-r1.th.seeweb.it (Postfix) with ESMTPSA id 808E21F9F7; Sun, 30 Oct 2022 08:32:43 +0100 (CET) From: Marijn Suijten To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, AngeloGioacchino Del Regno , Konrad Dybcio , Martin Botka , Jami Kettunen , Marijn Suijten , Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Luca Weiss , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 03/10] arm64: dts: qcom: sm6350-lena: Add SD Card Detect to sdc2 on/off pinctrl Date: Sun, 30 Oct 2022 08:32:25 +0100 Message-Id: <20221030073232.22726-4-marijn.suijten@somainline.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221030073232.22726-1-marijn.suijten@somainline.org> References: <20221030073232.22726-1-marijn.suijten@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org In addition to the sdc2 pins, set the SD Card Detect pin in a sane state to be used as an interrupt when an SD Card is slotted in or removed. Signed-off-by: Marijn Suijten --- .../qcom/sm6350-sony-xperia-lena-pdx213.dts | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6350-sony-xperia-lena-pdx213.dts b/arch/arm64/boot/dts/qcom/sm6350-sony-xperia-lena-pdx213.dts index 36911b9a5c04..9a96000fc95b 100644 --- a/arch/arm64/boot/dts/qcom/sm6350-sony-xperia-lena-pdx213.dts +++ b/arch/arm64/boot/dts/qcom/sm6350-sony-xperia-lena-pdx213.dts @@ -30,6 +30,24 @@ framebuffer: framebuffer@a0000000 { }; }; +&sdc2_off_state { + sd-cd-pins { + pins = "gpio94"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; +}; + +&sdc2_on_state { + sd-cd-pins { + pins = "gpio94"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; +}; + &sdhc_2 { status = "okay"; From patchwork Sun Oct 30 07:32:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marijn Suijten X-Patchwork-Id: 620107 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5FB15FA3745 for ; Sun, 30 Oct 2022 07:32:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229867AbiJ3Hc5 (ORCPT ); Sun, 30 Oct 2022 03:32:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58314 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229686AbiJ3Hcw (ORCPT ); Sun, 30 Oct 2022 03:32:52 -0400 Received: from relay01.th.seeweb.it (relay01.th.seeweb.it [IPv6:2001:4b7a:2000:18::162]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 353912AF2 for ; Sun, 30 Oct 2022 00:32:46 -0700 (PDT) Received: from localhost.localdomain (94-209-172-39.cable.dynamic.v4.ziggo.nl [94.209.172.39]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by m-r1.th.seeweb.it (Postfix) with ESMTPSA id 363851FF2E; Sun, 30 Oct 2022 08:32:44 +0100 (CET) From: Marijn Suijten To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, AngeloGioacchino Del Regno , Konrad Dybcio , Martin Botka , Jami Kettunen , Marijn Suijten , Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Luca Weiss , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 04/10] arm64: dts: qcom: pm6350: Include header for KEY_POWER Date: Sun, 30 Oct 2022 08:32:26 +0100 Message-Id: <20221030073232.22726-5-marijn.suijten@somainline.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221030073232.22726-1-marijn.suijten@somainline.org> References: <20221030073232.22726-1-marijn.suijten@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Make pm6350.dtsi self-contained by including input.h, needed for the KEY_POWER constant used to define the power key. Fixes: d8a3c775d7cd ("arm64: dts: qcom: Add PM6350 PMIC") Signed-off-by: Marijn Suijten --- arch/arm64/boot/dts/qcom/pm6350.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/qcom/pm6350.dtsi b/arch/arm64/boot/dts/qcom/pm6350.dtsi index 18c14257e2c1..111f4c1c56ae 100644 --- a/arch/arm64/boot/dts/qcom/pm6350.dtsi +++ b/arch/arm64/boot/dts/qcom/pm6350.dtsi @@ -3,6 +3,7 @@ * Copyright (c) 2021, Luca Weiss */ +#include #include &spmi_bus { From patchwork Sun Oct 30 07:32:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marijn Suijten X-Patchwork-Id: 620666 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5A099FA3746 for ; Sun, 30 Oct 2022 07:33:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229728AbiJ3Hc6 (ORCPT ); Sun, 30 Oct 2022 03:32:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58214 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229907AbiJ3Hcw (ORCPT ); Sun, 30 Oct 2022 03:32:52 -0400 Received: from relay03.th.seeweb.it (relay03.th.seeweb.it [IPv6:2001:4b7a:2000:18::164]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5C1402DFC for ; Sun, 30 Oct 2022 00:32:46 -0700 (PDT) Received: from localhost.localdomain (94-209-172-39.cable.dynamic.v4.ziggo.nl [94.209.172.39]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by m-r1.th.seeweb.it (Postfix) with ESMTPSA id ED321200AC; Sun, 30 Oct 2022 08:32:44 +0100 (CET) From: Marijn Suijten To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, AngeloGioacchino Del Regno , Konrad Dybcio , Martin Botka , Jami Kettunen , Marijn Suijten , Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Luca Weiss , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 05/10] arm64: dts: qcom: sm6350-lena: Include pm6350 and configure buttons Date: Sun, 30 Oct 2022 08:32:27 +0100 Message-Id: <20221030073232.22726-6-marijn.suijten@somainline.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221030073232.22726-1-marijn.suijten@somainline.org> References: <20221030073232.22726-1-marijn.suijten@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Include pm6350 to inherit its GPIO and button configuration, and configure "resin" to serve as volume up, and gpio2 as volume down. Signed-off-by: Marijn Suijten --- .../qcom/sm6350-sony-xperia-lena-pdx213.dts | 31 +++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6350-sony-xperia-lena-pdx213.dts b/arch/arm64/boot/dts/qcom/sm6350-sony-xperia-lena-pdx213.dts index 9a96000fc95b..4512b0bf7fe1 100644 --- a/arch/arm64/boot/dts/qcom/sm6350-sony-xperia-lena-pdx213.dts +++ b/arch/arm64/boot/dts/qcom/sm6350-sony-xperia-lena-pdx213.dts @@ -4,7 +4,9 @@ */ /dts-v1/; +#include #include "sm6350.dtsi" +#include "pm6350.dtsi" / { model = "Sony Xperia 10 III"; @@ -28,6 +30,35 @@ framebuffer: framebuffer@a0000000 { clocks = <&gcc GCC_DISP_AXI_CLK>; }; }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&gpio_keys_state>; + + key-volume-down { + label = "volume_down"; + linux,code = ; + gpios = <&pm6350_gpios 2 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&pm6350_gpios { + gpio_keys_state: gpio-keys-state { + key-volume-down-pins { + pins = "gpio2"; + function = PMIC_GPIO_FUNC_NORMAL; + power-source = <0>; + bias-disable; + input-enable; + }; + }; +}; + +&pm6350_resin { + linux,code = ; + status = "okay"; }; &sdc2_off_state { From patchwork Sun Oct 30 07:32:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marijn Suijten X-Patchwork-Id: 620665 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 00837FA373D for ; Sun, 30 Oct 2022 07:33:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230064AbiJ3HdB (ORCPT ); Sun, 30 Oct 2022 03:33:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58232 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229944AbiJ3Hcw (ORCPT ); Sun, 30 Oct 2022 03:32:52 -0400 Received: from relay03.th.seeweb.it (relay03.th.seeweb.it [5.144.164.164]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8A49360C9; Sun, 30 Oct 2022 00:32:47 -0700 (PDT) Received: from localhost.localdomain (94-209-172-39.cable.dynamic.v4.ziggo.nl [94.209.172.39]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by m-r1.th.seeweb.it (Postfix) with ESMTPSA id AF7A4200B9; Sun, 30 Oct 2022 08:32:45 +0100 (CET) From: Marijn Suijten To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, AngeloGioacchino Del Regno , Konrad Dybcio , Martin Botka , Jami Kettunen , Marijn Suijten , Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Luca Weiss , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 06/10] arm64: dts: qcom: sm6350-lena: Define pm6350 and pm6150l regulators Date: Sun, 30 Oct 2022 08:32:28 +0100 Message-Id: <20221030073232.22726-7-marijn.suijten@somainline.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221030073232.22726-1-marijn.suijten@somainline.org> References: <20221030073232.22726-1-marijn.suijten@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This regulator configuration was adopted from downstream, and is identical to the sm7225 FairPhone 4 configuration bar pm6350_l8a. Signed-off-by: Marijn Suijten --- .../qcom/sm6350-sony-xperia-lena-pdx213.dts | 218 ++++++++++++++++++ 1 file changed, 218 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6350-sony-xperia-lena-pdx213.dts b/arch/arm64/boot/dts/qcom/sm6350-sony-xperia-lena-pdx213.dts index 4512b0bf7fe1..1aaa9612b061 100644 --- a/arch/arm64/boot/dts/qcom/sm6350-sony-xperia-lena-pdx213.dts +++ b/arch/arm64/boot/dts/qcom/sm6350-sony-xperia-lena-pdx213.dts @@ -5,6 +5,7 @@ /dts-v1/; #include +#include #include "sm6350.dtsi" #include "pm6350.dtsi" @@ -44,6 +45,223 @@ key-volume-down { }; }; +&apps_rsc { + regulators-0 { + compatible = "qcom,pm6350-rpmh-regulators"; + qcom,pmic-id = "a"; + + pm6350_s1: smps1 { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1200000>; + regulator-initial-mode = ; + }; + + pm6350_s2: smps2 { + regulator-min-microvolt = <1503000>; + regulator-max-microvolt = <2048000>; + regulator-initial-mode = ; + }; + + pm6350_l2: ldo2 { + regulator-min-microvolt = <1503000>; + regulator-max-microvolt = <1980000>; + regulator-initial-mode = ; + }; + + pm6350_l3: ldo3 { + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3300000>; + regulator-initial-mode = ; + }; + + pm6350_l4: ldo4 { + regulator-min-microvolt = <352000>; + regulator-max-microvolt = <801000>; + regulator-initial-mode = ; + }; + + pm6350_l5: ldo5 { + regulator-min-microvolt = <1503000>; + regulator-max-microvolt = <1980000>; + regulator-initial-mode = ; + }; + + pm6350_l6: ldo6 { + regulator-min-microvolt = <1710000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = ; + }; + + pm6350_l7: ldo7 { + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <1980000>; + regulator-initial-mode = ; + }; + + pm6350_l8: ldo8 { + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = ; + }; + + pm6350_l9: ldo9 { + regulator-min-microvolt = <1650000>; + regulator-max-microvolt = <3401000>; + regulator-initial-mode = ; + }; + + pm6350_l11: ldo11 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2000000>; + regulator-initial-mode = ; + }; + + pm6350_l12: ldo12 { + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <1980000>; + regulator-initial-mode = ; + }; + + pm6350_l13: ldo13 { + regulator-min-microvolt = <570000>; + regulator-max-microvolt = <650000>; + regulator-initial-mode = ; + }; + + pm6350_l14: ldo14 { + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <1900000>; + regulator-initial-mode = ; + }; + + pm6350_l15: ldo15 { + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1305000>; + regulator-initial-mode = ; + }; + + pm6350_l16: ldo16 { + regulator-min-microvolt = <830000>; + regulator-max-microvolt = <921000>; + regulator-initial-mode = ; + }; + + pm6350_l18: ldo18 { + regulator-min-microvolt = <788000>; + regulator-max-microvolt = <1049000>; + regulator-initial-mode = ; + }; + + pm6350_l19: ldo19 { + regulator-min-microvolt = <1080000>; + regulator-max-microvolt = <1305000>; + regulator-initial-mode = ; + }; + + pm6350_l20: ldo20 { + regulator-min-microvolt = <530000>; + regulator-max-microvolt = <801000>; + regulator-initial-mode = ; + }; + + pm6350_l21: ldo21 { + regulator-min-microvolt = <751000>; + regulator-max-microvolt = <825000>; + regulator-initial-mode = ; + }; + + pm6350_l22: ldo22 { + regulator-min-microvolt = <1080000>; + regulator-max-microvolt = <1305000>; + regulator-initial-mode = ; + }; + }; + + regulators-1 { + compatible = "qcom,pm6150l-rpmh-regulators"; + qcom,pmic-id = "e"; + + pm6150l_s8: smps8 { + regulator-min-microvolt = <313000>; + regulator-max-microvolt = <1395000>; + regulator-initial-mode = ; + }; + + pm6150l_l1: ldo1 { + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <1980000>; + regulator-initial-mode = ; + }; + + pm6150l_l2: ldo2 { + regulator-min-microvolt = <1170000>; + regulator-max-microvolt = <1305000>; + regulator-initial-mode = ; + }; + + pm6150l_l3: ldo3 { + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1299000>; + regulator-initial-mode = ; + }; + + pm6150l_l4: ldo4 { + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <3300000>; + regulator-initial-mode = ; + }; + + pm6150l_l5: ldo5 { + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <3300000>; + regulator-initial-mode = ; + }; + + pm6150l_l6: ldo6 { + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = ; + }; + + pm6150l_l7: ldo7 { + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = ; + }; + + pm6150l_l8: ldo8 { + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <2000000>; + regulator-initial-mode = ; + }; + + pm6150l_l9: ldo9 { + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = ; + }; + + pm6150l_l10: ldo10 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3401000>; + regulator-initial-mode = ; + }; + + pm6150l_l11: ldo11 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3401000>; + regulator-initial-mode = ; + }; + + pm6150l_bob: bob { + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <5492000>; + regulator-initial-mode = ; + regulator-allow-bypass; + }; + }; +}; + &pm6350_gpios { gpio_keys_state: gpio-keys-state { key-volume-down-pins { From patchwork Sun Oct 30 07:32:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marijn Suijten X-Patchwork-Id: 620106 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 13A9FFA3745 for ; Sun, 30 Oct 2022 07:33:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230042AbiJ3Hc7 (ORCPT ); Sun, 30 Oct 2022 03:32:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58246 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229947AbiJ3Hcw (ORCPT ); Sun, 30 Oct 2022 03:32:52 -0400 Received: from m-r1.th.seeweb.it (m-r1.th.seeweb.it [IPv6:2001:4b7a:2000:18::170]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 685226278 for ; Sun, 30 Oct 2022 00:32:48 -0700 (PDT) Received: from localhost.localdomain (94-209-172-39.cable.dynamic.v4.ziggo.nl [94.209.172.39]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by m-r1.th.seeweb.it (Postfix) with ESMTPSA id 61D1C200BC; Sun, 30 Oct 2022 08:32:46 +0100 (CET) From: Marijn Suijten To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, AngeloGioacchino Del Regno , Konrad Dybcio , Martin Botka , Jami Kettunen , Marijn Suijten , Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Luca Weiss , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 07/10] arm64: dts: qcom: sm6350-lena: Provide power to SDHCI 2 (SDCard slot) Date: Sun, 30 Oct 2022 08:32:29 +0100 Message-Id: <20221030073232.22726-8-marijn.suijten@somainline.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221030073232.22726-1-marijn.suijten@somainline.org> References: <20221030073232.22726-1-marijn.suijten@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Without power the SDCard slot / hardware remains dormant. Like many other platforms these regulators are used exclusively by SDHCI, and have their maximum voltage decreased to what downstream sets on the consumer side. Additionally the SDHCI driver supports setting a load, for which the regulator definition is extended much the same. Signed-off-by: Marijn Suijten Reviewed-by: Konrad Dybcio --- .../dts/qcom/sm6350-sony-xperia-lena-pdx213.dts | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm6350-sony-xperia-lena-pdx213.dts b/arch/arm64/boot/dts/qcom/sm6350-sony-xperia-lena-pdx213.dts index 1aaa9612b061..5cb76026ef67 100644 --- a/arch/arm64/boot/dts/qcom/sm6350-sony-xperia-lena-pdx213.dts +++ b/arch/arm64/boot/dts/qcom/sm6350-sony-xperia-lena-pdx213.dts @@ -219,8 +219,13 @@ pm6150l_l5: ldo5 { pm6150l_l6: ldo6 { regulator-min-microvolt = <1700000>; - regulator-max-microvolt = <3544000>; + regulator-max-microvolt = <2950000>; regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = + ; + }; pm6150l_l7: ldo7 { @@ -237,8 +242,13 @@ pm6150l_l8: ldo8 { pm6150l_l9: ldo9 { regulator-min-microvolt = <2700000>; - regulator-max-microvolt = <3544000>; + regulator-max-microvolt = <2960000>; regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = + ; + }; pm6150l_l10: ldo10 { @@ -300,6 +310,9 @@ sd-cd-pins { &sdhc_2 { status = "okay"; + vmmc-supply = <&pm6150l_l9>; + vqmmc-supply = <&pm6150l_l6>; + cd-gpios = <&tlmm 94 GPIO_ACTIVE_HIGH>; }; From patchwork Sun Oct 30 07:32:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marijn Suijten X-Patchwork-Id: 620105 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 98F8DFA3742 for ; Sun, 30 Oct 2022 07:33:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230081AbiJ3HdC (ORCPT ); Sun, 30 Oct 2022 03:33:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58326 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229950AbiJ3Hcw (ORCPT ); Sun, 30 Oct 2022 03:32:52 -0400 Received: from relay03.th.seeweb.it (relay03.th.seeweb.it [5.144.164.164]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1D21B2DE; Sun, 30 Oct 2022 00:32:48 -0700 (PDT) Received: from localhost.localdomain (94-209-172-39.cable.dynamic.v4.ziggo.nl [94.209.172.39]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by m-r1.th.seeweb.it (Postfix) with ESMTPSA id 256C1200D5; Sun, 30 Oct 2022 08:32:47 +0100 (CET) From: Marijn Suijten To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, AngeloGioacchino Del Regno , Konrad Dybcio , Martin Botka , Jami Kettunen , Marijn Suijten , Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Luca Weiss , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 08/10] arm64: dts: qcom: sm6350-lena: Enable QUP and GPI DMA Date: Sun, 30 Oct 2022 08:32:30 +0100 Message-Id: <20221030073232.22726-9-marijn.suijten@somainline.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221030073232.22726-1-marijn.suijten@somainline.org> References: <20221030073232.22726-1-marijn.suijten@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Enable QUP and GPI DMA hardware to be able to add functioning I2C nodes later. Signed-off-by: Marijn Suijten --- .../dts/qcom/sm6350-sony-xperia-lena-pdx213.dts | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6350-sony-xperia-lena-pdx213.dts b/arch/arm64/boot/dts/qcom/sm6350-sony-xperia-lena-pdx213.dts index 5cb76026ef67..6eb1d4e5e60f 100644 --- a/arch/arm64/boot/dts/qcom/sm6350-sony-xperia-lena-pdx213.dts +++ b/arch/arm64/boot/dts/qcom/sm6350-sony-xperia-lena-pdx213.dts @@ -272,6 +272,14 @@ pm6150l_bob: bob { }; }; +&gpi_dma0 { + status = "okay"; +}; + +&gpi_dma1 { + status = "okay"; +}; + &pm6350_gpios { gpio_keys_state: gpio-keys-state { key-volume-down-pins { @@ -289,6 +297,14 @@ &pm6350_resin { status = "okay"; }; +&qupv3_id_0 { + status = "okay"; +}; + +&qupv3_id_1 { + status = "okay"; +}; + &sdc2_off_state { sd-cd-pins { pins = "gpio94"; From patchwork Sun Oct 30 07:32:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marijn Suijten X-Patchwork-Id: 620664 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6073FFA374C for ; Sun, 30 Oct 2022 07:33:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230096AbiJ3HdE (ORCPT ); Sun, 30 Oct 2022 03:33:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58312 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229974AbiJ3Hcx (ORCPT ); Sun, 30 Oct 2022 03:32:53 -0400 Received: from m-r1.th.seeweb.it (m-r1.th.seeweb.it [5.144.164.170]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0309962F8; Sun, 30 Oct 2022 00:32:49 -0700 (PDT) Received: from localhost.localdomain (94-209-172-39.cable.dynamic.v4.ziggo.nl [94.209.172.39]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by m-r1.th.seeweb.it (Postfix) with ESMTPSA id D20C3200D9; Sun, 30 Oct 2022 08:32:47 +0100 (CET) From: Marijn Suijten To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, AngeloGioacchino Del Regno , Konrad Dybcio , Martin Botka , Jami Kettunen , Marijn Suijten , Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Luca Weiss , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 09/10] arm64: dts: qcom: sm6350-lena: Configure Samsung touchscreen Date: Sun, 30 Oct 2022 08:32:31 +0100 Message-Id: <20221030073232.22726-10-marijn.suijten@somainline.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221030073232.22726-1-marijn.suijten@somainline.org> References: <20221030073232.22726-1-marijn.suijten@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Use the generic samsung,s6sy761 touchscreen driver for this device, together with a few pins and regulators to power it up correctly. Signed-off-by: Marijn Suijten --- .../qcom/sm6350-sony-xperia-lena-pdx213.dts | 41 +++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6350-sony-xperia-lena-pdx213.dts b/arch/arm64/boot/dts/qcom/sm6350-sony-xperia-lena-pdx213.dts index 6eb1d4e5e60f..20f35623d1ef 100644 --- a/arch/arm64/boot/dts/qcom/sm6350-sony-xperia-lena-pdx213.dts +++ b/arch/arm64/boot/dts/qcom/sm6350-sony-xperia-lena-pdx213.dts @@ -43,6 +43,15 @@ key-volume-down { gpios = <&pm6350_gpios 2 GPIO_ACTIVE_LOW>; }; }; + + touch_en_vreg: touch-en-regulator { + compatible = "regulator-fixed"; + regulator-name = "touch_en_vreg"; + gpio = <&tlmm 10 GPIO_ACTIVE_HIGH>; + enable-active-high; + + vin-supply = <&pm6350_l6>; + }; }; &apps_rsc { @@ -280,6 +289,23 @@ &gpi_dma1 { status = "okay"; }; +&i2c8 { + clock-frequency = <400000>; + status = "okay"; + + touchscreen@48 { + compatible = "samsung,s6sy761"; + reg = <0x48>; + interrupt-parent = <&tlmm>; + interrupts = <22 0x2008>; + vdd-supply = <&pm6350_l11>; + avdd-supply = <&touch_en_vreg>; + + pinctrl-names = "default"; + pinctrl-0 = <&ts_int_default &ts_active>; + }; +}; + &pm6350_gpios { gpio_keys_state: gpio-keys-state { key-volume-down-pins { @@ -334,6 +360,21 @@ &sdhc_2 { &tlmm { gpio-reserved-ranges = <13 4>, <45 2>, <56 2>; + + ts_active: ts-active-state { + pins = "gpio21"; + function = "gpio"; + drive-strength = <8>; + bias-pull-up; + }; + + ts_int_default: ts-int-default-state { + pins = "gpio22"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + input-enable; + }; }; &usb_1 { From patchwork Sun Oct 30 07:32:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marijn Suijten X-Patchwork-Id: 620104 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C2E1FC38A02 for ; Sun, 30 Oct 2022 07:33:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229983AbiJ3HdJ (ORCPT ); Sun, 30 Oct 2022 03:33:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58348 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229727AbiJ3Hcx (ORCPT ); Sun, 30 Oct 2022 03:32:53 -0400 Received: from relay02.th.seeweb.it (relay02.th.seeweb.it [IPv6:2001:4b7a:2000:18::163]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E064A615C; Sun, 30 Oct 2022 00:32:50 -0700 (PDT) Received: from localhost.localdomain (94-209-172-39.cable.dynamic.v4.ziggo.nl [94.209.172.39]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by m-r1.th.seeweb.it (Postfix) with ESMTPSA id 82D06200DF; Sun, 30 Oct 2022 08:32:48 +0100 (CET) From: Marijn Suijten To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, AngeloGioacchino Del Regno , Konrad Dybcio , Martin Botka , Jami Kettunen , Marijn Suijten , Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Luca Weiss , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 10/10] arm64: dts: qcom: sm6350: Add apps_smmu with streamID to SDHCI 1/2 nodes Date: Sun, 30 Oct 2022 08:32:32 +0100 Message-Id: <20221030073232.22726-11-marijn.suijten@somainline.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221030073232.22726-1-marijn.suijten@somainline.org> References: <20221030073232.22726-1-marijn.suijten@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org When enabling the APPS SMMU the mainline driver reconfigures the SMMU from its bootloader configuration, loosing the stream mapping for (among which) the SDHCI hardware and breaking its ADMA feature. This feature can be disabled with: sdhci.debug_quirks=0x40 But it is of course desired to have this feature enabled and working through the SMMU. Signed-off-by: Marijn Suijten Reviewed-by: Luca Weiss Tested-by: Luca Weiss # sm7225-fairphone-fp4 --- arch/arm64/boot/dts/qcom/sm6350.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi index b98b881ebe7e..c309a359ded9 100644 --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi @@ -485,6 +485,7 @@ sdhc_1: mmc@7c4000 { interrupts = , ; interrupt-names = "hc_irq", "pwr_irq"; + iommus = <&apps_smmu 0x60 0x0>; clocks = <&gcc GCC_SDCC1_AHB_CLK>, <&gcc GCC_SDCC1_APPS_CLK>, @@ -1064,6 +1065,7 @@ sdhc_2: mmc@8804000 { interrupts = , ; interrupt-names = "hc_irq", "pwr_irq"; + iommus = <&apps_smmu 0x560 0x0>; clocks = <&gcc GCC_SDCC2_AHB_CLK>, <&gcc GCC_SDCC2_APPS_CLK>,