From patchwork Wed Oct 26 16:13:01 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 618961 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1A236C433FE for ; Wed, 26 Oct 2022 16:13:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234222AbiJZQNV (ORCPT ); Wed, 26 Oct 2022 12:13:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41916 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233142AbiJZQNU (ORCPT ); Wed, 26 Oct 2022 12:13:20 -0400 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 64990C14A8; Wed, 26 Oct 2022 09:13:18 -0700 (PDT) Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 29QGD3BJ070849; Wed, 26 Oct 2022 11:13:03 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1666800783; bh=LTI1Wr9GdjIOI9z/mew/qvEjKrSpMEHVt0CyzLWzLZI=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=K+QJVB2YiawWIFca3zTgtsUJLbDJtfqh7zvZzTUNG8f9Z4HhgT1HBLyRFtXl2GdAz EFxJ62HQe0Dh//ZKZKLwvhNU4xwobnLPrFZi5+hLhWBXgjxx44Emd9wAict0gAK8QE 6Ll0QfK2uhmXzqRf5jj+Q9Lv7IieZ5FzE2c7pyWo= Received: from DFLE113.ent.ti.com (dfle113.ent.ti.com [10.64.6.34]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 29QGD3CP109402 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 26 Oct 2022 11:13:03 -0500 Received: from DFLE109.ent.ti.com (10.64.6.30) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Wed, 26 Oct 2022 11:13:03 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Wed, 26 Oct 2022 11:13:03 -0500 Received: from ula0226330.dal.design.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 29QGD28C006482; Wed, 26 Oct 2022 11:13:03 -0500 From: Andrew Davis To: Arnd Bergmann , Linus Walleij , Geert Uytterhoeven , Daniel Tang , Fabian Vogt , , , CC: Andrew Davis Subject: [PATCH v2 1/2] ARM: nspire: Use syscon-reboot to handle restart Date: Wed, 26 Oct 2022 11:13:01 -0500 Message-ID: <20221026161302.5319-2-afd@ti.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20221026161302.5319-1-afd@ti.com> References: <20221026161302.5319-1-afd@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Writing this bit can be handled by the syscon-reboot driver. Add the info to DT and remove the machine_desc version. Signed-off-by: Andrew Davis Reviewed-by: Linus Walleij --- arch/arm/boot/dts/nspire.dtsi | 7 +++++++ arch/arm/mach-nspire/Kconfig | 2 ++ arch/arm/mach-nspire/mmio.h | 3 --- arch/arm/mach-nspire/nspire.c | 10 ---------- 4 files changed, 9 insertions(+), 13 deletions(-) diff --git a/arch/arm/boot/dts/nspire.dtsi b/arch/arm/boot/dts/nspire.dtsi index bb240e6a3a6f..6357b803521e 100644 --- a/arch/arm/boot/dts/nspire.dtsi +++ b/arch/arm/boot/dts/nspire.dtsi @@ -172,7 +172,14 @@ rtc: rtc@90090000 { }; misc: misc@900a0000 { + compatible = "syscon", "simple-mfd"; reg = <0x900a0000 0x1000>; + + reboot { + compatible = "syscon-reboot"; + offset = <0x08>; + value = <0x02>; + }; }; pwr: pwr@900b0000 { diff --git a/arch/arm/mach-nspire/Kconfig b/arch/arm/mach-nspire/Kconfig index b7a3871876d7..0ffdcaca1e6b 100644 --- a/arch/arm/mach-nspire/Kconfig +++ b/arch/arm/mach-nspire/Kconfig @@ -9,5 +9,7 @@ config ARCH_NSPIRE select ARM_VIC select ARM_TIMER_SP804 select NSPIRE_TIMER + select POWER_RESET + select POWER_RESET_SYSCON help This enables support for systems using the TI-NSPIRE CPU diff --git a/arch/arm/mach-nspire/mmio.h b/arch/arm/mach-nspire/mmio.h index 48e32f13f311..2ce0656139ec 100644 --- a/arch/arm/mach-nspire/mmio.h +++ b/arch/arm/mach-nspire/mmio.h @@ -5,9 +5,6 @@ * Copyright (C) 2013 Daniel Tang */ -#define NSPIRE_MISC_PHYS_BASE 0x900A0000 -#define NSPIRE_MISC_HWRESET 0x08 - #define NSPIRE_PWR_PHYS_BASE 0x900B0000 #define NSPIRE_PWR_VIRT_BASE 0xFEEB0000 #define NSPIRE_PWR_BUS_DISABLE1 0x18 diff --git a/arch/arm/mach-nspire/nspire.c b/arch/arm/mach-nspire/nspire.c index 2d4abb0288b9..1e13337972dd 100644 --- a/arch/arm/mach-nspire/nspire.c +++ b/arch/arm/mach-nspire/nspire.c @@ -27,16 +27,6 @@ static const char *const nspire_dt_match[] __initconst = { NULL, }; -static void nspire_restart(enum reboot_mode mode, const char *cmd) -{ - void __iomem *base = ioremap(NSPIRE_MISC_PHYS_BASE, SZ_4K); - if (!base) - return; - - writel(2, base + NSPIRE_MISC_HWRESET); -} - DT_MACHINE_START(NSPIRE, "TI-NSPIRE") .dt_compat = nspire_dt_match, - .restart = nspire_restart, MACHINE_END From patchwork Wed Oct 26 16:13:02 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 618960 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 66E27C433FE for ; Wed, 26 Oct 2022 16:13:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234675AbiJZQNY (ORCPT ); Wed, 26 Oct 2022 12:13:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41980 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234672AbiJZQNW (ORCPT ); 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Wed, 26 Oct 2022 11:13:03 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Wed, 26 Oct 2022 11:13:04 -0500 Received: from ula0226330.dal.design.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 29QGD28D006482; Wed, 26 Oct 2022 11:13:03 -0500 From: Andrew Davis To: Arnd Bergmann , Linus Walleij , Geert Uytterhoeven , Daniel Tang , Fabian Vogt , , , CC: Andrew Davis Subject: [PATCH v2 2/2] ARM: nspire: Remove unused header file mmio.h Date: Wed, 26 Oct 2022 11:13:02 -0500 Message-ID: <20221026161302.5319-3-afd@ti.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20221026161302.5319-1-afd@ti.com> References: <20221026161302.5319-1-afd@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The Nspire boardfile platform drivers have all been converted. None of the definitions in this header are used anymore. Remove it. While here lets remove all the other unused headers and the file name from in the file itself. Signed-off-by: Andrew Davis --- arch/arm/mach-nspire/mmio.h | 13 ------------- arch/arm/mach-nspire/nspire.c | 14 -------------- 2 files changed, 27 deletions(-) delete mode 100644 arch/arm/mach-nspire/mmio.h diff --git a/arch/arm/mach-nspire/mmio.h b/arch/arm/mach-nspire/mmio.h deleted file mode 100644 index 2ce0656139ec..000000000000 --- a/arch/arm/mach-nspire/mmio.h +++ /dev/null @@ -1,13 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * linux/arch/arm/mach-nspire/mmio.h - * - * Copyright (C) 2013 Daniel Tang - */ - -#define NSPIRE_PWR_PHYS_BASE 0x900B0000 -#define NSPIRE_PWR_VIRT_BASE 0xFEEB0000 -#define NSPIRE_PWR_BUS_DISABLE1 0x18 -#define NSPIRE_PWR_BUS_DISABLE2 0x20 - -#define NSPIRE_LCD_PHYS_BASE 0xC0000000 diff --git a/arch/arm/mach-nspire/nspire.c b/arch/arm/mach-nspire/nspire.c index 1e13337972dd..2fbfc23237ff 100644 --- a/arch/arm/mach-nspire/nspire.c +++ b/arch/arm/mach-nspire/nspire.c @@ -1,23 +1,9 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * linux/arch/arm/mach-nspire/nspire.c - * * Copyright (C) 2013 Daniel Tang */ -#include -#include -#include -#include -#include -#include -#include -#include #include -#include -#include - -#include "mmio.h" static const char *const nspire_dt_match[] __initconst = { "ti,nspire",