From patchwork Mon Oct 17 16:42:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dario Binacchi X-Patchwork-Id: 616230 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 04C9FC4332F for ; Mon, 17 Oct 2022 16:43:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230110AbiJQQnG (ORCPT ); Mon, 17 Oct 2022 12:43:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43534 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229996AbiJQQnD (ORCPT ); Mon, 17 Oct 2022 12:43:03 -0400 Received: from mail-ej1-x62e.google.com (mail-ej1-x62e.google.com [IPv6:2a00:1450:4864:20::62e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C77FF6EF1E for ; Mon, 17 Oct 2022 09:43:01 -0700 (PDT) Received: by mail-ej1-x62e.google.com with SMTP id y14so26210844ejd.9 for ; Mon, 17 Oct 2022 09:43:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=D8/Md0NYJHUSKcz4MJWTxhKaskWW/ctRpyjjxqRRhnc=; b=MQqDeGmhfaHZojh/XCQv+q0XPLUePi2WVRcWzhdqpgGDSn7KUvowytrva0axseL/ji xFupNRehAAon4c1+nVPE/xoPe6KgppDovn6S/iPc/V3rXsNGUDXAhfEzh9vrISPv125c /MyBHlaX9dwHOEVkV7139J8m2mMI6t+LHst9k= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=D8/Md0NYJHUSKcz4MJWTxhKaskWW/ctRpyjjxqRRhnc=; b=1H4XV9FepWFTRtmmEUrEkgPCLQbjB1L2f8X1d488TwR+8sg6JmpEzo9QtdMs0KGPhp Ia8i+DgkJMTVlfHmJ9QA+Qbq8tK3xaaSSj72ZGTVx3V0b5Mt2lkmh/sAmHn5DE+rpKL3 V6q6+bFcfAgGVuAHz6Mzooe6dDEjBjw8BB3VgWiyHKaeXwEJ9SrYoR42TEgpvEW6ujcg 97XfRAXeiI+3rVK8t8JiL3ThuVU4vmqmPhZ2OUiCI/VqKRWQZJiJPq78qtGFEGtIdGFi AjjF1bq997rwcbFqai6RG4W+Cw3hLYMpgHhEM03SW++QT7Fflg4x/QiU/uqVJtO50xbV TnBA== X-Gm-Message-State: ACrzQf3ailcVkgoOsmhGaDmuRtd2HAxe2w0zAzG4Gvh7cYtDCd0jf46l vwYVbl+CHuwu6zfXZpaFCGRR3w== X-Google-Smtp-Source: AMsMyM4L9wY21ugyePula3Hn8+jlnnouENgEU5TksoZ1/0mR1jpO4wtiDo/MgxHzz1DX9CscFJ/4Ew== X-Received: by 2002:a17:907:d9e:b0:78e:2ff7:72f4 with SMTP id go30-20020a1709070d9e00b0078e2ff772f4mr9016694ejc.608.1666024980203; Mon, 17 Oct 2022 09:43:00 -0700 (PDT) Received: from dario-ThinkPad-T14s-Gen-2i.homenet.telecomitalia.it (host-95-244-101-110.retail.telecomitalia.it. [95.244.101.110]) by smtp.gmail.com with ESMTPSA id a24-20020a1709063a5800b0078128c89439sm6437388ejf.6.2022.10.17.09.42.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Oct 2022 09:42:59 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: michael@amarulasolutions.com, Vincent Mailhol , Krzysztof Kozlowski , Rob Herring , Marc Kleine-Budde , Amarula patchwork , Alexandre Torgue , Dario Binacchi , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Krzysztof Kozlowski , Maxime Coquelin , Paolo Abeni , Rob Herring , Wolfgang Grandegger , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-can@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, netdev@vger.kernel.org Subject: [RFC PATCH v5 2/5] dt-bindings: net: can: add STM32 bxcan DT bindings Date: Mon, 17 Oct 2022 18:42:28 +0200 Message-Id: <20221017164231.4192699-3-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20221017164231.4192699-1-dario.binacchi@amarulasolutions.com> References: <20221017164231.4192699-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add documentation of device tree bindings for the STM32 basic extended CAN (bxcan) controller. Signed-off-by: Dario Binacchi Reviewed-by: Rob Herring --- Changes in v5: - Add Rob Herring's Reviewed-by tag. Changes in v4: - Remove "st,stm32f4-bxcan-core" compatible. In this way the can nodes (compatible "st,stm32f4-bxcan") are no longer children of a parent node with compatible "st,stm32f4-bxcan-core". - Add the "st,gcan" property (global can memory) to can nodes which references a "syscon" node containing the shared clock and memory addresses. Changes in v3: - Remove 'Dario Binacchi ' SOB. - Add description to the parent of the two child nodes. - Move "patterProperties:" after "properties: in top level before "required". - Add "clocks" to the "required:" list of the child nodes. Changes in v2: - Change the file name into 'st,stm32-bxcan-core.yaml'. - Rename compatibles: - st,stm32-bxcan-core -> st,stm32f4-bxcan-core - st,stm32-bxcan -> st,stm32f4-bxcan - Rename master property to st,can-master. - Remove the status property from the example. - Put the node child properties as required. .../bindings/net/can/st,stm32-bxcan.yaml | 83 +++++++++++++++++++ 1 file changed, 83 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml diff --git a/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml b/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml new file mode 100644 index 000000000000..c9194345d202 --- /dev/null +++ b/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml @@ -0,0 +1,83 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/can/st,stm32-bxcan.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: STMicroelectronics bxCAN controller + +description: STMicroelectronics BxCAN controller for CAN bus + +maintainers: + - Dario Binacchi + +allOf: + - $ref: can-controller.yaml# + +properties: + compatible: + enum: + - st,stm32f4-bxcan + + st,can-master: + description: + Master and slave mode of the bxCAN peripheral is only relevant + if the chip has two CAN peripherals. In that case they share + some of the required logic. + type: boolean + + reg: + maxItems: 1 + + interrupts: + items: + - description: transmit interrupt + - description: FIFO 0 receive interrupt + - description: FIFO 1 receive interrupt + - description: status change error interrupt + + interrupt-names: + items: + - const: tx + - const: rx0 + - const: rx1 + - const: sce + + resets: + maxItems: 1 + + clocks: + maxItems: 1 + + st,gcan: + $ref: "/schemas/types.yaml#/definitions/phandle-array" + description: + The phandle to the gcan node which allows to access the 512-bytes + SRAM memory shared by the two bxCAN cells (CAN1 master and CAN2 + slave) in dual CAN peripheral configuration. + +required: + - compatible + - reg + - interrupts + - resets + - clocks + - st,gcan + +additionalProperties: false + +examples: + - | + #include + #include + + can1: can@40006400 { + compatible = "st,stm32f4-bxcan"; + reg = <0x40006400 0x200>; + interrupts = <19>, <20>, <21>, <22>; + interrupt-names = "tx", "rx0", "rx1", "sce"; + resets = <&rcc STM32F4_APB1_RESET(CAN1)>; + clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN1)>; + st,can-master; + st,gcan = <&gcan>; + }; From patchwork Mon Oct 17 16:42:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dario Binacchi X-Patchwork-Id: 616229 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5B447C4332F for ; Mon, 17 Oct 2022 16:43:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229622AbiJQQns (ORCPT ); Mon, 17 Oct 2022 12:43:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43584 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230104AbiJQQnF (ORCPT ); Mon, 17 Oct 2022 12:43:05 -0400 Received: from mail-ej1-x634.google.com (mail-ej1-x634.google.com [IPv6:2a00:1450:4864:20::634]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 62B726F54D for ; Mon, 17 Oct 2022 09:43:04 -0700 (PDT) Received: by mail-ej1-x634.google.com with SMTP id d26so26218922eje.10 for ; Mon, 17 Oct 2022 09:43:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=jfErmyZAWFClEhl0ayKENaiIcOOkglWFws7K0nbLI8s=; b=YuN4qQfoF2e6dqSHS3GhLHb/376NeF5+Jco53igUcBLyO5ti7l9A4gPewJm8dn7UPY 3JPB2LigOAkU45CZSZTH603Lu+eam4JgCNjheQI7m8DAoVUCMhpm45xLkjcpQ/wDqaHz Z8SfkC1aDXtOBuNlrsguluGrdbMpJ05GOQLEg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=jfErmyZAWFClEhl0ayKENaiIcOOkglWFws7K0nbLI8s=; b=N2JafJKhcl92iKgy3FjXa5EteMoEEI0tQQ07z9dPs4SlOulMmySMS44XZspxcE/Txc iBpen6YoxQle5L4Q9veFWsJWBX7mBjIhMxvP3xPS6hbR1wqnZ9cYqo82LgEAL57/uh0G XcEM7bWQ+eM3c9uW3barfLF5vdGW7xLrPuMSGwiCBQMj07mdA2PjrkRmH3t9rcjI/voQ FDfScKOUzRCUJQIMJL+gROPuqa9ekKI6bWWmm7uijYoJ2U72fmkugABa/4T8aBevnvhB 51naG1dJkXefLoqDKkOApORYFTgjb47Ij1Ay1aVSX1Xj9JiJKZDZ9mj2X7U8YnTRMABy iJWw== X-Gm-Message-State: ACrzQf2NI+6s8D+Pf7GCHYgHXi6BMQjVkG6p79IfuIRIce5llhg/a6SP kD8xMfPQyPUvyYh7+lUG5sPRZA== X-Google-Smtp-Source: AMsMyM5MTwEylTtgZG6px7FM0pHSFioXMA9CyVHtYoL4kufNNLTWNYIIIYw+AGduM16cdlExHZdjow== X-Received: by 2002:a17:906:9bd8:b0:78d:85f9:36ae with SMTP id de24-20020a1709069bd800b0078d85f936aemr9452638ejc.342.1666024982791; Mon, 17 Oct 2022 09:43:02 -0700 (PDT) Received: from dario-ThinkPad-T14s-Gen-2i.homenet.telecomitalia.it (host-95-244-101-110.retail.telecomitalia.it. [95.244.101.110]) by smtp.gmail.com with ESMTPSA id a24-20020a1709063a5800b0078128c89439sm6437388ejf.6.2022.10.17.09.43.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Oct 2022 09:43:02 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: michael@amarulasolutions.com, Vincent Mailhol , Krzysztof Kozlowski , Rob Herring , Marc Kleine-Budde , Amarula patchwork , Alexandre Torgue , Dario Binacchi , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [RFC PATCH v5 4/5] ARM: dts: stm32: add pin map for CAN controller on stm32f4 Date: Mon, 17 Oct 2022 18:42:30 +0200 Message-Id: <20221017164231.4192699-5-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20221017164231.4192699-1-dario.binacchi@amarulasolutions.com> References: <20221017164231.4192699-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add pin configurations for using CAN controller on stm32f469-disco board. They are located on the Arduino compatible connector CN5 (CAN1) and on the extension connector CN12 (CAN2). Signed-off-by: Dario Binacchi --- (no changes since v3) Changes in v3: - Remove 'Dario Binacchi ' SOB. - Remove a blank line. Changes in v2: - Remove a blank line. arch/arm/boot/dts/stm32f4-pinctrl.dtsi | 30 ++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm/boot/dts/stm32f4-pinctrl.dtsi b/arch/arm/boot/dts/stm32f4-pinctrl.dtsi index 500bcc302d42..8a4d51f97248 100644 --- a/arch/arm/boot/dts/stm32f4-pinctrl.dtsi +++ b/arch/arm/boot/dts/stm32f4-pinctrl.dtsi @@ -448,6 +448,36 @@ pins2 { slew-rate = <2>; }; }; + + can1_pins_a: can1-0 { + pins1 { + pinmux = ; /* CAN1_TX */ + }; + pins2 { + pinmux = ; /* CAN1_RX */ + bias-pull-up; + }; + }; + + can2_pins_a: can2-0 { + pins1 { + pinmux = ; /* CAN2_TX */ + }; + pins2 { + pinmux = ; /* CAN2_RX */ + bias-pull-up; + }; + }; + + can2_pins_b: can2-1 { + pins1 { + pinmux = ; /* CAN2_TX */ + }; + pins2 { + pinmux = ; /* CAN2_RX */ + bias-pull-up; + }; + }; }; }; };