From patchwork Fri Oct 14 21:32:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Micha=C5=82_Grzelak?= X-Patchwork-Id: 615320 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 41899C4332F for ; Fri, 14 Oct 2022 21:33:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229972AbiJNVdo (ORCPT ); Fri, 14 Oct 2022 17:33:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58054 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230028AbiJNVdm (ORCPT ); Fri, 14 Oct 2022 17:33:42 -0400 Received: from mail-lf1-x12d.google.com (mail-lf1-x12d.google.com [IPv6:2a00:1450:4864:20::12d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 230F51DD884 for ; Fri, 14 Oct 2022 14:33:40 -0700 (PDT) Received: by mail-lf1-x12d.google.com with SMTP id r14so9160886lfm.2 for ; Fri, 14 Oct 2022 14:33:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=wbrIhm/AmB1rz/cuApJvSIYA4825L6AV/ptNDaFUuOo=; b=L+IRdYp5whthBudWQlQolIEPKp4W57CIUnrvpl5e/4J6c8pDSJCV6P4wcQ4eTvbrFV I7D6FQL4LQw8ugEUP6BgGGqD2XZNsLP9yBxLiNDvSJBnxcrjbmCyfvO/tYjghJLgDG4W xdJwnYuAqGqWQ8ctqDt+cHKg+ZiezUld+S0NhxTSowG+KkTWZPmtFwp54CkbyIUjAtQr hrXIp1QWhDHxKmcbEkVlwt1KafntU2zQ3x+7zzrLf0Es01c4W6OmwwE8gpecSa/vvt5o /jEUxMH6/wR9WtpCdvNY+pvLPkdbIyMte2ZbitObZIcoRHSahHzWtVseiouw/sjSp9fu +L5w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=wbrIhm/AmB1rz/cuApJvSIYA4825L6AV/ptNDaFUuOo=; b=6DBcw2vZmmyP3iKzueTpfV0/WWwGk0Z2WVtjzEsgUDNG0Th2efR0wS23lIX9Ph25V1 dCWhRms8dzKvO+idCGXyO13X6HLHgh88HmhJ7dBLKtejDILJNmZR9RUVKSQWUNT9Lk5a u8O8/SffK3XjgVIx9gr+9nmd2WZBi0YpO61MyLHUgSEwJ843s3raGztk0XTC6RgNkuFJ Hzbi6966/RGfLdjGPjN++cn6yFK+GS6lEfiAakTgOYvybxDWRllothKXcrTdIQdpBfep 96ur4sS9tWkGjVVQE2bB3SBJtv9eHhs2rygcFemkMePj4/r+ZRszYQqEDAaXoyibf6ir W0wQ== X-Gm-Message-State: ACrzQf2LZV6emscZ6wl/MJUN54NSvld2/G2T9CKYNi7j8uTWWsqSd+6X MHkK1nhWrHDATVxIlIQ/3S2m0t3d+r2MIOPE X-Google-Smtp-Source: AMsMyM4mPUV+ti1mLN4Z4g93XkSuzbtjc3KoKVbvbRPo4Fw6ub9XSf3NS50mmOuGoHQtvXxUJG7/qw== X-Received: by 2002:a05:6512:2a92:b0:4a1:d2c9:c2d0 with SMTP id dt18-20020a0565122a9200b004a1d2c9c2d0mr2503099lfb.278.1665783218416; Fri, 14 Oct 2022 14:33:38 -0700 (PDT) Received: from fedora.. ([78.10.207.24]) by smtp.gmail.com with ESMTPSA id d4-20020ac24c84000000b00494978b0caesm494036lfl.276.2022.10.14.14.33.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 14 Oct 2022 14:33:38 -0700 (PDT) From: =?utf-8?q?Micha=C5=82_Grzelak?= To: devicetree@vger.kernel.org Cc: mw@semihalf.com, linux@armlinux.org.uk, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, upstream@semihalf.com, =?utf-8?q?Micha=C5=82_?= =?utf-8?q?Grzelak?= Subject: [PATCH v5 1/3] dt-bindings: net: marvell,pp2: convert to json-schema Date: Fri, 14 Oct 2022 23:32:52 +0200 Message-Id: <20221014213254.30950-2-mig@semihalf.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20221014213254.30950-1-mig@semihalf.com> References: <20221014213254.30950-1-mig@semihalf.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Convert the marvell,pp2 bindings from text to proper schema. Move 'marvell,system-controller' and 'dma-coherent' properties from port up to the controller node, to match what is actually done in DT. Rename all subnodes to match "^(ethernet-)?port@[0-2]$" and deprecate port-id in favour of 'reg'. Signed-off-by: Michał Grzelak Reviewed-by: Rob Herring --- .../devicetree/bindings/net/marvell,pp2.yaml | 305 ++++++++++++++++++ .../devicetree/bindings/net/marvell-pp2.txt | 141 -------- MAINTAINERS | 2 +- 3 files changed, 306 insertions(+), 142 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/marvell,pp2.yaml delete mode 100644 Documentation/devicetree/bindings/net/marvell-pp2.txt diff --git a/Documentation/devicetree/bindings/net/marvell,pp2.yaml b/Documentation/devicetree/bindings/net/marvell,pp2.yaml new file mode 100644 index 000000000000..4eadafc43d4f --- /dev/null +++ b/Documentation/devicetree/bindings/net/marvell,pp2.yaml @@ -0,0 +1,305 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/marvell,pp2.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell CN913X / Marvell Armada 375, 7K, 8K Ethernet Controller + +maintainers: + - Marcin Wojtas + - Russell King + +description: | + Marvell Armada 375 Ethernet Controller (PPv2.1) + Marvell Armada 7K/8K Ethernet Controller (PPv2.2) + Marvell CN913X Ethernet Controller (PPv2.3) + +properties: + compatible: + enum: + - marvell,armada-375-pp2 + - marvell,armada-7k-pp22 + + reg: + minItems: 3 + maxItems: 4 + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + clocks: + minItems: 2 + items: + - description: main controller clock + - description: GOP clock + - description: MG clock + - description: MG Core clock + - description: AXI clock + + clock-names: + minItems: 2 + items: + - const: pp_clk + - const: gop_clk + - const: mg_clk + - const: mg_core_clk + - const: axi_clk + + dma-coherent: true + + marvell,system-controller: + $ref: /schemas/types.yaml#/definitions/phandle + description: a phandle to the system controller. + +patternProperties: + '^(ethernet-)?port@[0-2]$': + type: object + description: subnode for each ethernet port. + $ref: ethernet-controller.yaml# + unevaluatedProperties: false + + properties: + reg: + description: ID of the port from the MAC point of view. + maximum: 2 + + interrupts: + minItems: 1 + maxItems: 10 + description: interrupt(s) for the port + + interrupt-names: + minItems: 1 + items: + - const: hif0 + - const: hif1 + - const: hif2 + - const: hif3 + - const: hif4 + - const: hif5 + - const: hif6 + - const: hif7 + - const: hif8 + - const: link + + description: > + if more than a single interrupt for is given, must be the + name associated to the interrupts listed. Valid names are: + "hifX", with X in [0..8], and "link". The names "tx-cpu0", + "tx-cpu1", "tx-cpu2", "tx-cpu3" and "rx-shared" are supported + for backward compatibility but shouldn't be used for new + additions. + + phys: + minItems: 1 + maxItems: 2 + description: > + Generic PHY, providing SerDes connectivity. For most modes, + one lane is sufficient, but some (e.g. RXAUI) may require two. + + phy-mode: + enum: + - gmii + - sgmii + - rgmii-id + - 1000base-x + - 2500base-x + - 5gbase-r + - rxaui + - 10gbase-r + + port-id: + $ref: /schemas/types.yaml#/definitions/uint32 + deprecated: true + description: > + ID of the port from the MAC point of view. + Legacy binding for backward compatibility. + + marvell,loopback: + $ref: /schemas/types.yaml#/definitions/flag + description: port is loopback mode. + + gop-port-id: + $ref: /schemas/types.yaml#/definitions/uint32 + description: > + only for marvell,armada-7k-pp22, ID of the port from the + GOP (Group Of Ports) point of view. This ID is used to index the + per-port registers in the second register area. + + required: + - reg + - interrupts + - phy-mode + - port-id + +required: + - compatible + - reg + - clocks + - clock-names + +allOf: + - if: + properties: + compatible: + const: marvell,armada-7k-pp22 + then: + properties: + reg: + items: + - description: Packet Processor registers + - description: Networking interfaces registers + - description: CM3 address space used for TX Flow Control + + clocks: + minItems: 5 + + clock-names: + minItems: 5 + + patternProperties: + '^(ethernet-)?port@[0-2]$': + required: + - gop-port-id + + required: + - marvell,system-controller + else: + properties: + reg: + items: + - description: Packet Processor registers + - description: LMS registers + - description: Register area per eth0 + - description: Register area per eth1 + + clocks: + maxItems: 2 + + clock-names: + maxItems: 2 + + patternProperties: + '^(ethernet-)?port@[0-1]$': + properties: + reg: + maximum: 1 + + gop-port-id: false + +additionalProperties: false + +examples: + - | + // For Armada 375 variant + #include + #include + + ethernet@f0000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "marvell,armada-375-pp2"; + reg = <0xf0000 0xa000>, + <0xc0000 0x3060>, + <0xc4000 0x100>, + <0xc5000 0x100>; + clocks = <&gateclk 3>, <&gateclk 19>; + clock-names = "pp_clk", "gop_clk"; + + ethernet-port@0 { + interrupts = ; + reg = <0>; + port-id = <0>; /* For backward compatibility. */ + phy = <&phy0>; + phy-mode = "rgmii-id"; + }; + + ethernet-port@1 { + interrupts = ; + reg = <1>; + port-id = <1>; /* For backward compatibility. */ + phy = <&phy3>; + phy-mode = "gmii"; + }; + }; + + - | + // For Armada 7k/8k and Cn913x variants + #include + #include + + ethernet@0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "marvell,armada-7k-pp22"; + reg = <0x0 0x100000>, <0x129000 0xb000>, <0x220000 0x800>; + clocks = <&cp0_clk 1 3>, <&cp0_clk 1 9>, + <&cp0_clk 1 5>, <&cp0_clk 1 6>, <&cp0_clk 1 18>; + clock-names = "pp_clk", "gop_clk", "mg_clk", "mg_core_clk", "axi_clk"; + marvell,system-controller = <&cp0_syscon0>; + + ethernet-port@0 { + interrupts = , + , + , + , + , + , + , + , + , + ; + interrupt-names = "hif0", "hif1", "hif2", "hif3", "hif4", + "hif5", "hif6", "hif7", "hif8", "link"; + phy-mode = "10gbase-r"; + phys = <&cp0_comphy4 0>; + reg = <0>; + port-id = <0>; /* For backward compatibility. */ + gop-port-id = <0>; + }; + + ethernet-port@1 { + interrupts = , + , + , + , + , + , + , + , + , + ; + interrupt-names = "hif0", "hif1", "hif2", "hif3", "hif4", + "hif5", "hif6", "hif7", "hif8", "link"; + phy-mode = "rgmii-id"; + reg = <1>; + port-id = <1>; /* For backward compatibility. */ + gop-port-id = <2>; + }; + + ethernet-port@2 { + interrupts = , + , + , + , + , + , + , + , + , + ; + interrupt-names = "hif0", "hif1", "hif2", "hif3", "hif4", + "hif5", "hif6", "hif7", "hif8", "link"; + phy-mode = "2500base-x"; + managed = "in-band-status"; + phys = <&cp0_comphy5 2>; + sfp = <&sfp_eth3>; + reg = <2>; + port-id = <2>; /* For backward compatibility. */ + gop-port-id = <3>; + }; + }; diff --git a/Documentation/devicetree/bindings/net/marvell-pp2.txt b/Documentation/devicetree/bindings/net/marvell-pp2.txt deleted file mode 100644 index ce15c173f43f..000000000000 --- a/Documentation/devicetree/bindings/net/marvell-pp2.txt +++ /dev/null @@ -1,141 +0,0 @@ -* Marvell Armada 375 Ethernet Controller (PPv2.1) - Marvell Armada 7K/8K Ethernet Controller (PPv2.2) - Marvell CN913X Ethernet Controller (PPv2.3) - -Required properties: - -- compatible: should be one of: - "marvell,armada-375-pp2" - "marvell,armada-7k-pp2" -- reg: addresses and length of the register sets for the device. - For "marvell,armada-375-pp2", must contain the following register - sets: - - common controller registers - - LMS registers - - one register area per Ethernet port - For "marvell,armada-7k-pp2" used by 7K/8K and CN913X, must contain the following register - sets: - - packet processor registers - - networking interfaces registers - - CM3 address space used for TX Flow Control - -- clocks: pointers to the reference clocks for this device, consequently: - - main controller clock (for both armada-375-pp2 and armada-7k-pp2) - - GOP clock (for both armada-375-pp2 and armada-7k-pp2) - - MG clock (only for armada-7k-pp2) - - MG Core clock (only for armada-7k-pp2) - - AXI clock (only for armada-7k-pp2) -- clock-names: names of used clocks, must be "pp_clk", "gop_clk", "mg_clk", - "mg_core_clk" and "axi_clk" (the 3 latter only for armada-7k-pp2). - -The ethernet ports are represented by subnodes. At least one port is -required. - -Required properties (port): - -- interrupts: interrupt(s) for the port -- port-id: ID of the port from the MAC point of view -- gop-port-id: only for marvell,armada-7k-pp2, ID of the port from the - GOP (Group Of Ports) point of view. This ID is used to index the - per-port registers in the second register area. -- phy-mode: See ethernet.txt file in the same directory - -Optional properties (port): - -- marvell,loopback: port is loopback mode -- phy: a phandle to a phy node defining the PHY address (as the reg - property, a single integer). -- interrupt-names: if more than a single interrupt for is given, must be the - name associated to the interrupts listed. Valid names are: - "hifX", with X in [0..8], and "link". The names "tx-cpu0", - "tx-cpu1", "tx-cpu2", "tx-cpu3" and "rx-shared" are supported - for backward compatibility but shouldn't be used for new - additions. -- marvell,system-controller: a phandle to the system controller. - -Example for marvell,armada-375-pp2: - -ethernet@f0000 { - compatible = "marvell,armada-375-pp2"; - reg = <0xf0000 0xa000>, - <0xc0000 0x3060>, - <0xc4000 0x100>, - <0xc5000 0x100>; - clocks = <&gateclk 3>, <&gateclk 19>; - clock-names = "pp_clk", "gop_clk"; - - eth0: eth0@c4000 { - interrupts = ; - port-id = <0>; - phy = <&phy0>; - phy-mode = "gmii"; - }; - - eth1: eth1@c5000 { - interrupts = ; - port-id = <1>; - phy = <&phy3>; - phy-mode = "gmii"; - }; -}; - -Example for marvell,armada-7k-pp2: - -cpm_ethernet: ethernet@0 { - compatible = "marvell,armada-7k-pp22"; - reg = <0x0 0x100000>, <0x129000 0xb000>, <0x220000 0x800>; - clocks = <&cpm_syscon0 1 3>, <&cpm_syscon0 1 9>, - <&cpm_syscon0 1 5>, <&cpm_syscon0 1 6>, <&cpm_syscon0 1 18>; - clock-names = "pp_clk", "gop_clk", "mg_clk", "mg_core_clk", "axi_clk"; - - eth0: eth0 { - interrupts = , - , - , - , - , - , - , - , - , - ; - interrupt-names = "hif0", "hif1", "hif2", "hif3", "hif4", - "hif5", "hif6", "hif7", "hif8", "link"; - port-id = <0>; - gop-port-id = <0>; - }; - - eth1: eth1 { - interrupts = , - , - , - , - , - , - , - , - , - ; - interrupt-names = "hif0", "hif1", "hif2", "hif3", "hif4", - "hif5", "hif6", "hif7", "hif8", "link"; - port-id = <1>; - gop-port-id = <2>; - }; - - eth2: eth2 { - interrupts = , - , - , - , - , - , - , - , - , - ; - interrupt-names = "hif0", "hif1", "hif2", "hif3", "hif4", - "hif5", "hif6", "hif7", "hif8", "link"; - port-id = <2>; - gop-port-id = <3>; - }; -}; diff --git a/MAINTAINERS b/MAINTAINERS index e68a0804394d..51da1b56d87e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -12292,7 +12292,7 @@ M: Marcin Wojtas M: Russell King L: netdev@vger.kernel.org S: Maintained -F: Documentation/devicetree/bindings/net/marvell-pp2.txt +F: Documentation/devicetree/bindings/net/marvell,pp2.yaml F: drivers/net/ethernet/marvell/mvpp2/ MARVELL MWIFIEX WIRELESS DRIVER From patchwork Fri Oct 14 21:32:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Micha=C5=82_Grzelak?= X-Patchwork-Id: 615127 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 65A0BC433FE for ; Fri, 14 Oct 2022 21:33:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230035AbiJNVdp (ORCPT ); Fri, 14 Oct 2022 17:33:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58106 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230021AbiJNVdn (ORCPT ); Fri, 14 Oct 2022 17:33:43 -0400 Received: from mail-lj1-x235.google.com (mail-lj1-x235.google.com [IPv6:2a00:1450:4864:20::235]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B02F61DDC07 for ; Fri, 14 Oct 2022 14:33:41 -0700 (PDT) Received: by mail-lj1-x235.google.com with SMTP id bs14so7477426ljb.9 for ; Fri, 14 Oct 2022 14:33:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=BWIwo+mIwSXhxLgpwwdJO6e+2GcvcXvg+9gu/sbvq84=; b=B/DXzD8t2nEeI0lXREfvngk3fEgJ2rA4VH95A2oHmA83Gb+GG8oJmp8fzbVkvgOc5F SODDb8VkxgUjCzXpefDuPQNlI04n/rbcFIea088lGIZwrQ0Hnw4NV46xGIwF7ubfm7kl XadvfTxkjyBtKFMRdnQj/ajSRgk4OAf0o8yEPFlD1QtWOomb4Dt78blsl1QKhPOR1YRQ cWfZXXzCWSIcKhv0t8TZUMEix82KIszGwfORT72SqoKKREA3eE0Pt2ujCiv1ogAfmxTW IEup5cUYWutePHZyhI4R+W1bEFfivf9CqCKy0kk1BCooUdHZPnsKyzJbHyd0FkYvIXh7 n54Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=BWIwo+mIwSXhxLgpwwdJO6e+2GcvcXvg+9gu/sbvq84=; b=U5nei1HutxmaPiklrEjFlH+ZlPgszSz7g2di7xqIhMqItcd4M9psUGnO9t6jD7j4Uc Iojae4wM5MJjh5muQOHRzBLEgHwvLImvfxAT5LwDvykbF+kK1GE/Os4/W7G9MwzMhz9Y 1ZmH+wwB+3gAMDbbLOxbSZ9mdMHaIdgQCvUHLQBAnDUtwFs1NGPWYlnK7bozJjbPSzMF Hg04cENzsGdgR/WeYZSUbeKxO2WalAxdCFv5v4cTBmHyjSGKs2Q3Cc02lSfDArtHN0Pd jFZpXNbOyiQlkX5BZ/BE85idYQd8ueWXUNslSrDOaksBN5ivdDsuoJlv38ZeC7BFWzTg 4blw== X-Gm-Message-State: ACrzQf0lu+InIa2GjReAku5WBclndTxXsWmzkgWT9XbrIm79mxN2a+Rj HyB9hbfH/zjHz4dVfU35krrkjmObrNECx9qT X-Google-Smtp-Source: AMsMyM74UfwDrRVI+uSJOmdihIfCn9esHqz00xZikJRiuE7l0R6ojwioZkoGBQMsMCIvcAsk4dySUg== X-Received: by 2002:a2e:81c9:0:b0:26e:1cc:2951 with SMTP id s9-20020a2e81c9000000b0026e01cc2951mr2493966ljg.197.1665783219599; Fri, 14 Oct 2022 14:33:39 -0700 (PDT) Received: from fedora.. ([78.10.207.24]) by smtp.gmail.com with ESMTPSA id d4-20020ac24c84000000b00494978b0caesm494036lfl.276.2022.10.14.14.33.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 14 Oct 2022 14:33:39 -0700 (PDT) From: =?utf-8?q?Micha=C5=82_Grzelak?= To: devicetree@vger.kernel.org Cc: mw@semihalf.com, linux@armlinux.org.uk, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, upstream@semihalf.com Subject: [PATCH v5 2/3] arm64: dts: marvell: Update network description to match schema Date: Fri, 14 Oct 2022 23:32:53 +0200 Message-Id: <20221014213254.30950-3-mig@semihalf.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20221014213254.30950-1-mig@semihalf.com> References: <20221014213254.30950-1-mig@semihalf.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Marcin Wojtas Update the PP2 ethernet ports subnodes' names to match schema enforced by the marvell,pp2.yaml contents. Add new required properties ('reg') which contains information about the port ID, keeping 'port-id' ones for backward compatibility. Signed-off-by: Marcin Wojtas --- arch/arm64/boot/dts/marvell/armada-cp11x.dtsi | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi b/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi index d6c0990a267d..7d0043824f2a 100644 --- a/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi @@ -58,6 +58,8 @@ config-space@CP11X_BASE { ranges = <0x0 0x0 ADDRESSIFY(CP11X_BASE) 0x2000000>; CP11X_LABEL(ethernet): ethernet@0 { + #address-cells = <1>; + #size-cells = <0>; compatible = "marvell,armada-7k-pp22"; reg = <0x0 0x100000>, <0x129000 0xb000>, <0x220000 0x800>; clocks = <&CP11X_LABEL(clk) 1 3>, <&CP11X_LABEL(clk) 1 9>, @@ -69,7 +71,7 @@ CP11X_LABEL(ethernet): ethernet@0 { status = "disabled"; dma-coherent; - CP11X_LABEL(eth0): eth0 { + CP11X_LABEL(eth0): ethernet-port@0 { interrupts = <39 IRQ_TYPE_LEVEL_HIGH>, <43 IRQ_TYPE_LEVEL_HIGH>, <47 IRQ_TYPE_LEVEL_HIGH>, @@ -83,12 +85,13 @@ CP11X_LABEL(eth0): eth0 { interrupt-names = "hif0", "hif1", "hif2", "hif3", "hif4", "hif5", "hif6", "hif7", "hif8", "link"; - port-id = <0>; + reg = <0>; + port-id = <0>; /* For backward compatibility. */ gop-port-id = <0>; status = "disabled"; }; - CP11X_LABEL(eth1): eth1 { + CP11X_LABEL(eth1): ethernet-port@1 { interrupts = <40 IRQ_TYPE_LEVEL_HIGH>, <44 IRQ_TYPE_LEVEL_HIGH>, <48 IRQ_TYPE_LEVEL_HIGH>, @@ -102,12 +105,13 @@ CP11X_LABEL(eth1): eth1 { interrupt-names = "hif0", "hif1", "hif2", "hif3", "hif4", "hif5", "hif6", "hif7", "hif8", "link"; - port-id = <1>; + reg = <1>; + port-id = <1>; /* For backward compatibility. */ gop-port-id = <2>; status = "disabled"; }; - CP11X_LABEL(eth2): eth2 { + CP11X_LABEL(eth2): ethernet-port@2 { interrupts = <41 IRQ_TYPE_LEVEL_HIGH>, <45 IRQ_TYPE_LEVEL_HIGH>, <49 IRQ_TYPE_LEVEL_HIGH>, @@ -121,7 +125,8 @@ CP11X_LABEL(eth2): eth2 { interrupt-names = "hif0", "hif1", "hif2", "hif3", "hif4", "hif5", "hif6", "hif7", "hif8", "link"; - port-id = <2>; + reg = <2>; + port-id = <2>; /* For backward compatibility. */ gop-port-id = <3>; status = "disabled"; }; From patchwork Fri Oct 14 21:32:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Micha=C5=82_Grzelak?= X-Patchwork-Id: 615319 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 12FBDC4332F for ; Fri, 14 Oct 2022 21:33:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230045AbiJNVdq (ORCPT ); Fri, 14 Oct 2022 17:33:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58154 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230023AbiJNVdo (ORCPT ); Fri, 14 Oct 2022 17:33:44 -0400 Received: from mail-lf1-x135.google.com (mail-lf1-x135.google.com [IPv6:2a00:1450:4864:20::135]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C719A1DD8A2 for ; Fri, 14 Oct 2022 14:33:42 -0700 (PDT) Received: by mail-lf1-x135.google.com with SMTP id b2so9146542lfp.6 for ; Fri, 14 Oct 2022 14:33:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=6hw2W+lQ+Hv9z48dDP42SJngsa6TM787Uybb56JTsIU=; b=IzjtkQDeQYFdEn4qZzb1y1MhYYgveIXQ3jXngRhUccpAUTAv2U56wpVEo4vTa7Ije4 sAupNlsKBfXuyjJMbKI1gyZDdYl00MbAfewpZYfg2yPC/+GlFo7ry7JPZ9XBuviAPHf1 xe0mno2Y1BaXlBQLr2ksEzGoRieudyDUjsWBHUS6EQVhJP819XxvT1zMUEsrbLwdY9Pm 7bHlbgY725Ccras+osgCcPSMdyan91I4QlxbukJFOvL1AYW0haPqlPU9w03RY+A2JMok 5kINGb3i9YDCuFkLCexSEC3CwDQ/o5uusvv8+JOtwI17ngetxbEAF6UU53D8pBUTF4bs D08g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=6hw2W+lQ+Hv9z48dDP42SJngsa6TM787Uybb56JTsIU=; b=0KCJ+JieOZs9hhdP3g8Cgpfr0jpzvDQCRXYxhSSSaPK3dm/4tcpzEaPSBavt6L3vpt 2ZOLKvfMCX1YdujjMsYamxNPaRoDxnyeyo3Gyr0BUQY7w5bBo3yu8oa97agCZqRU29j2 fUB6+1oKV1jp1HjADhC/YZVwaNLSoFJSXANscEms3gF9uvtAaBzUTrIC8htECLyXgFB6 lZWMlntjb4dWPzj50YcjA/0EdlKF66VIxik7cmfS415KnSTgUmmzzoTVjlSnAHmORFNp 2vWFAMZ8Jm6lreYrQpreDG4uP4k0BDFCdLV7DByGWi34Fg11exbBqRK93U/NQebuU+O9 uSrQ== X-Gm-Message-State: ACrzQf1I6Wc1fwc+wW6dGTLm7DmJQsIPXyDXrVWPSydIUiSDIOJfjiZi 8YAgDHsr9qG1gf3Fuhv2F95+GRglXH1bgW0l X-Google-Smtp-Source: AMsMyM5e+mqse7jgqB+fvyHTHDmwUvq7Ma4QJCvAULxUDpj58pm7P4FgR2I8cnXSkGuc5SX2RoitPA== X-Received: by 2002:ac2:44cd:0:b0:4a2:3fcd:c960 with SMTP id d13-20020ac244cd000000b004a23fcdc960mr2482364lfm.590.1665783220846; Fri, 14 Oct 2022 14:33:40 -0700 (PDT) Received: from fedora.. ([78.10.207.24]) by smtp.gmail.com with ESMTPSA id d4-20020ac24c84000000b00494978b0caesm494036lfl.276.2022.10.14.14.33.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 14 Oct 2022 14:33:40 -0700 (PDT) From: =?utf-8?q?Micha=C5=82_Grzelak?= To: devicetree@vger.kernel.org Cc: mw@semihalf.com, linux@armlinux.org.uk, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, upstream@semihalf.com Subject: [PATCH v5 3/3] ARM: dts: armada-375: Update network description to match schema Date: Fri, 14 Oct 2022 23:32:54 +0200 Message-Id: <20221014213254.30950-4-mig@semihalf.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20221014213254.30950-1-mig@semihalf.com> References: <20221014213254.30950-1-mig@semihalf.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Marcin Wojtas Update the PP2 ethernet ports subnodes' names to match schema enforced by the marvell,pp2.yaml contents. Add new required properties ('reg') which contains information about the port ID, keeping 'port-id' ones for backward compatibility. Signed-off-by: Marcin Wojtas --- arch/arm/boot/dts/armada-375.dtsi | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/armada-375.dtsi b/arch/arm/boot/dts/armada-375.dtsi index 929deaf312a5..9fbe0cfec48f 100644 --- a/arch/arm/boot/dts/armada-375.dtsi +++ b/arch/arm/boot/dts/armada-375.dtsi @@ -178,6 +178,8 @@ mdio: mdio@c0054 { /* Network controller */ ethernet: ethernet@f0000 { + #address-cells = <1>; + #size-cells = <0>; compatible = "marvell,armada-375-pp2"; reg = <0xf0000 0xa000>, /* Packet Processor regs */ <0xc0000 0x3060>, /* LMS regs */ @@ -187,15 +189,17 @@ ethernet: ethernet@f0000 { clock-names = "pp_clk", "gop_clk"; status = "disabled"; - eth0: eth0 { + eth0: ethernet-port@0 { interrupts = ; - port-id = <0>; + reg = <0>; + port-id = <0>; /* For backward compatibility. */ status = "disabled"; }; - eth1: eth1 { + eth1: ethernet-port@1 { interrupts = ; - port-id = <1>; + reg = <1>; + port-id = <1>; /* For backward compatibility. */ status = "disabled"; }; };