From patchwork Thu Oct 13 21:59:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 615151 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6F3F9C433FE for ; Thu, 13 Oct 2022 22:00:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229619AbiJMWAH (ORCPT ); Thu, 13 Oct 2022 18:00:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41540 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229747AbiJMWAG (ORCPT ); Thu, 13 Oct 2022 18:00:06 -0400 Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CA66D4661A for ; Thu, 13 Oct 2022 15:00:01 -0700 (PDT) Received: from tr.lan (ip-86-49-12-201.bb.vodafone.cz [86.49.12.201]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: marex@denx.de) by phobos.denx.de (Postfix) with ESMTPSA id 52ECF84E34; Thu, 13 Oct 2022 23:59:59 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1665698399; bh=mcIH9vyGFAi5LgCNlhhGQvD0BUKmEvWs0m9iwaGiU6I=; h=From:To:Cc:Subject:Date:From; b=RvVbTjVL/+5sBrGwNHoEChDTJN7DkReFo+PmWmLExKeNfxzePPp3KNLdZkY2db/13 ArGmw37CO7p3RUYIwegvE+dsN9DxTndkQ6k3ZV4O4BS16HvXmV4SRnhxoHjZXiTyZQ pod7r5CpYxzE8bXCWYJ18fsi0fzXjnzq39OOerE1DI0AApUVqjOjdgMgSl2mDN9/b3 VYDmJFLcZfhEywGQU0VKhunRWH+paYle3NVVbXZbqWamcVVzlmSzmL5ipx/61SQjKV AqDmDhjM2oD4DLh0XmOtX4lvQNyl8x1ts6kgdOT9QygeqU+BHQLzV2Vhz6Tp5ij8gj wGun7JJbNRX6w== From: Marek Vasut To: linux-gpio@vger.kernel.org Cc: Marek Vasut , Linus Walleij , Marc Zyngier , Bartosz Golaszewski , Loic Poulain , NXP Linux Team , Peng Fan , Shawn Guo Subject: [PATCH v6 1/2] gpio: mxc: Protect GPIO irqchip RMW with bgpio spinlock Date: Thu, 13 Oct 2022 23:59:45 +0200 Message-Id: <20221013215946.216184-1-marex@denx.de> X-Mailer: git-send-email 2.35.1 MIME-Version: 1.0 X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The driver currently performs register read-modify-write without locking in its irqchip part, this could lead to a race condition when configuring interrupt mode setting. Add the missing bgpio spinlock lock/unlock around the register read-modify-write. Reviewed-by: Linus Walleij Reviewed-by: Marc Zyngier Fixes: 07bd1a6cc7cbb ("MXC arch: Add gpio support for the whole platform") Signed-off-by: Marek Vasut --- Cc: Bartosz Golaszewski Cc: Linus Walleij Cc: Loic Poulain Cc: Marc Zyngier Cc: NXP Linux Team Cc: Peng Fan Cc: Shawn Guo --- V3: New patch V4: Include linux/spinlock.h V5: Use raw_spinlock per 3c938cc5cebcb ("gpio: use raw spinlock for gpio chip shadowed data") V6: No change --- drivers/gpio/gpio-mxc.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/gpio/gpio-mxc.c b/drivers/gpio/gpio-mxc.c index c871602fc5ba9..6cc98a5684ae1 100644 --- a/drivers/gpio/gpio-mxc.c +++ b/drivers/gpio/gpio-mxc.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include @@ -147,6 +148,7 @@ static int gpio_set_irq_type(struct irq_data *d, u32 type) { struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); struct mxc_gpio_port *port = gc->private; + unsigned long flags; u32 bit, val; u32 gpio_idx = d->hwirq; int edge; @@ -185,6 +187,8 @@ static int gpio_set_irq_type(struct irq_data *d, u32 type) return -EINVAL; } + raw_spin_lock_irqsave(&port->gc.bgpio_lock, flags); + if (GPIO_EDGE_SEL >= 0) { val = readl(port->base + GPIO_EDGE_SEL); if (edge == GPIO_INT_BOTH_EDGES) @@ -204,15 +208,20 @@ static int gpio_set_irq_type(struct irq_data *d, u32 type) writel(1 << gpio_idx, port->base + GPIO_ISR); + raw_spin_unlock_irqrestore(&port->gc.bgpio_lock, flags); + return 0; } static void mxc_flip_edge(struct mxc_gpio_port *port, u32 gpio) { void __iomem *reg = port->base; + unsigned long flags; u32 bit, val; int edge; + raw_spin_lock_irqsave(&port->gc.bgpio_lock, flags); + reg += GPIO_ICR1 + ((gpio & 0x10) >> 2); /* lower or upper register */ bit = gpio & 0xf; val = readl(reg); @@ -230,6 +239,8 @@ static void mxc_flip_edge(struct mxc_gpio_port *port, u32 gpio) return; } writel(val | (edge << (bit << 1)), reg); + + raw_spin_unlock_irqrestore(&port->gc.bgpio_lock, flags); } /* handle 32 interrupts in one status register */ From patchwork Thu Oct 13 21:59:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 614916 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6938FC4332F for ; Thu, 13 Oct 2022 22:00:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229559AbiJMWAI (ORCPT ); Thu, 13 Oct 2022 18:00:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41724 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229796AbiJMWAG (ORCPT ); Thu, 13 Oct 2022 18:00:06 -0400 Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 831944685A for ; Thu, 13 Oct 2022 15:00:02 -0700 (PDT) Received: from tr.lan (ip-86-49-12-201.bb.vodafone.cz [86.49.12.201]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: marex@denx.de) by phobos.denx.de (Postfix) with ESMTPSA id 3CCAD84E40; Fri, 14 Oct 2022 00:00:00 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1665698400; bh=94Q49BLfqATZ0DJEAh29wKkuNHiaNFmVdePRfY74jVo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bsMuD/xiQMj4s1q5K+NaPC/vXcOZIBcQrUjn8c/WUP5lD8lL3HSwmXMUAECkXbdfc Mc3bZS/1xlwde3E2C8aHNJuucDnJbJXAbQlhumKfomkh9iEChd+xMiLiP+Keh2Z2V9 R+l857g4vU3swBtfEjp5NW60pM+mRWgQPAINrMBU9y534qdFm0VUIi+PsxrMZ/RVDf 8XEVI9ISScKlC+Js4EnIbO8I1zFIroPQuVciYAC0HAh59Axjp9rcKJN2vXfS+seA9L rRhDlZqnm5373ptX3HX8dYgfC9YmQU7m8PzdY1rs51a5jUwuTn2SZkUgKI2b9ePp/Y CVmXSluhIhZBw== From: Marek Vasut To: linux-gpio@vger.kernel.org Cc: Marek Vasut , Bartosz Golaszewski , Linus Walleij , Loic Poulain , Marc Zyngier , NXP Linux Team , Peng Fan , Shawn Guo Subject: [PATCH v6 2/2] gpio: mxc: Always set GPIOs used as interrupt source to INPUT mode Date: Thu, 13 Oct 2022 23:59:46 +0200 Message-Id: <20221013215946.216184-2-marex@denx.de> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221013215946.216184-1-marex@denx.de> References: <20221013215946.216184-1-marex@denx.de> MIME-Version: 1.0 X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Always configure GPIO pins which are used as interrupt source as INPUTs. In case the default pin configuration is OUTPUT, or the prior stage does configure the pins as OUTPUT, then Linux will not reconfigure the pin as INPUT and no interrupts are received. Always configure the interrupt source GPIO pin as input to fix the above case. Fixes: 07bd1a6cc7cbb ("MXC arch: Add gpio support for the whole platform") Signed-off-by: Marek Vasut Reviewed-by: Linus Walleij --- Cc: Bartosz Golaszewski Cc: Linus Walleij Cc: Loic Poulain Cc: Marc Zyngier Cc: NXP Linux Team Cc: Peng Fan Cc: Shawn Guo --- V2: Actually update and clear bits in GDIR register V3: Rebase on top of new patch 1/2, expand CC list, add Fixes tag V4: No change V5: No change V6: - Call gc->direction_input() to set direction, instead of GDIR register poking. The bgpio (gpio-mmio) may cache the content of direction register, so updating the HW GDIR register is not enough. Calling the gc->direction() assures the cache is updated. - Drop RBs since this is updated patch. --- drivers/gpio/gpio-mxc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpio/gpio-mxc.c b/drivers/gpio/gpio-mxc.c index 6cc98a5684ae1..dd91908c72f19 100644 --- a/drivers/gpio/gpio-mxc.c +++ b/drivers/gpio/gpio-mxc.c @@ -210,7 +210,7 @@ static int gpio_set_irq_type(struct irq_data *d, u32 type) raw_spin_unlock_irqrestore(&port->gc.bgpio_lock, flags); - return 0; + return port->gc.direction_input(&port->gc, gpio_idx); } static void mxc_flip_edge(struct mxc_gpio_port *port, u32 gpio)