From patchwork Mon Oct 10 03:40:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: tianye@sugon.com X-Patchwork-Id: 614430 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6A188C433FE for ; Mon, 10 Oct 2022 04:09:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230136AbiJJEJe (ORCPT ); Mon, 10 Oct 2022 00:09:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35248 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230381AbiJJEJb (ORCPT ); Mon, 10 Oct 2022 00:09:31 -0400 X-Greylist: delayed 1724 seconds by postgrey-1.37 at lindbergh.monkeyblade.net; Sun, 09 Oct 2022 21:09:29 PDT Received: from mailout.sugon.com (mailout.sugon.com [1.202.226.101]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 791084D819; Sun, 9 Oct 2022 21:09:29 -0700 (PDT) Received: from mailout.sugon.com (localhost [127.0.0.2] (may be forged)) by mailout.sugon.com with ESMTP id 29A3ejZa027149; Mon, 10 Oct 2022 11:40:45 +0800 (GMT-8) (envelope-from tianye@sugon.com) Received: from mailout.sugon.com ([10.0.100.187]) by mailout.sugon.com with ESMTP id 29A3eP6o026605; Mon, 10 Oct 2022 11:40:25 +0800 (GMT-8) (envelope-from tianye@sugon.com) Received: from pt.sugon.com ([10.0.100.52]) by mailout.sugon.com (IBM Domino Release 9.0.1FP10 HF383) with ESMTP id 2022101011402467-632533 ; Mon, 10 Oct 2022 11:40:24 +0800 Received: from localhost.localdomain ([110.191.179.234]) by pt.sugon.com (IBM Domino Release 9.0.1FP10 HF383) with ESMTP id 2022101011402379-336859 ; Mon, 10 Oct 2022 11:40:23 +0800 From: tianye@sugon.com To: jarkko.nikula@linux.intel.com, andriy.shevchenko@linux.intel.com, mika.westerberg@linux.intel.com, jsd@semihalf.com Cc: linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org, Tian Ye Subject: [PATCH] i2c: designware: slave should do WRITE_RECEIVED before SLAVE_STOP Date: Mon, 10 Oct 2022 11:40:15 +0800 Message-Id: <20221010034015.7526-1-tianye@sugon.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-MIMETrack: Itemize by SMTP Server on mail03/Dawning(Release 9.0.1FP10 HF383|November 19, 2018) at 2022/10/10 11:40:24, Serialize by Router on mail03/Dawning(Release 9.0.1FP10 HF383|November 19, 2018) at 2022/10/10 11:40:24, Itemize by SMTP Server on mailout/Dawning(Release 9.0.1FP10 HF383|November 19, 2018) at 2022/10/10 11:40:24, Serialize by Router on mailout/Dawning(Release 9.0.1FP10 HF383|November 19, 2018) at 2022/10/10 11:40:25, Serialize complete at 2022/10/10 11:40:25 X-TNEFEvaluated: 1 X-DNSRBL: X-MAIL: mailout.sugon.com 29A3eP6o026605 Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org From: Tian Ye Sometimes when designware slave receive 3byte in high speed mode: 0x1 STATUS SLAVE_ACTIVITY=0x1 : RAW_INTR_STAT=0x514 : INTR_STAT=0x4 I2C_SLAVE_WRITE_REQUESTED I2C_SLAVE_WRITE_RECEIVED 0x1 STATUS SLAVE_ACTIVITY=0 : RAW_INTR_STAT=0x714 : INTR_STAT=0x204 I2C_SLAVE_WRITE_RECEIVED I2C_SLAVE_STOP 0x1 STATUS SLAVE_ACTIVITY=0x1 : RAW_INTR_STAT=0x514 : INTR_STAT=0x4 I2C_SLAVE_WRITE_REQUESTED I2C_SLAVE_WRITE_RECEIVED When second slave interrupt occus:slave rx fifo receive two bytes and stop interrupt occus at the same time. Signed-off-by: Tian Ye --- drivers/i2c/busses/i2c-designware-slave.c | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/drivers/i2c/busses/i2c-designware-slave.c b/drivers/i2c/busses/i2c-designware-slave.c index 0d15f4c1e9f7..801d84fa7e7d 100644 --- a/drivers/i2c/busses/i2c-designware-slave.c +++ b/drivers/i2c/busses/i2c-designware-slave.c @@ -158,6 +158,7 @@ static int i2c_dw_irq_handler_slave(struct dw_i2c_dev *dev) { u32 raw_stat, stat, enabled, tmp; u8 val = 0, slave_activity; + u32 rx_valid; regmap_read(dev->map, DW_IC_ENABLE, &enabled); regmap_read(dev->map, DW_IC_RAW_INTR_STAT, &raw_stat); @@ -179,11 +180,14 @@ static int i2c_dw_irq_handler_slave(struct dw_i2c_dev *dev) &val); } - regmap_read(dev->map, DW_IC_DATA_CMD, &tmp); - val = tmp; - if (!i2c_slave_event(dev->slave, I2C_SLAVE_WRITE_RECEIVED, - &val)) - dev_vdbg(dev->dev, "Byte %X acked!", val); + regmap_read(dev, DW_IC_RXFLR, &rx_valid); + for (; rx_valid > 0; rx_valid--) { + regmap_read(dev->map, DW_IC_DATA_CMD, &tmp); + val = tmp; + if (!i2c_slave_event(dev->slave, I2C_SLAVE_WRITE_RECEIVED, + &val)) + dev_vdbg(dev->dev, "Byte %X acked!", val); + } } if (stat & DW_IC_INTR_RD_REQ) {