From patchwork Wed Oct 5 17:13:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 612800 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BA3C9C433FE for ; Wed, 5 Oct 2022 17:14:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230308AbiJEROj (ORCPT ); Wed, 5 Oct 2022 13:14:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50676 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230253AbiJEROc (ORCPT ); Wed, 5 Oct 2022 13:14:32 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4C1D57B1E2; Wed, 5 Oct 2022 10:14:30 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 99234B81EC5; Wed, 5 Oct 2022 17:14:28 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id DE015C43141; Wed, 5 Oct 2022 17:14:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1664990067; bh=xre7D3p9wYeZj6+yx2KL0N77FmYsyYWWTka8j0VWX5Y=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=SZBCD8h7uQuNhjlcSS96cGwI5xKybHLO7BvB+He2Kt2jTfSBYPnOOKFhT8+a9PBO/ kTjYOM49Ya6AyKQS18MRMbx3QWxJQlxoU8uEWN2iBABWJzznTregD2EPz9tEaG91Ft 7f4jU+tifiXFq6g70/xYOPRMnX3C4UggqSymuP8moI47GWOAvNTJtGcdnbPGFCBZPl qXMQTvEmhDCTEFNCzxdGFe7soaJr0Mlmxf+iu079ppqlqKCmQ7I1zSBzhLFM7bgpi1 oS9EvwHXKhta0Y3PDdnxsKwn2EetNc1nklRMmip1ksqYBXdHUsLisjo2uc7Hd/fgUY 94dLuNr7SlJGw== From: Conor Dooley To: Paul Walmsley , Palmer Dabbelt , Albert Ou , Michael Turquette , Stephen Boyd , Greg Kroah-Hartman , Jiri Slaby , Conor Dooley Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-serial@vger.kernel.org Subject: [PATCH 2/6] serial: sifive: select by default if SOC_SIFIVE Date: Wed, 5 Oct 2022 18:13:45 +0100 Message-Id: <20221005171348.167476-3-conor@kernel.org> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20221005171348.167476-1-conor@kernel.org> References: <20221005171348.167476-1-conor@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org From: Conor Dooley With the aim of dropping direct selects of drivers from Kconfig.socs, default the SiFive serial drivers to the value of SOC_SIFIVE. Signed-off-by: Conor Dooley --- drivers/tty/serial/Kconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig index 2a18a42a5004..768f1138c9fb 100644 --- a/drivers/tty/serial/Kconfig +++ b/drivers/tty/serial/Kconfig @@ -972,6 +972,7 @@ config SERIAL_OMAP_CONSOLE config SERIAL_SIFIVE tristate "SiFive UART support" depends on OF + default SOC_SIFIVE select SERIAL_CORE help Select this option if you are building a kernel for a device that @@ -981,6 +982,7 @@ config SERIAL_SIFIVE config SERIAL_SIFIVE_CONSOLE bool "Console on SiFive UART" depends on SERIAL_SIFIVE=y + default SOC_SIFIVE select SERIAL_CORE_CONSOLE select SERIAL_EARLYCON help From patchwork Wed Oct 5 17:13:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 612799 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4C5C6C433F5 for ; Wed, 5 Oct 2022 17:15:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230392AbiJERO6 (ORCPT ); Wed, 5 Oct 2022 13:14:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50676 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230354AbiJEROu (ORCPT ); Wed, 5 Oct 2022 13:14:50 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E75405596; Wed, 5 Oct 2022 10:14:35 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 3E35BB81DEE; Wed, 5 Oct 2022 17:14:34 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 98E61C43470; Wed, 5 Oct 2022 17:14:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1664990073; bh=8Xp7kAM5LFTUlTIW2fFuG237a9Rp9DQyu+qIH5FHc8o=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=AvKcXrht676yYvQGDJdFCIUTXKRsGrYCoZPMTheAR/Bp+QIOs2kxqDHMCXVe+qQ0X zjh1I627d0plUQfjSNnXCn9ZVw6rKjgLpDV/aQGFJ4agaMlhfFi8KBEUUP2xRRZpLp 8xi0SCil0nsoVHlqm2Z5BkI8/WQr0pej4QQKD0mN9nlH2ilsIkUrkJWagS69e6Ob8A yJgBl2kgh/hXjE29IM5hYrobHOOXH7FPowVtL5upSr3XSVxu+eBzWppbvceKBmOQm1 7aZns+2xJljwJb4Bw0yE3dOb2kKSkUdAc6MHc2HF8Gr+Od2itxfP71Bu85vX79ViCs 3UPQ1eLM+TFoA== From: Conor Dooley To: Paul Walmsley , Palmer Dabbelt , Albert Ou , Michael Turquette , Stephen Boyd , Greg Kroah-Hartman , Jiri Slaby , Conor Dooley Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-serial@vger.kernel.org Subject: [PATCH 4/6] riscv: stop selecting the PolarFire SoC clock driver Date: Wed, 5 Oct 2022 18:13:47 +0100 Message-Id: <20221005171348.167476-5-conor@kernel.org> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20221005171348.167476-1-conor@kernel.org> References: <20221005171348.167476-1-conor@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org From: Conor Dooley The driver is now enabled by default if SOC_MICROCHIP so there is no longer a need to select it in Kconfig.socs Signed-off-by: Conor Dooley --- arch/riscv/Kconfig.socs | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs index 69774bb362d6..83f14afd4086 100644 --- a/arch/riscv/Kconfig.socs +++ b/arch/riscv/Kconfig.socs @@ -2,7 +2,6 @@ menu "SoC selection" config SOC_MICROCHIP_POLARFIRE bool "Microchip PolarFire SoCs" - select MCHP_CLK_MPFS select SIFIVE_PLIC help This enables support for Microchip PolarFire SoC platforms. From patchwork Wed Oct 5 17:13:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 612798 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D347AC433FE for ; Wed, 5 Oct 2022 17:15:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230359AbiJERPP (ORCPT ); Wed, 5 Oct 2022 13:15:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50714 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230363AbiJEROz (ORCPT ); Wed, 5 Oct 2022 13:14:55 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 72065A198; Wed, 5 Oct 2022 10:14:40 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 4479C6156F; Wed, 5 Oct 2022 17:14:39 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4B2B8C433C1; Wed, 5 Oct 2022 17:14:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1664990078; bh=wJnnXErmXwIuS63pnOYPIZMoevXGwPTwZXkAnc5SFRg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=argNZOR8Kv0lIi1n4XhQAUao3CpXMOun1Insci6BNIyqTffXlQGyinpCqCnAy9394 7CaQg0s5dikONMfgDA4V2YxxotOhWe30fDpm13XfALC8WcgQ127SiT+yPYiGnPc+Tp gDSIpafpUt3bhdTMDX+sqyLgk3N8LGfqxwrukyqf++qF7jNQ1g0yUevKFVZuWk1EqI ozmfLIqE8YETr1PFrWYfnjSAtpYWOkbfHuke9VWmEVYlOm6mO4CarklkKr2JE//er6 Sv13IXl1ddjVSVwemC0z8AR8LFx7HC/mCOYtqWF1VnLtu2XYr7CfF5D4U0st0x8FSj giZ5nbM9671oA== From: Conor Dooley To: Paul Walmsley , Palmer Dabbelt , Albert Ou , Michael Turquette , Stephen Boyd , Greg Kroah-Hartman , Jiri Slaby , Conor Dooley Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-serial@vger.kernel.org Subject: [PATCH 6/6] riscv: stop directly selecting drivers for SOC_CANAAN Date: Wed, 5 Oct 2022 18:13:49 +0100 Message-Id: <20221005171348.167476-7-conor@kernel.org> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20221005171348.167476-1-conor@kernel.org> References: <20221005171348.167476-1-conor@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org From: Conor Dooley The serial and clock drivers will be enabled by default if the symbol itself is enabled, so stop directly selecting the drivers in Kconfigs.socs. Signed-off-by: Conor Dooley --- arch/riscv/Kconfig.socs | 3 --- 1 file changed, 3 deletions(-) diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs index b6f4cfad159b..0ddbc9eb7af4 100644 --- a/arch/riscv/Kconfig.socs +++ b/arch/riscv/Kconfig.socs @@ -40,13 +40,10 @@ config SOC_CANAAN bool "Canaan Kendryte K210 SoC" depends on !MMU select CLINT_TIMER if RISCV_M_MODE - select SERIAL_SIFIVE if TTY - select SERIAL_SIFIVE_CONSOLE if TTY select SIFIVE_PLIC select ARCH_HAS_RESET_CONTROLLER select PINCTRL select COMMON_CLK - select COMMON_CLK_K210 help This enables support for Canaan Kendryte K210 SoC platform hardware.