From patchwork Tue Sep 27 09:48:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qiang Yu X-Patchwork-Id: 610264 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 12055C54EE9 for ; Tue, 27 Sep 2022 09:49:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231367AbiI0JtI (ORCPT ); Tue, 27 Sep 2022 05:49:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54978 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231148AbiI0JtI (ORCPT ); Tue, 27 Sep 2022 05:49:08 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9BCD8B56DD; Tue, 27 Sep 2022 02:49:07 -0700 (PDT) Received: from pps.filterd (m0279867.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 28R8BoN6030498; Tue, 27 Sep 2022 09:48:53 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id; s=qcppdkim1; bh=lGbwoy7vxXUMWFe+8BzdUik+/vtb24iKIFEldI78o2U=; b=DKZ+8+piITpWLUDs/oBfxX9HOcpb9u4CKx+CtWAckJ/kasAz7iaXwtfcDRShvzH/uVPk qh58+wyflqtZwOPKthjlrXSYKQVqDWFcbixv1jExc+NuHxcMWDniE9HEKlnO59ghdZ5L hIZYLQhDKI6/7LiRb0x6TiiQv7EhxnFi8+DxJSvgvfOt66Xv5e21RPor6ZWATBbg/zad Sk7klx6J9PLsAGryaTxGJII1Q/4mDXiq7yTLkrPS37CPyjpS3RedcZxer74G5uzEl4xq r8w7CtveMfqiFBI+BMT17owQgG5TX1FBBbwIGGRCB2a5NsUBKt+i+zDZL2f0f66mv72a SA== Received: from aptaippmta02.qualcomm.com (tpe-colo-wan-fw-bordernet.qualcomm.com [103.229.16.4]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3jue00ace2-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 27 Sep 2022 09:48:53 +0000 Received: from pps.filterd (APTAIPPMTA02.qualcomm.com [127.0.0.1]) by APTAIPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTP id 28R9moTW017037; Tue, 27 Sep 2022 09:48:50 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APTAIPPMTA02.qualcomm.com (PPS) with ESMTP id 3jstyngvm2-1; Tue, 27 Sep 2022 09:48:50 +0000 Received: from APTAIPPMTA02.qualcomm.com (APTAIPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 28R9mouU017032; Tue, 27 Sep 2022 09:48:50 GMT Received: from cbsp-sh-gv.qualcomm.com (CBSP-SH-gv.ap.qualcomm.com [10.231.249.68]) by APTAIPPMTA02.qualcomm.com (PPS) with ESMTP id 28R9mngI017030; Tue, 27 Sep 2022 09:48:50 +0000 Received: by cbsp-sh-gv.qualcomm.com (Postfix, from userid 4098150) id EFEF733B3; Tue, 27 Sep 2022 17:48:48 +0800 (CST) From: Qiang Yu To: mani@kernel.org, quic_hemantk@quicinc.com, loic.poulain@linaro.org Cc: mhi@lists.linux.dev, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, quic_cang@quicinc.com, mrana@quicinc.com, Qiang Yu Subject: [PATCH] bus: mhi: host: Use mhi_soc_reset() API in place of register write Date: Tue, 27 Sep 2022 17:48:46 +0800 Message-Id: <1664272126-82706-1-git-send-email-quic_qianyu@quicinc.com> X-Mailer: git-send-email 2.7.4 X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: zm5NT6f4x6QRVq8-QPijAiZNYvloS0BV X-Proofpoint-ORIG-GUID: zm5NT6f4x6QRVq8-QPijAiZNYvloS0BV X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-09-27_02,2022-09-22_02,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 lowpriorityscore=0 mlxlogscore=787 suspectscore=0 spamscore=0 bulkscore=0 adultscore=0 impostorscore=0 malwarescore=0 priorityscore=1501 clxscore=1011 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2209130000 definitions=main-2209270057 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Currently, a direct register write is used when ramdump collection in panic path occurs. Replace that with new mhi_soc_reset() API such that a controller defined reset() function is exercised if one is present and the regular SOC reset is done if it is not. Signed-off-by: Qiang Yu --- drivers/bus/mhi/host/boot.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/bus/mhi/host/boot.c b/drivers/bus/mhi/host/boot.c index 5bed8b51..79a0eec 100644 --- a/drivers/bus/mhi/host/boot.c +++ b/drivers/bus/mhi/host/boot.c @@ -118,9 +118,7 @@ static int __mhi_download_rddm_in_panic(struct mhi_controller *mhi_cntrl) /* Hardware reset so force device to enter RDDM */ dev_dbg(dev, "Did not enter RDDM, do a host req reset\n"); - mhi_write_reg(mhi_cntrl, mhi_cntrl->regs, - MHI_SOC_RESET_REQ_OFFSET, - MHI_SOC_RESET_REQ); + mhi_soc_reset(mhi_cntrl); udelay(delayus); }