From patchwork Sat Sep 24 15:28:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Kocialkowski X-Patchwork-Id: 609295 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BA017C32771 for ; Sat, 24 Sep 2022 15:28:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233719AbiIXP2f (ORCPT ); Sat, 24 Sep 2022 11:28:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45008 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229662AbiIXP2d (ORCPT ); Sat, 24 Sep 2022 11:28:33 -0400 Received: from relay5-d.mail.gandi.net (relay5-d.mail.gandi.net [217.70.183.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 93C069B849; Sat, 24 Sep 2022 08:28:32 -0700 (PDT) Received: (Authenticated sender: paul.kocialkowski@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id DCC621C0003; Sat, 24 Sep 2022 15:28:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1664033311; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=o61Aomw3SfUZOaJt+K5AQdwr2Hx3g+NfHuTItfUOQM4=; b=UtfWwwAnlq/amHyFvPHO8lIKFjNdJBLPpyjqtbSyIEvTJXh0IYiw6H/t+prLBE1OdaiKVS lZ8jUeiw2kX1MVxhO8tvHWELByC0DAfDG3arHBrkqSKd1BEA5f/Vc49oyEOicB3J+ZlAsp hKOLj4kiD9ncrn3jkNTctXmNlXopT4/VK67ha9GOdaQmG1NUUUg4ngIENewTOudWrtGuHS A0rE8XDwQD3MOb4b2nMSKV5LNwF80bhQ0i7DegqPy1dZEDQtVFY10qR2CW3zbahuZnO7g+ X96ZBvc28G1Y9zMKnpua4t1xtSYkLMQSS5YC8PP3s4nGvepsg09NXcbddVyhrw== From: Paul Kocialkowski To: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org Cc: Rob Herring , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Michael Turquette , Stephen Boyd , Frank Rowand , Maxime Ripard , Laurent Pinchart , Thomas Petazzoni , Paul Kocialkowski , Rob Herring Subject: [PATCH v6 1/7] clk: sunxi-ng: v3s: Export MBUS and DRAM clocks to the public header Date: Sat, 24 Sep 2022 17:28:14 +0200 Message-Id: <20220924152820.77149-2-paul.kocialkowski@bootlin.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220924152820.77149-1-paul.kocialkowski@bootlin.com> References: <20220924152820.77149-1-paul.kocialkowski@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org In order to declare a mbus node for the v3s, expose its associated clocks to the public header. Signed-off-by: Paul Kocialkowski Reviewed-by: Samuel Holland Acked-by: Rob Herring --- drivers/clk/sunxi-ng/ccu-sun8i-v3s.h | 4 ---- include/dt-bindings/clock/sun8i-v3s-ccu.h | 4 ++-- 2 files changed, 2 insertions(+), 6 deletions(-) diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-v3s.h b/drivers/clk/sunxi-ng/ccu-sun8i-v3s.h index 108eeeedcbf7..8ed4eff86ca1 100644 --- a/drivers/clk/sunxi-ng/ccu-sun8i-v3s.h +++ b/drivers/clk/sunxi-ng/ccu-sun8i-v3s.h @@ -39,14 +39,10 @@ /* The first bunch of module clocks are exported */ -#define CLK_DRAM 58 - /* All the DRAM gates are exported */ /* Some more module clocks are exported */ -#define CLK_MBUS 72 - /* And the GPU module clock is exported */ #define CLK_PLL_DDR1 74 diff --git a/include/dt-bindings/clock/sun8i-v3s-ccu.h b/include/dt-bindings/clock/sun8i-v3s-ccu.h index 014ac6123d17..4231f23bc53b 100644 --- a/include/dt-bindings/clock/sun8i-v3s-ccu.h +++ b/include/dt-bindings/clock/sun8i-v3s-ccu.h @@ -87,7 +87,7 @@ #define CLK_SPI0 55 #define CLK_USB_PHY0 56 #define CLK_USB_OHCI0 57 - +#define CLK_DRAM 58 #define CLK_DRAM_VE 59 #define CLK_DRAM_CSI 60 #define CLK_DRAM_EHCI 61 @@ -101,7 +101,7 @@ #define CLK_VE 69 #define CLK_AC_DIG 70 #define CLK_AVS 71 - +#define CLK_MBUS 72 #define CLK_MIPI_CSI 73 /* Clocks not available on V3s */ From patchwork Sat Sep 24 15:28:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Kocialkowski X-Patchwork-Id: 609294 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E6D30C32771 for ; Sat, 24 Sep 2022 15:28:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233844AbiIXP2r (ORCPT ); Sat, 24 Sep 2022 11:28:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45128 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233763AbiIXP2h (ORCPT ); Sat, 24 Sep 2022 11:28:37 -0400 Received: from relay5-d.mail.gandi.net (relay5-d.mail.gandi.net [217.70.183.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B1A6D9E8B1; Sat, 24 Sep 2022 08:28:35 -0700 (PDT) Received: (Authenticated sender: paul.kocialkowski@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 531151C0007; Sat, 24 Sep 2022 15:28:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1664033312; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=8H7TxPSMHgc/OchAiVB655J+THkaG5W4vW2uZPkmijo=; b=p4PUmw2nCJs3KyRDm+QvOOkySCL+RoRN1/469EjW+XykguRnftdlTMzmiBAmFZZ8S6Is6c jQ3kn+yonelwEEHaqjlA2r2GSJ2OSD8EZHjWLgPg1Nwsrh6JHlFet5xQroW+qNiAOWiI5e oaIqxXvulaaYoY8UDLbQeOEEh0YDei31AOtEis0AlztKian5E5ZLAgmzfSa5DJs+hOnjA1 PxxI07KFC3HY62J8uk1lDjTdsIfi7/qkuKpxfTZuv62sjFkyfYAcsHECwa7p/KThNIWml4 JX64GZ3SJIRh0V4GMKdiqRSi1P7YsiZrXTSR23pUxQcobJWj25LihmxIfg1Hmg== From: Paul Kocialkowski To: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org Cc: Rob Herring , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Michael Turquette , Stephen Boyd , Frank Rowand , Maxime Ripard , Laurent Pinchart , Thomas Petazzoni , Paul Kocialkowski Subject: [PATCH v6 2/7] ARM: dts: sun8i: v3s: Add mbus node to represent the interconnect Date: Sat, 24 Sep 2022 17:28:15 +0200 Message-Id: <20220924152820.77149-3-paul.kocialkowski@bootlin.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220924152820.77149-1-paul.kocialkowski@bootlin.com> References: <20220924152820.77149-1-paul.kocialkowski@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The V3s uses the mbus interconnect to provide DRAM access for a number of blocks. The SoC can only map 2 GiB of DRAM, which is reflected in the dma-ranges property. Signed-off-by: Paul Kocialkowski Reviewed-by: Samuel Holland --- arch/arm/boot/dts/sun8i-v3s.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi index db194c606fdc..34f7df6b3960 100644 --- a/arch/arm/boot/dts/sun8i-v3s.dtsi +++ b/arch/arm/boot/dts/sun8i-v3s.dtsi @@ -579,6 +579,21 @@ int_mii_phy: ethernet-phy@1 { }; }; + mbus: dram-controller@1c62000 { + compatible = "allwinner,sun8i-v3s-mbus"; + reg = <0x01c62000 0x1000>, + <0x01c63000 0x1000>; + reg-names = "mbus", "dram"; + clocks = <&ccu CLK_MBUS>, + <&ccu CLK_DRAM>, + <&ccu CLK_BUS_DRAM>; + clock-names = "mbus", "dram", "bus"; + #address-cells = <1>; + #size-cells = <1>; + dma-ranges = <0x00000000 0x40000000 0x80000000>; + #interconnect-cells = <1>; + }; + spi0: spi@1c68000 { compatible = "allwinner,sun8i-h3-spi"; reg = <0x01c68000 0x1000>; From patchwork Sat Sep 24 15:28:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Kocialkowski X-Patchwork-Id: 609046 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DCF63C6FA92 for ; Sat, 24 Sep 2022 15:28:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233838AbiIXP2q (ORCPT ); Sat, 24 Sep 2022 11:28:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45126 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233760AbiIXP2h (ORCPT ); Sat, 24 Sep 2022 11:28:37 -0400 Received: from relay5-d.mail.gandi.net (relay5-d.mail.gandi.net [217.70.183.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6D1339E8AF; Sat, 24 Sep 2022 08:28:35 -0700 (PDT) Received: (Authenticated sender: paul.kocialkowski@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 97F391C0006; Sat, 24 Sep 2022 15:28:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1664033313; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=XsO/BYrcWFqLx/gODpAbtz9SaYlGX80Tqx/ZADbQ4d0=; b=FKopA6cvBNKxDlmJ5QIzDGJKrpTZ3+T4LGav4v7DP3vshKvD16fDc0cBSkG3LjpBOPYe9Z Kwm2oFc6Ci3WjbPtjfud3DshWMvfKmA+3toNKCfRcppaL1ep1RWy/MPRwHxfs4rIUrK9ua cAFjhXYV68qXCapPDVj6RtS2mURwVf0BOP4PhGoE6r7LtArGzJwwEynRLAQqZK0VLA4H63 XB1bNGgUgZkWEJXVOQV/27TV2nrPrnu+Pt1T+2gVeMWrNhltqYW4KWokmgTRMqdZAR5I/S kH/OYoBpxsFCb43j6yCzEUG/eWiWn2rzx7hBxJICPrwAIORRpytluSQgtVhzOg== From: Paul Kocialkowski To: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org Cc: Rob Herring , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Michael Turquette , Stephen Boyd , Frank Rowand , Maxime Ripard , Laurent Pinchart , Thomas Petazzoni , Paul Kocialkowski Subject: [PATCH v6 3/7] ARM: dts: sun8i: v3s: Add nodes for MIPI CSI-2 support Date: Sat, 24 Sep 2022 17:28:16 +0200 Message-Id: <20220924152820.77149-4-paul.kocialkowski@bootlin.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220924152820.77149-1-paul.kocialkowski@bootlin.com> References: <20220924152820.77149-1-paul.kocialkowski@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org MIPI CSI-2 is supported on the V3s with an A31-based MIPI CSI-2 bridge controller. The controller uses a separate D-PHY, which is the same that is otherwise used for MIPI DSI, but used in Rx mode. On the V3s, the CSI0 controller is dedicated to MIPI CSI-2 as it does not have access to any parallel interface pins. Add all the necessary nodes (CSI0, MIPI CSI-2 bridge and D-PHY) to support the MIPI CSI-2 interface. Note that a fwnode graph link is created between CSI0 and MIPI CSI-2 even when no sensor is connected. This will result in a probe failure for the controller as long as no sensor is connected but this is fine since no other interface is available. The interconnects property is used to inherit the proper DMA offset. Signed-off-by: Paul Kocialkowski --- arch/arm/boot/dts/sun8i-v3s.dtsi | 71 ++++++++++++++++++++++++++++++++ 1 file changed, 71 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi index 34f7df6b3960..99966f11d061 100644 --- a/arch/arm/boot/dts/sun8i-v3s.dtsi +++ b/arch/arm/boot/dts/sun8i-v3s.dtsi @@ -621,6 +621,77 @@ gic: interrupt-controller@1c81000 { interrupts = ; }; + csi0: camera@1cb0000 { + compatible = "allwinner,sun8i-v3s-csi"; + reg = <0x01cb0000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_CSI>, + <&ccu CLK_CSI1_SCLK>, + <&ccu CLK_DRAM_CSI>; + clock-names = "bus", "mod", "ram"; + resets = <&ccu RST_BUS_CSI>; + interconnects = <&mbus 5>; + interconnect-names = "dma-mem"; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + + csi0_in_mipi_csi2: endpoint { + remote-endpoint = <&mipi_csi2_out_csi0>; + }; + }; + }; + }; + + mipi_csi2: csi@1cb1000 { + compatible = "allwinner,sun8i-v3s-mipi-csi2", + "allwinner,sun6i-a31-mipi-csi2"; + reg = <0x01cb1000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_CSI>, + <&ccu CLK_CSI1_SCLK>; + clock-names = "bus", "mod"; + resets = <&ccu RST_BUS_CSI>; + status = "disabled"; + + phys = <&dphy>; + phy-names = "dphy"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + mipi_csi2_in: port@0 { + reg = <0>; + }; + + mipi_csi2_out: port@1 { + reg = <1>; + + mipi_csi2_out_csi0: endpoint { + remote-endpoint = <&csi0_in_mipi_csi2>; + }; + }; + }; + }; + + dphy: d-phy@1cb2000 { + compatible = "allwinner,sun6i-a31-mipi-dphy"; + reg = <0x01cb2000 0x1000>; + clocks = <&ccu CLK_BUS_CSI>, + <&ccu CLK_MIPI_CSI>; + clock-names = "bus", "mod"; + resets = <&ccu RST_BUS_CSI>; + allwinner,direction = "rx"; + status = "disabled"; + #phy-cells = <0>; + }; + csi1: camera@1cb4000 { compatible = "allwinner,sun8i-v3s-csi"; reg = <0x01cb4000 0x3000>; From patchwork Sat Sep 24 15:28:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Kocialkowski X-Patchwork-Id: 609045 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7E81AC6FA90 for ; Sat, 24 Sep 2022 15:28:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233863AbiIXP2t (ORCPT ); Sat, 24 Sep 2022 11:28:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45190 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233786AbiIXP2j (ORCPT ); Sat, 24 Sep 2022 11:28:39 -0400 Received: from relay5-d.mail.gandi.net (relay5-d.mail.gandi.net [217.70.183.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2EE83AB04B; Sat, 24 Sep 2022 08:28:37 -0700 (PDT) Received: (Authenticated sender: paul.kocialkowski@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id EEBEA1C0009; Sat, 24 Sep 2022 15:28:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1664033315; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=q2jiKvigwNCrmpmoDDIe1Q9cf2ywCJuNmco8qe5Eb4w=; b=nfc1ufxLeKiEOuLgnK2kkWkWVZvY8MVc2hJtvoW7uyCTnn/yhPO2pOm6HSy5RsAvHq+GP4 WBUEWwt1iU8nrNszVjWl1O+PedTg3p8ain3DwM//riPel6YRyqHKudJwjCILmx/+Phnppv Kj0dAnwGgS3NGLi5ppi7OPPqwkNXttqTxkCB0iRJ6JMr8425BgAYf3W0n/XLR20IKivWNd ZDQKg4x6dQxb7uREPb6zUYh0QrG9nQisZDtnvm4NXmxvab9UUT7X8trw8d8JXH54T8/FCB 9GTLP6ESFgbI8hW2LAkr21KUwpT7gLB4kpDPxuhItxOB6Mqkg9cHoRBX8C9H7w== From: Paul Kocialkowski To: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org Cc: Rob Herring , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Michael Turquette , Stephen Boyd , Frank Rowand , Maxime Ripard , Laurent Pinchart , Thomas Petazzoni , Paul Kocialkowski Subject: [PATCH v6 4/7] ARM: dts: sun8i: v3s: Add support for the ISP Date: Sat, 24 Sep 2022 17:28:17 +0200 Message-Id: <20220924152820.77149-5-paul.kocialkowski@bootlin.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220924152820.77149-1-paul.kocialkowski@bootlin.com> References: <20220924152820.77149-1-paul.kocialkowski@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The V3s (and related platforms) come with an instance of the A31 ISP. Even though it is very close to the A31 ISP, it is not exactly register-compatible and a dedicated compatible only is used as a result. Just like most other blocks of the camera pipeline, the ISP uses the common CSI bus, module and ram clock as well as reset. A port connection to the ISP is added to CSI0 for convenience since CSI0 serves for MIPI CSI-2 interface support, which is likely to receive raw data that will need to be processed by the ISP to produce a final image. The interconnects property is used to inherit the proper DMA offset. Signed-off-by: Paul Kocialkowski --- arch/arm/boot/dts/sun8i-v3s.dtsi | 35 ++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi index 99966f11d061..a249b825cfe7 100644 --- a/arch/arm/boot/dts/sun8i-v3s.dtsi +++ b/arch/arm/boot/dts/sun8i-v3s.dtsi @@ -645,6 +645,14 @@ csi0_in_mipi_csi2: endpoint { remote-endpoint = <&mipi_csi2_out_csi0>; }; }; + + port@2 { + reg = <2>; + + csi0_out_isp: endpoint { + remote-endpoint = <&isp_in_csi0>; + }; + }; }; }; @@ -703,5 +711,32 @@ csi1: camera@1cb4000 { resets = <&ccu RST_BUS_CSI>; status = "disabled"; }; + + isp: isp@1cb8000 { + compatible = "allwinner,sun8i-v3s-isp"; + reg = <0x01cb8000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_CSI>, + <&ccu CLK_CSI1_SCLK>, + <&ccu CLK_DRAM_CSI>; + clock-names = "bus", "mod", "ram"; + resets = <&ccu RST_BUS_CSI>; + interconnects = <&mbus 5>; + interconnect-names = "dma-mem"; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + isp_in_csi0: endpoint { + remote-endpoint = <&csi0_out_isp>; + }; + }; + }; + }; }; }; From patchwork Sat Sep 24 15:28:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Kocialkowski X-Patchwork-Id: 609293 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 33C56C6FA92 for ; Sat, 24 Sep 2022 15:28:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233871AbiIXP2u (ORCPT ); Sat, 24 Sep 2022 11:28:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45236 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233791AbiIXP2k (ORCPT ); Sat, 24 Sep 2022 11:28:40 -0400 Received: from relay5-d.mail.gandi.net (relay5-d.mail.gandi.net [217.70.183.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7C721AC259; Sat, 24 Sep 2022 08:28:39 -0700 (PDT) Received: (Authenticated sender: paul.kocialkowski@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 374E31C000A; Sat, 24 Sep 2022 15:28:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1664033316; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ju5do/c+OU4kfvBHwzg0j4ZuAfxqRDSsXxFditf0h1s=; b=BxT1eyMfFb+EgtJZj6haIWbHi73fzBVT5tD9KcsiM4zsTdSR7s324Ul1yehmMmDd1FIjpM 0yEhRA/vlJELgdv9cKt5RSaV6ejBpGdh8VKSQ/6QDHVwzFTcbk1+NsKMUAgk7WhfBe1ez7 2+UQ2m4UsblFunPxXINPAI0t/4vqcI+hlBKBxUXEcdaE+Mkf4mlmozeyNRbqiSJTLRc7nR JFOjZ7t/+jDkeMGlPVJvib6hbrXJn0iExmI9KskkASfdB7A14bGOXIVElvWk0CcjctuB1N f+tHz3ojTkAi19ADdTG6PFswHnDBCrVMc6OWH7IJRobYMpKSxyVZVnNCeSIqzA== From: Paul Kocialkowski To: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org Cc: Rob Herring , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Michael Turquette , Stephen Boyd , Frank Rowand , Maxime Ripard , Laurent Pinchart , Thomas Petazzoni , Paul Kocialkowski Subject: [PATCH v6 5/7] ARM: dts: sun8i: a83t: Add MIPI CSI-2 controller node Date: Sat, 24 Sep 2022 17:28:18 +0200 Message-Id: <20220924152820.77149-6-paul.kocialkowski@bootlin.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220924152820.77149-1-paul.kocialkowski@bootlin.com> References: <20220924152820.77149-1-paul.kocialkowski@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org MIPI CSI-2 is supported on the A83T with a dedicated controller that covers both the protocol and D-PHY. It is connected to the only CSI receiver with a fwnode graph link. Note that the CSI receiver supports both this MIPI CSI-2 source and a parallel source. An empty port with a label for the MIPI CSI-2 sensor input is also defined for convenience. Signed-off-by: Paul Kocialkowski --- arch/arm/boot/dts/sun8i-a83t.dtsi | 43 +++++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi index 82fdb04122ca..bbe01877a938 100644 --- a/arch/arm/boot/dts/sun8i-a83t.dtsi +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi @@ -1062,6 +1062,49 @@ csi: camera@1cb0000 { clock-names = "bus", "mod", "ram"; resets = <&ccu RST_BUS_CSI>; status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + + csi_in_mipi_csi2: endpoint { + remote-endpoint = <&mipi_csi2_out_csi>; + }; + }; + }; + }; + + mipi_csi2: csi@1cb1000 { + compatible = "allwinner,sun8i-a83t-mipi-csi2"; + reg = <0x01cb1000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_CSI>, + <&ccu CLK_CSI_SCLK>, + <&ccu CLK_MIPI_CSI>, + <&ccu CLK_CSI_MISC>; + clock-names = "bus", "mod", "mipi", "misc"; + resets = <&ccu RST_BUS_CSI>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + mipi_csi2_in: port@0 { + reg = <0>; + }; + + mipi_csi2_out: port@1 { + reg = <1>; + + mipi_csi2_out_csi: endpoint { + remote-endpoint = <&csi_in_mipi_csi2>; + }; + }; + }; }; hdmi: hdmi@1ee0000 { From patchwork Sat Sep 24 15:28:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Kocialkowski X-Patchwork-Id: 609044 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 246F5C6FA93 for ; Sat, 24 Sep 2022 15:28:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233875AbiIXP2v (ORCPT ); Sat, 24 Sep 2022 11:28:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45234 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233790AbiIXP2k (ORCPT ); Sat, 24 Sep 2022 11:28:40 -0400 Received: from relay5-d.mail.gandi.net (relay5-d.mail.gandi.net [217.70.183.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 398FFA7A8C; Sat, 24 Sep 2022 08:28:39 -0700 (PDT) Received: (Authenticated sender: paul.kocialkowski@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 797301C0004; Sat, 24 Sep 2022 15:28:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1664033317; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=aqr+73QF+KcAToJwE6yKo6ZCzrB6161goSgjB/7oNOw=; b=nDAwQxTW0jDqbFUMrKlnofrEU60u5ZRHgA+LKP1wKx5IQJ2MkllndKvq/5f7Fpb3kr66Ts ROgvkdjDPvMCBO30HRPo2Ilo3d9GJQfGd6M65TesLO07XrjZd4deHHDsOnD8st+eW0AVrq stz+Rvh6ejhAZOeGcftY159YZ8U9+MA9+m0m+r2cIGtbukywEgYBgkZ9JfBVLdmyDfTbsO c7INmeOgjw1zeIqr8mdb5BEPJDhizGvgrAB71ZL5Yarjr8LlhLF9FG6jWsOe8M3e+Mtsxw gdo/AHZ9GL2KpvnKZBhgR8aAV/ZWnXHlGcgDzs/OIQjPC3U6t+ZVMRGrGHHYHw== From: Paul Kocialkowski To: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org Cc: Rob Herring , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Michael Turquette , Stephen Boyd , Frank Rowand , Maxime Ripard , Laurent Pinchart , Thomas Petazzoni , Paul Kocialkowski Subject: [PATCH v6 6/7] ARM: dts: sun8i-a83t: Add BananaPi M3 OV5640 camera overlay Date: Sat, 24 Sep 2022 17:28:19 +0200 Message-Id: <20220924152820.77149-7-paul.kocialkowski@bootlin.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220924152820.77149-1-paul.kocialkowski@bootlin.com> References: <20220924152820.77149-1-paul.kocialkowski@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Add an overlay supporting the OV5640 from the BananaPi Camera v3 peripheral board. The board has two sensors (OV5640 and OV8865) which cannot be supported in parallel as they share the same reset pin and the kernel currently has no support for this case. Signed-off-by: Paul Kocialkowski --- arch/arm/boot/dts/Makefile | 1 + .../sun8i-a83t-bananapi-m3-camera-ov5640.dts | 117 ++++++++++++++++++ 2 files changed, 118 insertions(+) create mode 100644 arch/arm/boot/dts/sun8i-a83t-bananapi-m3-camera-ov5640.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 05d8aef6e5d2..1f1173efeb14 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1339,6 +1339,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \ sun8i-a33-sinlinx-sina33.dtb \ sun8i-a83t-allwinner-h8homlet-v2.dtb \ sun8i-a83t-bananapi-m3.dtb \ + sun8i-a83t-bananapi-m3-camera-ov5640.dtbo \ sun8i-a83t-cubietruck-plus.dtb \ sun8i-a83t-tbs-a711.dtb \ sun8i-h2-plus-bananapi-m2-zero.dtb \ diff --git a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3-camera-ov5640.dts b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3-camera-ov5640.dts new file mode 100644 index 000000000000..5868ef11bdee --- /dev/null +++ b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3-camera-ov5640.dts @@ -0,0 +1,117 @@ +// SPDX-License-Identifier: GPL-2.0 OR X11 +/* + * Copyright 2022 Bootlin + * Author: Paul Kocialkowski + */ + +/dts-v1/; +/plugin/; + +#include +#include + +&{/} { + /* + * These regulators actually have DLDO4 tied to their EN pin, which is + * described as input supply here for lack of a better representation. + * Their actual supply is PS, which is always-on. + */ + + ov5640_avdd: ov5640-avdd { + compatible = "regulator-fixed"; + regulator-name = "ov5640-avdd"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + vin-supply = <®_dldo4>; + }; + + ov5640_dovdd: ov5640-dovdd { + compatible = "regulator-fixed"; + regulator-name = "ov5640-dovdd"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + vin-supply = <®_dldo4>; + }; + + ov5640_dvdd: ov5640-dvdd { + compatible = "regulator-fixed"; + regulator-name = "ov5640-dvdd"; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + vin-supply = <®_dldo4>; + }; +}; + +&csi { + pinctrl-names = "default"; + pinctrl-0 = <&csi_8bit_parallel_pins>; + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + csi_in_ov5640: endpoint { + remote-endpoint = <&ov5640_out_csi>; + bus-width = <8>; + data-shift = <2>; + hsync-active = <1>; + vsync-active = <1>; + pclk-sample = <1>; + }; + }; + }; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pe_pins>; + status = "okay"; + + #address-cells = <1>; + #size-cells = <0>; + + ov5640: camera@3c { + compatible = "ovti,ov5640"; + reg = <0x3c>; + + clocks = <&ccu CLK_CSI_MCLK>; + clock-names = "xclk"; + assigned-clocks = <&ccu CLK_CSI_MCLK>; + assigned-clock-parents = <&osc24M>; + assigned-clock-rates = <24000000>; + + AVDD-supply = <&ov5640_avdd>; + DOVDD-supply = <&ov5640_dovdd>; + DVDD-supply = <&ov5640_dvdd>; + + powerdown-gpios = <&pio 3 15 GPIO_ACTIVE_HIGH>; /* PD15 */ + reset-gpios = <&pio 4 16 GPIO_ACTIVE_LOW>; /* PE16 */ + + rotation = <180>; + + port { + ov5640_out_csi: endpoint { + remote-endpoint = <&csi_in_ov5640>; + bus-width = <8>; + data-shift = <2>; + hsync-active = <1>; + vsync-active = <1>; + pclk-sample = <1>; + }; + }; + }; +}; + +&pio { + pinctrl-names = "default"; + pinctrl-0 = <&csi_mclk_pin>; +}; + +®_dldo4 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; +}; From patchwork Sat Sep 24 15:28:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paul Kocialkowski X-Patchwork-Id: 609292 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2D6DCC32771 for ; Sat, 24 Sep 2022 15:28:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233884AbiIXP2w (ORCPT ); Sat, 24 Sep 2022 11:28:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45286 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233825AbiIXP2m (ORCPT ); Sat, 24 Sep 2022 11:28:42 -0400 Received: from relay5-d.mail.gandi.net (relay5-d.mail.gandi.net [217.70.183.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 72F19AE9C4; Sat, 24 Sep 2022 08:28:40 -0700 (PDT) Received: (Authenticated sender: paul.kocialkowski@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id E06001C0005; Sat, 24 Sep 2022 15:28:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1664033319; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=PcAx96hQWyvOVHMIzU0gp4tFx7K/DUMSyJG/y50Qklo=; b=IUaxIX/5E5mDE7r8ZfueH/z48LI4wd6j9GtXLSy0QAOg0+JpssLhrfAhF77VDkRn4k1IRI fmnNXvyk7w1YWHNQq4DHZiDToDzda4pSThPfKrqnhGd6sM8uvSuPYM+K6KS9DqPjvKk3sV 91tvO5vLfYjKRo+0aH3H2iT1/aVbUgHHdPpRiUUOQ5K5BEXuyO+bzG/DRVxIp9VOD+LpDj Q6c5Pduq/kUd1U0UVUoP6ZNAR6X3c4DcMrEIO2WnxW9GQ6jcqHYDSD9lQhDxOi2uGMTvKY dHBCwlrEvtZC2s0EN4AdM4i+qjYfU6m48nSF1v1YKGewu7TzRfNd5Z6a9ukXTw== From: Paul Kocialkowski To: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org Cc: Rob Herring , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Michael Turquette , Stephen Boyd , Frank Rowand , Maxime Ripard , Laurent Pinchart , Thomas Petazzoni , Paul Kocialkowski Subject: [PATCH v6 7/7] ARM: dts: sun8i-a83t: Add BananaPi M3 OV8865 camera overlay Date: Sat, 24 Sep 2022 17:28:20 +0200 Message-Id: <20220924152820.77149-8-paul.kocialkowski@bootlin.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220924152820.77149-1-paul.kocialkowski@bootlin.com> References: <20220924152820.77149-1-paul.kocialkowski@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Add an overlay supporting the OV8865 from the BananaPi Camera v3 peripheral board. The board has two sensors (OV5640 and OV8865) which cannot be supported in parallel as they share the same reset pin and the kernel currently has no support for this case. Signed-off-by: Paul Kocialkowski --- arch/arm/boot/dts/Makefile | 1 + .../sun8i-a83t-bananapi-m3-camera-ov8865.dts | 109 ++++++++++++++++++ 2 files changed, 110 insertions(+) create mode 100644 arch/arm/boot/dts/sun8i-a83t-bananapi-m3-camera-ov8865.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 1f1173efeb14..cf0ab67b430b 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1340,6 +1340,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \ sun8i-a83t-allwinner-h8homlet-v2.dtb \ sun8i-a83t-bananapi-m3.dtb \ sun8i-a83t-bananapi-m3-camera-ov5640.dtbo \ + sun8i-a83t-bananapi-m3-camera-ov8865.dtbo \ sun8i-a83t-cubietruck-plus.dtb \ sun8i-a83t-tbs-a711.dtb \ sun8i-h2-plus-bananapi-m2-zero.dtb \ diff --git a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3-camera-ov8865.dts b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3-camera-ov8865.dts new file mode 100644 index 000000000000..0656ee8d4bfe --- /dev/null +++ b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3-camera-ov8865.dts @@ -0,0 +1,109 @@ +// SPDX-License-Identifier: GPL-2.0 OR X11 +/* + * Copyright 2022 Bootlin + * Author: Kévin L'hôpital + * Author: Paul Kocialkowski + */ + +/dts-v1/; +/plugin/; + +#include +#include + +&{/} { + /* + * These regulators actually have DLDO4 tied to their EN pin, which is + * described as input supply here for lack of a better representation. + * Their actual supply is PS, which is always-on. + */ + + ov8865_avdd: ov8865-avdd { + compatible = "regulator-fixed"; + regulator-name = "ov8865-avdd"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + vin-supply = <®_dldo4>; + }; + + ov8865_dovdd: ov8865-dovdd { + compatible = "regulator-fixed"; + regulator-name = "ov8865-dovdd"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + vin-supply = <®_dldo4>; + }; + + ov8865_dvdd: ov8865-dvdd { + compatible = "regulator-fixed"; + regulator-name = "ov8865-dvdd"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + vin-supply = <®_dldo4>; + }; +}; + +&ccu { + assigned-clocks = <&ccu CLK_CSI_MCLK>; + assigned-clock-parents = <&osc24M>; + assigned-clock-rates = <24000000>; +}; + +&csi { + status = "okay"; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pe_pins>; + status = "okay"; + + #address-cells = <1>; + #size-cells = <0>; + + ov8865: camera@36 { + compatible = "ovti,ov8865"; + reg = <0x36>; + + clocks = <&ccu CLK_CSI_MCLK>; + assigned-clocks = <&ccu CLK_CSI_MCLK>; + assigned-clock-parents = <&osc24M>; + assigned-clock-rates = <24000000>; + + avdd-supply = <&ov8865_avdd>; + dovdd-supply = <&ov8865_dovdd>; + dvdd-supply = <&ov8865_dvdd>; + + powerdown-gpios = <&pio 4 17 GPIO_ACTIVE_LOW>; /* PE17 */ + reset-gpios = <&pio 4 16 GPIO_ACTIVE_LOW>; /* PE16 */ + + port { + ov8865_out_mipi_csi2: endpoint { + remote-endpoint = <&mipi_csi2_in_ov8865>; + link-frequencies = /bits/ 64 <360000000>; + data-lanes = <1 2 3 4>; + }; + }; + }; +}; + +&mipi_csi2 { + status = "okay"; +}; + +&mipi_csi2_in { + mipi_csi2_in_ov8865: endpoint { + remote-endpoint = <&ov8865_out_mipi_csi2>; + data-lanes = <1 2 3 4>; + }; +}; + +&pio { + pinctrl-names = "default"; + pinctrl-0 = <&csi_mclk_pin>; +}; + +®_dldo4 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; +};