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[78.11.189.27]) by smtp.gmail.com with ESMTPSA id x15-20020a19e00f000000b00498fc3d4d15sm1079375lfg.190.2022.09.22.12.56.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Sep 2022 12:56:58 -0700 (PDT) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Linus Walleij , Rob Herring , Krzysztof Kozlowski , Srinivas Kandagatla , linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH 02/12] dt-bindings: pinctrl: qcom,sm8450-lpass-lpi: fix gpio pattern Date: Thu, 22 Sep 2022 21:56:41 +0200 Message-Id: <20220922195651.345369-3-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220922195651.345369-1-krzysztof.kozlowski@linaro.org> References: <20220922195651.345369-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Fix double ']' in GPIO pattern to properly match "pins" property. Otherwise schema for pins state is not applied. Fixes: 4faa4e73011d ("dt-bindings: pinctrl: qcom: Add sm8450 lpass lpi pinctrl bindings") Signed-off-by: Krzysztof Kozlowski Acked-by: Rob Herring --- .../bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml index 3694795ec793..c17cdff6174f 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml @@ -58,7 +58,7 @@ patternProperties: List of gpio pins affected by the properties specified in this subnode. items: - pattern: "^gpio([0-9]|[1-2][0-9]])$" + pattern: "^gpio([0-9]|[1-2][0-9])$" function: enum: [ swr_tx_clk, swr_tx_data, swr_rx_clk, swr_rx_data, From patchwork Thu Sep 22 19:56:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 608343 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E8203ECAAD8 for ; Thu, 22 Sep 2022 19:57:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232304AbiIVT5L (ORCPT ); Thu, 22 Sep 2022 15:57:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59650 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232374AbiIVT5F (ORCPT ); Thu, 22 Sep 2022 15:57:05 -0400 Received: from mail-lj1-x229.google.com (mail-lj1-x229.google.com [IPv6:2a00:1450:4864:20::229]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4910710CA4E for ; Thu, 22 Sep 2022 12:57:03 -0700 (PDT) Received: by mail-lj1-x229.google.com with SMTP id c7so12252155ljm.12 for ; Thu, 22 Sep 2022 12:57:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=zD648AnsuV0PNiCjTIvr+q3p3sIkDKW3NTFtNUlGeBg=; b=NLkJyVqJH5PHydsaDMfohBL/rDEj4hQP/eS5pxOdbwSeOHGaHr7GWHX327hfIuR17X Xs310I0ctd//b/q2bcspL3ZiAqJC/vFOjF6rhVSmk1Cx5Ggd/2BeSfX/bqlgMOWBiGox LwqLoO3pjLXVfkflnucbrznBcqvzrfEpIVHRCCfCp4Emv55sHI6rskhqLueBb7u0FoRP 5Ayp644KhLuUvKy1v4Lvs1vNpLqX96VZqKmwwTnJvrxo0a0yeMyYwKLJs6z7ftKKy/Ze M+UNgRvIWMjAl0zR0cRpR/c27Prbi5kuINjVItbZHPVS7lNZW6oovfs6C3mK9pwmq/wL oyow== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=zD648AnsuV0PNiCjTIvr+q3p3sIkDKW3NTFtNUlGeBg=; b=ObClc7KF4uJM0XhHGnTyKkkpcTtg+09dEFirEnrD+ABFCL2isoPAYdRz+Bb6Vt0HOT yPWr1BoA5a41wM+Almn6ZN31VAgtzEmGKEeMtusvxEXKPuGpJVOHiWBoqBoO3PqMqKVG QvPguU/5hwcjUGxCbtPwbvzJSobf13iPX3PMWKXOAks7BbKSOZXfynR9BrpYZQbqnFMx udH00/jokaPyDBEJST337Y9iB+DlibWUADpkvxIyBoZuO0hYwP/Gx6jHhshLETHBSQYV Xgwi++f+pIAWj+nKvPE2ssY6UCmosANWhcvAGJYbHh2Ln07djGUSQOVu9/yOPUGiJMIm n8kA== X-Gm-Message-State: ACrzQf1RAhpJkrgrLcaMoXl8dS8PZJT3/134x9v6g1L3Yj6Bfr+TAU7L 3Gb61kdZJnqUcI7RbVpuRnEn8w== X-Google-Smtp-Source: AMsMyM6i8uqoZ2S0G5yCRtm8dCuh5z0/aMF6W0SFCfZR4Ul6B7E+Q1XRywvLoAJoZtWPTvCVA8H4sg== X-Received: by 2002:a05:651c:a0c:b0:26c:4f22:27ea with SMTP id k12-20020a05651c0a0c00b0026c4f2227eamr1682369ljq.281.1663876621506; Thu, 22 Sep 2022 12:57:01 -0700 (PDT) Received: from krzk-bin.. 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[78.11.189.27]) by smtp.gmail.com with ESMTPSA id x15-20020a19e00f000000b00498fc3d4d15sm1079375lfg.190.2022.09.22.12.57.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Sep 2022 12:57:00 -0700 (PDT) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Linus Walleij , Rob Herring , Krzysztof Kozlowski , Srinivas Kandagatla , linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH 04/12] dt-bindings: pinctrl: qcom,sc8280xp-lpass-lpi: fix matching pin config Date: Thu, 22 Sep 2022 21:56:43 +0200 Message-Id: <20220922195651.345369-5-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220922195651.345369-1-krzysztof.kozlowski@linaro.org> References: <20220922195651.345369-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The LPASS pin controller follows generic pin-controller bindings, so just like TLMM, should have subnodes with '-state' and '-pins'. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Rob Herring --- .../qcom,sc8280xp-lpass-lpi-pinctrl.yaml | 29 +++++++++++++++++-- 1 file changed, 27 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-lpass-lpi-pinctrl.yaml index fb3ad6c0d80e..26e93e2c8c42 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-lpass-lpi-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-lpass-lpi-pinctrl.yaml @@ -43,9 +43,17 @@ properties: gpio-ranges: maxItems: 1 -#PIN CONFIGURATION NODES patternProperties: - '-pins$': + "-state$": + oneOf: + - $ref: "#/$defs/qcom-sc8280xp-lpass-tlmm-state" + - patternProperties: + "-pins$": + $ref: "#/$defs/qcom-sc8280xp-lpass-tlmm-state" + additionalProperties: false + +$defs: + qcom-sc8280xp-lpass-tlmm-state: type: object description: Pinctrl node's client devices use subnodes for desired pin configuration. @@ -130,4 +138,21 @@ examples: gpio-controller; #gpio-cells = <2>; gpio-ranges = <&lpi_tlmm 0 0 18>; + + dmic01-state { + dmic01-clk-pins { + pins = "gpio16"; + function = "dmic1_clk"; + }; + + dmic01-clk-sleep-pins { + pins = "gpio16"; + function = "dmic1_clk"; + }; + }; + + tx-swr-data-sleep-state { + pins = "gpio0", "gpio1"; + function = "swr_tx_data"; + }; }; From patchwork Thu Sep 22 19:56:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 608342 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 78136ECAAD8 for ; Thu, 22 Sep 2022 19:57:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232633AbiIVT5R (ORCPT ); Thu, 22 Sep 2022 15:57:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59674 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232563AbiIVT5G (ORCPT ); Thu, 22 Sep 2022 15:57:06 -0400 Received: from mail-lf1-x12e.google.com (mail-lf1-x12e.google.com [IPv6:2a00:1450:4864:20::12e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B6986E3ECB for ; Thu, 22 Sep 2022 12:57:04 -0700 (PDT) Received: by mail-lf1-x12e.google.com with SMTP id u18so16421881lfo.8 for ; Thu, 22 Sep 2022 12:57:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=MfBzbOv42rRAiReWCauD0AbaHonJ+8RmdTz4pUa1E/Q=; b=hA6RMr/DAnnyt8rfQ77T67Z2LZjzItdeC22ZKLfPfobCPOpHfMCivQJa4rTQuoV6yd Xt/sxlhO6IR+v3lGZDh0FiTPqOf9BnOQVOLvESBOl7wKMEU16TF26x9jtAcvUSmwD0s2 Z4s3BAgt4gpcX+3shoLF83bWVpzZ2w/suVJtGl1Ny88veV1vTYNtXqt90WBerwRFULfp 9CfROxKX7V2wteZu7YNXIHWDQqr9xJGqzNnoCHQO0DrYX7JfD66eUZriP08K0FqrK7mV /PAIqJXXTOXfkgWMein8ZOsQOtdiekwKKfnC1dzQesqM/ZVSijfkctrTFDuHYyVyeVCR PVFg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=MfBzbOv42rRAiReWCauD0AbaHonJ+8RmdTz4pUa1E/Q=; b=2Ql+P46A6tAfztDGsAwYPuK9UULniTjFVrrBpbUBcdMVuZfaaeYJEc9Us52Wm2YVh5 XqRrqSvyynrvrSC4cWldMSzioymjbF+OPU+PlykbkZ7krWIyxfXE3bQoOP2ejalf9Lvi pTUrKEoMiKP4En4nvxdIh3bW4uU9yqtkQgMfIB/45RiPI1Ptb7oJ6gz6zpZEx77NdZhM F/u7j65Oz/6iTfs2roimDqOo8ujgsqMndvymahVn2n35vfLzgSdL+A9ilptjPhxLfZys NlWk5WIkv8vPlPJMu3wBsXBezLWuDTtPGhIO9ndOG+ng8OpZXJfSyKT/0fN+/Tq5eknq XUEg== X-Gm-Message-State: ACrzQf1pug0bq78ZqAiZwTnxkcY/+58sSKP7BcwMJc6kE2YbVpJg5epS CKPjkqIKSxOb4BORolW+NDc71Q== X-Google-Smtp-Source: AMsMyM6V5pDiKk9QTYafbge+gpsWtZWHnOKidEkmcaVU/zdLMpLPHr2bq7qDjg7TnzEn9H/GQQGQgg== X-Received: by 2002:ac2:5191:0:b0:497:ac0c:cf65 with SMTP id u17-20020ac25191000000b00497ac0ccf65mr2057291lfi.436.1663876624272; Thu, 22 Sep 2022 12:57:04 -0700 (PDT) Received: from krzk-bin.. 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[78.11.189.27]) by smtp.gmail.com with ESMTPSA id x15-20020a19e00f000000b00498fc3d4d15sm1079375lfg.190.2022.09.22.12.57.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Sep 2022 12:57:03 -0700 (PDT) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Linus Walleij , Rob Herring , Krzysztof Kozlowski , Srinivas Kandagatla , linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH 06/12] dt-bindings: pinctrl: qcom,sm8450-lpass-lpi: fix matching pin config Date: Thu, 22 Sep 2022 21:56:45 +0200 Message-Id: <20220922195651.345369-7-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220922195651.345369-1-krzysztof.kozlowski@linaro.org> References: <20220922195651.345369-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The LPASS pin controller follows generic pin-controller bindings, so just like TLMM, should have subnodes with '-state' and '-pins'. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Rob Herring --- .../qcom,sm8450-lpass-lpi-pinctrl.yaml | 36 +++++++++++++++++-- 1 file changed, 34 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml index c17cdff6174f..0e0769a7751c 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml @@ -43,9 +43,17 @@ properties: gpio-ranges: maxItems: 1 -#PIN CONFIGURATION NODES patternProperties: - '-pins$': + "-state$": + oneOf: + - $ref: "#/$defs/qcom-sm8450-lpass-tlmm-state" + - patternProperties: + "-pins$": + $ref: "#/$defs/qcom-sm8450-lpass-tlmm-state" + additionalProperties: false + +$defs: + qcom-sm8450-lpass-tlmm-state: type: object description: Pinctrl node's client devices use subnodes for desired pin configuration. @@ -132,4 +140,28 @@ examples: gpio-controller; #gpio-cells = <2>; gpio-ranges = <&lpi_tlmm 0 0 23>; + + wsa-swr-active-state { + clk-pins { + pins = "gpio10"; + function = "wsa_swr_clk"; + drive-strength = <2>; + slew-rate = <1>; + bias-disable; + }; + + data-pins { + pins = "gpio11"; + function = "wsa_swr_data"; + drive-strength = <2>; + slew-rate = <1>; + }; + }; + + tx-swr-sleep-clk-state { + pins = "gpio0"; + function = "swr_tx_clk"; + drive-strength = <2>; + bias-pull-down; + }; }; From patchwork Thu Sep 22 19:56:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 608341 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1A26FC6FA91 for ; Thu, 22 Sep 2022 19:57:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232702AbiIVT5Z (ORCPT ); Thu, 22 Sep 2022 15:57:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59896 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232374AbiIVT5N (ORCPT ); Thu, 22 Sep 2022 15:57:13 -0400 Received: from mail-lf1-x133.google.com (mail-lf1-x133.google.com [IPv6:2a00:1450:4864:20::133]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AF483E6A0A for ; Thu, 22 Sep 2022 12:57:08 -0700 (PDT) Received: by mail-lf1-x133.google.com with SMTP id z25so16486074lfr.2 for ; Thu, 22 Sep 2022 12:57:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=MnJiqKj/e0bK6O8HCkffXBhhqIr/MLQ5+XtNrwDGU98=; b=Ld6UrZ2WvTW9uIl+6BjlF1IuBIIFiwde5YvP2eZTR/yhNMjs6Wl6ibHS+fz2WFkowo kw3z/8VqxItyyXD4etJHBjsIpfz93GK7Npx6esi9aAGwNdiUf9fgxNTI6lcGV7+WTr86 TWS1HQ3rdF+7i9NWH5/3/Nerkp2uRlVTnV0jzc2l+vU8azNukkTFOgXKXySEmU2328R/ fD2a4srWJkp4K8nj90B+CdOoQMqoldg4SfBt+DfsfINQvXUeGYA08FbfBXvLaG4WuWmJ lE3FmXc2uuuzfCnfV54MiJWKUp/5CI4z/oBivW0wRnIl6bnitivBmzriSXEQwuZL1JoB d+cA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=MnJiqKj/e0bK6O8HCkffXBhhqIr/MLQ5+XtNrwDGU98=; b=Adj+BurbtS+7wO+hiJFWqk7ojb0NDCHHFsOy9SMp76X7KMcBv9bM38Gkdw97kFwH8z 34KQnfbBvv2TcTiGKKrGwg3YDbsuOtNvAbzrIpDweSxr+M4/GJ+cEFymj5TDA0W197X5 9xXXwW+nhpzDShu25o5ln6SmwAIhdqS7MkoWtWZV2PU3nSdh9vSyTSE/tQJ/iTzqmU38 jEO0RU8LXJPk4nUrtLAAY+jC15oil8L3mz+4N4p9+LLIUOHanzz5WD8pPENbONMIG3TG 5EJi/Ks9Q/VODCFBeATGH+PBU59gwV22hiaDl4AW4mJpPYYxcpUDmLfgI6/NnAoJ3zeY 9/VQ== X-Gm-Message-State: ACrzQf332dI+VJ8U/bu3AX7t9F7jQt38v3etekuuH/9fgQKllSUvFBM6 CwdCDCiN9xKd7hXPyxuU9h5+Iw== X-Google-Smtp-Source: AMsMyM5Q7W16iXPI8jA3/nPDy35YnHEIlNe3uS13TbNOLPBTDNgmdH7+jkIlrcghKlaw7kGs82Kj4A== X-Received: by 2002:a05:6512:489:b0:49f:4da0:a023 with SMTP id v9-20020a056512048900b0049f4da0a023mr2029897lfq.599.1663876626876; Thu, 22 Sep 2022 12:57:06 -0700 (PDT) Received: from krzk-bin.. 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[78.11.189.27]) by smtp.gmail.com with ESMTPSA id x15-20020a19e00f000000b00498fc3d4d15sm1079375lfg.190.2022.09.22.12.57.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Sep 2022 12:57:06 -0700 (PDT) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Linus Walleij , Rob Herring , Krzysztof Kozlowski , Srinivas Kandagatla , linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH 08/12] dt-bindings: pinctrl: qcom,sm8250-lpass-lpi: add bias-bus-hold and input-enable Date: Thu, 22 Sep 2022 21:56:47 +0200 Message-Id: <20220922195651.345369-9-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220922195651.345369-1-krzysztof.kozlowski@linaro.org> References: <20220922195651.345369-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The existing SC7280 LPASS pin controller nodes use bias-bus-hold and input-enable, so allow them. Squash also blank lines for readability. Signed-off-by: Krzysztof Kozlowski --- .../bindings/pinctrl/qcom,sm8250-lpass-lpi-pinctrl.yaml | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-lpass-lpi-pinctrl.yaml index 9640d1110fdd..2427da7c20d3 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-lpass-lpi-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-lpass-lpi-pinctrl.yaml @@ -96,13 +96,11 @@ $defs: 3: Reserved (No adjustments) bias-pull-down: true - bias-pull-up: true - + bias-bus-hold: true bias-disable: true - + input-enable: true output-high: true - output-low: true required: From patchwork Thu Sep 22 19:56:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 608340 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 90151C6FA82 for ; Thu, 22 Sep 2022 19:57:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232726AbiIVT5d (ORCPT ); Thu, 22 Sep 2022 15:57:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60024 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232629AbiIVT5Q (ORCPT ); Thu, 22 Sep 2022 15:57:16 -0400 Received: from mail-lf1-x12d.google.com (mail-lf1-x12d.google.com [IPv6:2a00:1450:4864:20::12d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7C00910D0F2 for ; Thu, 22 Sep 2022 12:57:10 -0700 (PDT) Received: by mail-lf1-x12d.google.com with SMTP id m22so1736676lfg.0 for ; Thu, 22 Sep 2022 12:57:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=adnw/70iR35kRw0Wjt+Tvx+wL5mop5CypxFcUPW7oIA=; b=BpqxE9ItlwUiXUv8kaKwd5NO9ITWdydQOedR5fOnb32t6UKyJ/S6B4EEfJMTbJ4e6h iVwL/D0Y6EX11zpqdKe0OieMXbcEyhNFaXob84KqNuM3YyObsZs91WRGlfxB4EBqSTGY edg8yJimYgfM5Pi1AdvUIRwq//mMPNePJ8jv9kbkfA3fmDItbMSswuzoEMDjViBMknSS Z/WaQrysyqxnnkvAm5UT0FYL2/0VUKc6G0dfEhKLppgpYcpX/B5NTHRIskm3fOwPnzyO vURF11AGKlcjwL9/mD3tPWAplsfAkpStiZXFK+oP45BKnkmI2nEAb8S5nLuK3YkYu9h8 0sJg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=adnw/70iR35kRw0Wjt+Tvx+wL5mop5CypxFcUPW7oIA=; b=SkvXzcYZ1jIq7I5EhPBIdTURda/DMhEyZHCxuFU+BQa/jj2yKrTNmdg41wA/T6603Y LUq+EBlTt0TkJ3/IRoRYee0fO8uCdHyuQSDxldaU14H7mHhJSRqjY8k0EOSvP8B58smE uo6Az14LbIMS6xpNJR+t5kOKiyKhxzDLJSxhs9OXraacbCaPbc2ISvSLg2DT5V2a/MjV siFwn2wh3yfXn9+GeCOhSkyGSgV4WaaTpjV6YiOvdrkacGFLleCGG6R1PsiJgwlXAom+ Mauq6OqErPba43sHMmdnYw/wx8bJKBUtUlvJb4kgdy7atM9Mt5bPhETfR7gFOfRCfHEh hN1A== X-Gm-Message-State: ACrzQf2JgQ20RMRN+1x6gf6HCxGfN5LLzBJr7+JnpvYBXWTx0xjAga0w lTAqQO4l6lZTfGJBgnVXctDNQA== X-Google-Smtp-Source: AMsMyM7o6+0RwzlMM2SwkWERkarFeg309xO1vAEp9DohhQp6lsYJfOfvl/2lQj5z+TifA9h5hkOmJA== X-Received: by 2002:a05:6512:3b22:b0:49a:d302:ae04 with SMTP id f34-20020a0565123b2200b0049ad302ae04mr1992785lfv.72.1663876629769; Thu, 22 Sep 2022 12:57:09 -0700 (PDT) Received: from krzk-bin.. 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[78.11.189.27]) by smtp.gmail.com with ESMTPSA id x15-20020a19e00f000000b00498fc3d4d15sm1079375lfg.190.2022.09.22.12.57.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Sep 2022 12:57:09 -0700 (PDT) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Linus Walleij , Rob Herring , Krzysztof Kozlowski , Srinivas Kandagatla , linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH 10/12] arm64: dts: qcom: sc7280: align LPASS pin configuration with DT schema Date: Thu, 22 Sep 2022 21:56:49 +0200 Message-Id: <20220922195651.345369-11-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220922195651.345369-1-krzysztof.kozlowski@linaro.org> References: <20220922195651.345369-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org DT schema expects LPASS pin configuration nodes to be named with '-state' suffix and their optional children with '-pins' suffix. Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 32 ++++++++++++++-------------- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index 8823b75a6f1b..28e3fb9992d9 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -2432,82 +2432,82 @@ lpass_tlmm: pinctrl@33c0000 { #gpio-cells = <2>; gpio-ranges = <&lpass_tlmm 0 0 15>; - lpass_dmic01_clk: dmic01-clk { + lpass_dmic01_clk: dmic01-clk-state { pins = "gpio6"; function = "dmic1_clk"; }; - lpass_dmic01_clk_sleep: dmic01-clk-sleep { + lpass_dmic01_clk_sleep: dmic01-clk-sleep-state { pins = "gpio6"; function = "dmic1_clk"; }; - lpass_dmic01_data: dmic01-data { + lpass_dmic01_data: dmic01-data-state { pins = "gpio7"; function = "dmic1_data"; }; - lpass_dmic01_data_sleep: dmic01-data-sleep { + lpass_dmic01_data_sleep: dmic01-data-sleep-state { pins = "gpio7"; function = "dmic1_data"; }; - lpass_dmic23_clk: dmic23-clk { + lpass_dmic23_clk: dmic23-clk-state { pins = "gpio8"; function = "dmic2_clk"; }; - lpass_dmic23_clk_sleep: dmic23-clk-sleep { + lpass_dmic23_clk_sleep: dmic23-clk-sleep-state { pins = "gpio8"; function = "dmic2_clk"; }; - lpass_dmic23_data: dmic23-data { + lpass_dmic23_data: dmic23-data-state { pins = "gpio9"; function = "dmic2_data"; }; - lpass_dmic23_data_sleep: dmic23-data-sleep { + lpass_dmic23_data_sleep: dmic23-data-sleep-state { pins = "gpio9"; function = "dmic2_data"; }; - lpass_rx_swr_clk: rx-swr-clk { + lpass_rx_swr_clk: rx-swr-clk-state { pins = "gpio3"; function = "swr_rx_clk"; }; - lpass_rx_swr_clk_sleep: rx-swr-clk-sleep { + lpass_rx_swr_clk_sleep: rx-swr-clk-sleep-state { pins = "gpio3"; function = "swr_rx_clk"; }; - lpass_rx_swr_data: rx-swr-data { + lpass_rx_swr_data: rx-swr-data-state { pins = "gpio4", "gpio5"; function = "swr_rx_data"; }; - lpass_rx_swr_data_sleep: rx-swr-data-sleep { + lpass_rx_swr_data_sleep: rx-swr-data-sleep-state { pins = "gpio4", "gpio5"; function = "swr_rx_data"; }; - lpass_tx_swr_clk: tx-swr-clk { + lpass_tx_swr_clk: tx-swr-clk-state { pins = "gpio0"; function = "swr_tx_clk"; }; - lpass_tx_swr_clk_sleep: tx-swr-clk-sleep { + lpass_tx_swr_clk_sleep: tx-swr-clk-sleep-state { pins = "gpio0"; function = "swr_tx_clk"; }; - lpass_tx_swr_data: tx-swr-data { + lpass_tx_swr_data: tx-swr-data-state { pins = "gpio1", "gpio2", "gpio14"; function = "swr_tx_data"; }; - lpass_tx_swr_data_sleep: tx-swr-data-sleep { + lpass_tx_swr_data_sleep: tx-swr-data-sleep-state { pins = "gpio1", "gpio2", "gpio14"; function = "swr_tx_data"; }; From patchwork Thu Sep 22 19:56:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 608339 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3292FECAAD8 for ; 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[78.11.189.27]) by smtp.gmail.com with ESMTPSA id x15-20020a19e00f000000b00498fc3d4d15sm1079375lfg.190.2022.09.22.12.57.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Sep 2022 12:57:11 -0700 (PDT) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Linus Walleij , Rob Herring , Krzysztof Kozlowski , Srinivas Kandagatla , linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH 12/12] arm64: dts: qcom: sm8250: align LPASS pin configuration with DT schema Date: Thu, 22 Sep 2022 21:56:51 +0200 Message-Id: <20220922195651.345369-13-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220922195651.345369-1-krzysztof.kozlowski@linaro.org> References: <20220922195651.345369-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org DT schema expects LPASS pin configuration nodes to be named with '-state' suffix and their optional children with '-pins' suffix. Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 44 ++++++++++++++-------------- 1 file changed, 22 insertions(+), 22 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index 8f402b912c62..e0416d611b66 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -2388,8 +2388,8 @@ lpass_tlmm: pinctrl@33c0000{ <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>; clock-names = "core", "audio"; - wsa_swr_active: wsa-swr-active-pins { - clk { + wsa_swr_active: wsa-swr-active-state { + clk-pins { pins = "gpio10"; function = "wsa_swr_clk"; drive-strength = <2>; @@ -2397,7 +2397,7 @@ clk { bias-disable; }; - data { + data-pins { pins = "gpio11"; function = "wsa_swr_data"; drive-strength = <2>; @@ -2407,8 +2407,8 @@ data { }; }; - wsa_swr_sleep: wsa-swr-sleep-pins { - clk { + wsa_swr_sleep: wsa-swr-sleep-state { + clk-pins { pins = "gpio10"; function = "wsa_swr_clk"; drive-strength = <2>; @@ -2416,7 +2416,7 @@ clk { bias-pull-down; }; - data { + data-pins { pins = "gpio11"; function = "wsa_swr_data"; drive-strength = <2>; @@ -2426,14 +2426,14 @@ data { }; }; - dmic01_active: dmic01-active-pins { - clk { + dmic01_active: dmic01-active-state { + clk-pins { pins = "gpio6"; function = "dmic1_clk"; drive-strength = <8>; output-high; }; - data { + data-pins { pins = "gpio7"; function = "dmic1_data"; drive-strength = <8>; @@ -2441,8 +2441,8 @@ data { }; }; - dmic01_sleep: dmic01-sleep-pins { - clk { + dmic01_sleep: dmic01-sleep-state { + clk-pins { pins = "gpio6"; function = "dmic1_clk"; drive-strength = <2>; @@ -2450,7 +2450,7 @@ clk { output-low; }; - data { + data-pins { pins = "gpio7"; function = "dmic1_data"; drive-strength = <2>; @@ -2459,8 +2459,8 @@ data { }; }; - rx_swr_active: rx_swr-active-pins { - clk { + rx_swr_active: rx-swr-active-state { + clk-pins { pins = "gpio3"; function = "swr_rx_clk"; drive-strength = <2>; @@ -2468,7 +2468,7 @@ clk { bias-disable; }; - data { + data-pins { pins = "gpio4", "gpio5"; function = "swr_rx_data"; drive-strength = <2>; @@ -2477,8 +2477,8 @@ data { }; }; - tx_swr_active: tx_swr-active-pins { - clk { + tx_swr_active: tx-swr-active-state { + clk-pins { pins = "gpio0"; function = "swr_tx_clk"; drive-strength = <2>; @@ -2486,7 +2486,7 @@ clk { bias-disable; }; - data { + data-pins { pins = "gpio1", "gpio2"; function = "swr_tx_data"; drive-strength = <2>; @@ -2495,8 +2495,8 @@ data { }; }; - tx_swr_sleep: tx_swr-sleep-pins { - clk { + tx_swr_sleep: tx-swr-sleep-state { + clk-pins { pins = "gpio0"; function = "swr_tx_clk"; drive-strength = <2>; @@ -2504,7 +2504,7 @@ clk { bias-pull-down; }; - data1 { + data1-pins { pins = "gpio1"; function = "swr_tx_data"; drive-strength = <2>; @@ -2512,7 +2512,7 @@ data1 { bias-bus-hold; }; - data2 { + data2-pins { pins = "gpio2"; function = "swr_tx_data"; drive-strength = <2>;