From patchwork Wed Sep 14 09:50:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Siddharth Vadapalli X-Patchwork-Id: 606777 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 79B34ECAAD3 for ; Wed, 14 Sep 2022 09:52:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231623AbiINJwV (ORCPT ); Wed, 14 Sep 2022 05:52:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53028 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231624AbiINJv4 (ORCPT ); Wed, 14 Sep 2022 05:51:56 -0400 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4CB2266138; Wed, 14 Sep 2022 02:51:50 -0700 (PDT) Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 28E9p5nN006774; Wed, 14 Sep 2022 04:51:05 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1663149065; bh=CL2cbBVuEBtxASYb7DpsxyZqCktdhjJgBmatAHDUBeQ=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=yLuqpJ04LtErmTj1lZBXz/FmzWqKn48YD1w4vT/t/G5cFY4q7nrbLWxytz+xHaqCa WTzSXLruFOEaO1qO1KBLrSSGuE2VRY8srVyzh9L0Po/3mODK8lSloureiBSE4s1RRQ 5kAqme2dwmsTTe+vNiTKB6JNqgLfSuRYq6oglKV0= Received: from DLEE108.ent.ti.com (dlee108.ent.ti.com [157.170.170.38]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 28E9p5Mj010314 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 14 Sep 2022 04:51:05 -0500 Received: from DLEE101.ent.ti.com (157.170.170.31) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Wed, 14 Sep 2022 04:51:05 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE101.ent.ti.com (157.170.170.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Wed, 14 Sep 2022 04:51:05 -0500 Received: from uda0492258.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 28E9osD1046564; Wed, 14 Sep 2022 04:51:00 -0500 From: Siddharth Vadapalli To: , , , , , , , , , , , CC: , , , , , Subject: [PATCH 1/8] dt-bindings: net: ti: k3-am654-cpsw-nuss: Update bindings for J721e CPSW9G Date: Wed, 14 Sep 2022 15:20:46 +0530 Message-ID: <20220914095053.189851-2-s-vadapalli@ti.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220914095053.189851-1-s-vadapalli@ti.com> References: <20220914095053.189851-1-s-vadapalli@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Update bindings for TI K3 J721e SoC which contains 9 ports (8 external ports) CPSW9G module and add compatible for it. Changes made: - Add new compatible ti,j721e-cpswxg-nuss for CPSW9G. - Extend pattern properties for new compatible. - Change maximum number of CPSW ports to 8 for new compatible. Signed-off-by: Siddharth Vadapalli --- .../bindings/net/ti,k3-am654-cpsw-nuss.yaml | 23 +++++++++++++++++-- 1 file changed, 21 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml b/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml index 821974815dec..868b7fb58b06 100644 --- a/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml +++ b/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml @@ -57,6 +57,7 @@ properties: - ti,am654-cpsw-nuss - ti,j7200-cpswxg-nuss - ti,j721e-cpsw-nuss + - ti,j721e-cpswxg-nuss - ti,am642-cpsw-nuss reg: @@ -111,7 +112,7 @@ properties: const: 0 patternProperties: - "^port@[1-4]$": + "^port@[1-8]$": type: object description: CPSWxG NUSS external ports @@ -121,7 +122,7 @@ properties: properties: reg: minimum: 1 - maximum: 4 + maximum: 8 description: CPSW port number phys: @@ -181,6 +182,21 @@ required: - '#size-cells' allOf: + - if: + not: + properties: + compatible: + contains: + const: ti,j721e-cpswxg-nuss + then: + properties: + ethernet-ports: + patternProperties: + "^port@[5-8]$": false + properties: + reg: + maximum: 4 + - if: not: properties: @@ -192,6 +208,9 @@ allOf: ethernet-ports: patternProperties: "^port@[3-4]$": false + properties: + reg: + maximum: 2 additionalProperties: false From patchwork Wed Sep 14 09:50:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Siddharth Vadapalli X-Patchwork-Id: 606778 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E6402C6FA8A for ; Wed, 14 Sep 2022 09:51:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231529AbiINJvt (ORCPT ); Wed, 14 Sep 2022 05:51:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52834 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231228AbiINJvm (ORCPT ); Wed, 14 Sep 2022 05:51:42 -0400 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 391F16567B; Wed, 14 Sep 2022 02:51:41 -0700 (PDT) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 28E9pGI9101288; Wed, 14 Sep 2022 04:51:16 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1663149076; bh=GBPguLYuzWpgkQWE27/xUN3UdxcXSGCcXgb3PiozCmY=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=kUiSuUrDNHyeW03LAxlB5F8+W5FOPmLG0+WD+1lDn7gPT3VjNnRWO/ZFXHsj/HkxB SI9Rn3j7cv5Lx/Z8Pu/W7RbyU5+n9uF70SKf4dqwSsU8235WxvZZ3ZGih1cWshmula Kh2ER07pdRfWoJ90w72d7JrWQN562QM/9izbupMo= Received: from DLEE108.ent.ti.com (dlee108.ent.ti.com [157.170.170.38]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 28E9pG0W020328 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 14 Sep 2022 04:51:16 -0500 Received: from DLEE114.ent.ti.com (157.170.170.25) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Wed, 14 Sep 2022 04:51:15 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Wed, 14 Sep 2022 04:51:15 -0500 Received: from uda0492258.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 28E9osD3046564; Wed, 14 Sep 2022 04:51:10 -0500 From: Siddharth Vadapalli To: , , , , , , , , , , , CC: , , , , , Subject: [PATCH 3/8] net: ethernet: ti: am65-cpsw: Add mac control function Date: Wed, 14 Sep 2022 15:20:48 +0530 Message-ID: <20220914095053.189851-4-s-vadapalli@ti.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220914095053.189851-1-s-vadapalli@ti.com> References: <20220914095053.189851-1-s-vadapalli@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add function am65_cpsw_nuss_mac_control() corresponding to the mac control register writes that are performed in the am65_cpsw_nuss_mac_link_up() function and use it in the am65_cpsw_nuss_mac_link_up() function. The newly added function will be used in am65_cpsw_nuss_mac_config() function in a future patch, thereby making it necessary to define a new function for the redundant mac control operations. Signed-off-by: Siddharth Vadapalli --- drivers/net/ethernet/ti/am65-cpsw-nuss.c | 45 ++++++++++++++---------- 1 file changed, 26 insertions(+), 19 deletions(-) diff --git a/drivers/net/ethernet/ti/am65-cpsw-nuss.c b/drivers/net/ethernet/ti/am65-cpsw-nuss.c index 4e06def3b0de..c7e6ad374e1a 100644 --- a/drivers/net/ethernet/ti/am65-cpsw-nuss.c +++ b/drivers/net/ethernet/ti/am65-cpsw-nuss.c @@ -1448,6 +1448,31 @@ static int am65_cpsw_init_phy(struct device *dev, struct device_node *port_np) return ret; } +static void am65_cpsw_nuss_mac_control(struct am65_cpsw_port *port, phy_interface_t interface, + int speed, int duplex, bool tx_pause, bool rx_pause) +{ + u32 mac_control = CPSW_SL_CTL_GMII_EN; + + if (speed == SPEED_1000) + mac_control |= CPSW_SL_CTL_GIG; + if (speed == SPEED_10 && interface == PHY_INTERFACE_MODE_RGMII) + /* Can be used with in band mode only */ + mac_control |= CPSW_SL_CTL_EXT_EN; + if (speed == SPEED_100 && interface == PHY_INTERFACE_MODE_RMII) + mac_control |= CPSW_SL_CTL_IFCTL_A; + if (duplex) + mac_control |= CPSW_SL_CTL_FULLDUPLEX; + + /* rx_pause/tx_pause */ + if (rx_pause) + mac_control |= CPSW_SL_CTL_RX_FLOW_EN; + + if (tx_pause) + mac_control |= CPSW_SL_CTL_TX_FLOW_EN; + + cpsw_sl_ctl_set(port->slave.mac_sl, mac_control); +} + static void am65_cpsw_nuss_mac_config(struct phylink_config *config, unsigned int mode, const struct phylink_link_state *state) { @@ -1497,27 +1522,9 @@ static void am65_cpsw_nuss_mac_link_up(struct phylink_config *config, struct phy phylink_config); struct am65_cpsw_port *port = container_of(slave, struct am65_cpsw_port, slave); struct am65_cpsw_common *common = port->common; - u32 mac_control = CPSW_SL_CTL_GMII_EN; struct net_device *ndev = port->ndev; - if (speed == SPEED_1000) - mac_control |= CPSW_SL_CTL_GIG; - if (speed == SPEED_10 && interface == PHY_INTERFACE_MODE_RGMII) - /* Can be used with in band mode only */ - mac_control |= CPSW_SL_CTL_EXT_EN; - if (speed == SPEED_100 && interface == PHY_INTERFACE_MODE_RMII) - mac_control |= CPSW_SL_CTL_IFCTL_A; - if (duplex) - mac_control |= CPSW_SL_CTL_FULLDUPLEX; - - /* rx_pause/tx_pause */ - if (rx_pause) - mac_control |= CPSW_SL_CTL_RX_FLOW_EN; - - if (tx_pause) - mac_control |= CPSW_SL_CTL_TX_FLOW_EN; - - cpsw_sl_ctl_set(port->slave.mac_sl, mac_control); + am65_cpsw_nuss_mac_control(port, interface, speed, duplex, tx_pause, rx_pause); /* enable phy */ am65_cpsw_enable_phy(port->slave.ifphy); From patchwork Wed Sep 14 09:50:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Siddharth Vadapalli X-Patchwork-Id: 606776 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 79C89C6FA86 for ; Wed, 14 Sep 2022 09:52:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231717AbiINJwi (ORCPT ); Wed, 14 Sep 2022 05:52:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52956 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231248AbiINJwQ (ORCPT ); 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Wed, 14 Sep 2022 04:51:36 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Wed, 14 Sep 2022 04:51:36 -0500 Received: from uda0492258.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 28E9osD7046564; Wed, 14 Sep 2022 04:51:31 -0500 From: Siddharth Vadapalli To: , , , , , , , , , , , CC: , , , , , Subject: [PATCH 7/8] net: ethernet: ti: am65-cpsw: Add support for J721e CPSW9G Date: Wed, 14 Sep 2022 15:20:52 +0530 Message-ID: <20220914095053.189851-8-s-vadapalli@ti.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220914095053.189851-1-s-vadapalli@ti.com> References: <20220914095053.189851-1-s-vadapalli@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org CPSW9G in J721e supports additional modes like QSGMII and SGMII. Add new compatible for J721e in am65-cpsw driver. Signed-off-by: Siddharth Vadapalli --- drivers/net/ethernet/ti/am65-cpsw-nuss.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/net/ethernet/ti/am65-cpsw-nuss.c b/drivers/net/ethernet/ti/am65-cpsw-nuss.c index 3f40178436ff..65114f233550 100644 --- a/drivers/net/ethernet/ti/am65-cpsw-nuss.c +++ b/drivers/net/ethernet/ti/am65-cpsw-nuss.c @@ -2760,11 +2760,19 @@ static const struct am65_cpsw_pdata j7200_cpswxg_pdata = { .extra_modes = BIT(PHY_INTERFACE_MODE_QSGMII) | BIT(PHY_INTERFACE_MODE_SGMII), }; +static const struct am65_cpsw_pdata j721e_cpswxg_pdata = { + .quirks = 0, + .ale_dev_id = "am64-cpswxg", + .fdqring_mode = K3_RINGACC_RING_MODE_MESSAGE, + .extra_modes = BIT(PHY_INTERFACE_MODE_QSGMII), +}; + static const struct of_device_id am65_cpsw_nuss_of_mtable[] = { { .compatible = "ti,am654-cpsw-nuss", .data = &am65x_sr1_0}, { .compatible = "ti,j721e-cpsw-nuss", .data = &j721e_pdata}, { .compatible = "ti,am642-cpsw-nuss", .data = &am64x_cpswxg_pdata}, { .compatible = "ti,j7200-cpswxg-nuss", .data = &j7200_cpswxg_pdata}, + { .compatible = "ti,j721e-cpswxg-nuss", .data = &j721e_cpswxg_pdata}, { /* sentinel */ }, }; MODULE_DEVICE_TABLE(of, am65_cpsw_nuss_of_mtable);