From patchwork Fri Sep 16 02:03:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiucheng Xu X-Patchwork-Id: 606622 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 967EDC32771 for ; Fri, 16 Sep 2022 02:03:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229452AbiIPCDk (ORCPT ); Thu, 15 Sep 2022 22:03:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58996 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229881AbiIPCDh (ORCPT ); Thu, 15 Sep 2022 22:03:37 -0400 Received: from mail-sh.amlogic.com (mail-sh.amlogic.com [58.32.228.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AF38F80F5A; Thu, 15 Sep 2022 19:03:35 -0700 (PDT) Received: from droid01-xa.amlogic.com (10.88.11.200) by mail-sh.amlogic.com (10.18.11.5) with Microsoft SMTP Server id 15.1.2507.9; Fri, 16 Sep 2022 10:03:27 +0800 From: Jiucheng Xu To: , , , CC: Rob Herring , Krzysztof Kozlowski , Will Deacon , Mark Rutland , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Chris Healy , Jianxin Pan , Kelvin Zhang , Jiucheng Xu Subject: [PATCH v8 2/4] docs/perf: Add documentation for the Amlogic G12 DDR PMU Date: Fri, 16 Sep 2022 10:03:18 +0800 Message-ID: <20220916020320.2455580-2-jiucheng.xu@amlogic.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220916020320.2455580-1-jiucheng.xu@amlogic.com> References: <20220916020320.2455580-1-jiucheng.xu@amlogic.com> MIME-Version: 1.0 X-Originating-IP: [10.88.11.200] Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add a user guide to show how to use DDR PMU to monitor DDR bandwidth on Amlogic G12 SoC Signed-off-by: Jiucheng Xu --- Changes v7 -> v8: - No change Changes v6 -> v7: - Drop the Reported-by tag - Fix spelling error Changes v5 -> v6: - No change Changes v4 -> v5: - Fix building warning Changes v3 -> v4: - No change Changes v2 -> v3: - Rename doc name from aml-ddr-pmu.rst to meson-ddr-pmu.rst Changes v1 -> v2: - Nothing was changed --- Documentation/admin-guide/perf/index.rst | 1 + .../admin-guide/perf/meson-ddr-pmu.rst | 70 +++++++++++++++++++ MAINTAINERS | 1 + 3 files changed, 72 insertions(+) create mode 100644 Documentation/admin-guide/perf/meson-ddr-pmu.rst diff --git a/Documentation/admin-guide/perf/index.rst b/Documentation/admin-guide/perf/index.rst index 69b23f087c05..997a28e156c1 100644 --- a/Documentation/admin-guide/perf/index.rst +++ b/Documentation/admin-guide/perf/index.rst @@ -17,3 +17,4 @@ Performance monitor support xgene-pmu arm_dsu_pmu thunderx2-pmu + meson-ddr-pmu diff --git a/Documentation/admin-guide/perf/meson-ddr-pmu.rst b/Documentation/admin-guide/perf/meson-ddr-pmu.rst new file mode 100644 index 000000000000..15e93a751ced --- /dev/null +++ b/Documentation/admin-guide/perf/meson-ddr-pmu.rst @@ -0,0 +1,70 @@ +.. SPDX-License-Identifier: GPL-2.0 + +=========================================================== +Amlogic SoC DDR Bandwidth Performance Monitoring Unit (PMU) +=========================================================== + +There is a bandwidth monitor inside the DRAM controller. The monitor includes +4 channels which can count the read/write request of accessing DRAM individually. +It can be helpful to show if the performance bottleneck is on DDR bandwidth. + +Currently, this driver supports the following 5 Perf events: + ++ meson_ddr_bw/total_rw_bytes/ ++ meson_ddr_bw/chan_1_rw_bytes/ ++ meson_ddr_bw/chan_2_rw_bytes/ ++ meson_ddr_bw/chan_3_rw_bytes/ ++ meson_ddr_bw/chan_4_rw_bytes/ + +meson_ddr_bw/chan_{1,2,3,4}_rw_bytes/ events are the channel related events. +Each channel support using keywords as filter, which can let the channel +to monitor the individual IP module in SoC. + +The following keywords are the filter: + ++ arm - DDR access request from CPU ++ vpu_read1 - DDR access request from OSD + VPP read ++ gpu - DDR access request from 3D GPU ++ pcie - DDR access request from PCIe controller ++ hdcp - DDR access request from HDCP controller ++ hevc_front - DDR access request from HEVC codec front end ++ usb3_0 - DDR access request from USB3.0 controller ++ hevc_back - DDR access request from HEVC codec back end ++ h265enc - DDR access request from HEVC encoder ++ vpu_read2 - DDR access request from DI read ++ vpu_write1 - DDR access request from VDIN write ++ vpu_write2 - DDR access request from di write ++ vdec - DDR access request from legacy codec video decoder ++ hcodec - DDR access request from H264 encoder ++ ge2d - DDR access request from ge2d ++ spicc1 - DDR access request from SPI controller 1 ++ usb0 - DDR access request from USB2.0 controller 0 ++ dma - DDR access request from system DMA controller 1 ++ arb0 - DDR access request from arb0 ++ sd_emmc_b - DDR access request from SD eMMC b controller ++ usb1 - DDR access request from USB2.0 controller 1 ++ audio - DDR access request from Audio module ++ sd_emmc_c - DDR access request from SD eMMC c controller ++ spicc2 - DDR access request from SPI controller 2 ++ ethernet - DDR access request from Ethernet controller + + +The following command is to show the total DDR bandwidth: + + .. code-block:: bash + + perf stat -a -e meson_ddr_bw/total_rw_bytes/ -I 1000 sleep 10 + +This command will print the total DDR bandwidth per second. + +The following commands are to show how to use filter parameters: + + .. code-block:: bash + + perf stat -a -e meson_ddr_bw/chan_1_rw_bytes,arm=1/ -I 1000 sleep 10 + perf stat -a -e meson_ddr_bw/chan_2_rw_bytes,gpu=1/ -I 1000 sleep 10 + perf stat -a -e meson_ddr_bw/chan_3_rw_bytes,arm=1,gpu=1/ -I 1000 sleep 10 + +The 1st command show how to use channel 1 to monitor the DDR bandwidth from ARM. +The 2nd command show using channel 2 to get the DDR bandwidth of GPU. +The 3rd command show using channel 3 to monitor the sum of ARM and GPU. diff --git a/MAINTAINERS b/MAINTAINERS index eb63b9cbc149..5ed563368a48 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1055,6 +1055,7 @@ M: Jiucheng Xu L: linux-amlogic@lists.infradead.org S: Supported W: http://www.amlogic.com +F: Documentation/admin-guide/perf/meson-ddr-pmu.rst F: drivers/perf/amlogic/ F: include/soc/amlogic/ From patchwork Fri Sep 16 02:03:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiucheng Xu X-Patchwork-Id: 606621 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A2A84C6FA90 for ; Fri, 16 Sep 2022 02:03:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229627AbiIPCDm (ORCPT ); Thu, 15 Sep 2022 22:03:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59026 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229483AbiIPCDk (ORCPT ); Thu, 15 Sep 2022 22:03:40 -0400 Received: from mail-sh.amlogic.com (mail-sh.amlogic.com [58.32.228.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3794A31343; Thu, 15 Sep 2022 19:03:39 -0700 (PDT) Received: from droid01-xa.amlogic.com (10.88.11.200) by mail-sh.amlogic.com (10.18.11.5) with Microsoft SMTP Server id 15.1.2507.9; Fri, 16 Sep 2022 10:03:29 +0800 From: Jiucheng Xu To: , , , CC: Rob Herring , Krzysztof Kozlowski , Will Deacon , Mark Rutland , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Chris Healy , Jianxin Pan , Kelvin Zhang , Jiucheng Xu Subject: [PATCH v8 4/4] arm64: dts: meson: Add DDR PMU node Date: Fri, 16 Sep 2022 10:03:20 +0800 Message-ID: <20220916020320.2455580-4-jiucheng.xu@amlogic.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220916020320.2455580-1-jiucheng.xu@amlogic.com> References: <20220916020320.2455580-1-jiucheng.xu@amlogic.com> MIME-Version: 1.0 X-Originating-IP: [10.88.11.200] Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add DDR PMU device node for G12 series SoC Signed-off-by: Jiucheng Xu Reviewed-by: Neil Armstrong --- Changes v7 -> v8: - No change Changes v6 -> v7: - No change Changes v5 -> v6: - No change Changes v4 -> v5: - Split reg into two items - Alphabet order location Changes v3 -> v4: - No change Changes v2 -> v3: - No change Changes v1 -> v2: - Remove model, dmc_nr, chann_nr properties - Add g12a-ddr-pmu, g12b-ddr-pmu, sm1-ddr-pmu compatibles as identifier --- arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 6 ++++++ arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 4 ++++ arch/arm64/boot/dts/amlogic/meson-g12b.dtsi | 4 ++++ arch/arm64/boot/dts/amlogic/meson-sm1.dtsi | 4 ++++ 4 files changed, 18 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi index 45947c1031c4..9dbd50820b1c 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi @@ -1705,6 +1705,12 @@ internal_ephy: ethernet_phy@8 { }; }; + pmu: pmu@ff638000 { + reg = <0x0 0xff638000 0x0 0x100>, + <0x0 0xff638c00 0x0 0x100>; + interrupts = ; + }; + aobus: bus@ff800000 { compatible = "simple-bus"; reg = <0x0 0xff800000 0x0 0x100000>; diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi index fb0ab27d1f64..0e8b57283f31 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi @@ -133,3 +133,7 @@ map1 { }; }; }; + +&pmu { + compatible = "amlogic,g12a-ddr-pmu"; +}; diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi index ee8fcae9f9f0..18791ef51f58 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi @@ -139,3 +139,7 @@ map1 { &mali { dma-coherent; }; + +&pmu { + compatible = "amlogic,g12b-ddr-pmu"; +}; diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi index 80737731af3f..c307b34ccd72 100644 --- a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi @@ -520,6 +520,10 @@ &pcie { power-domains = <&pwrc PWRC_SM1_PCIE_ID>; }; +&pmu { + compatible = "amlogic,sm1-ddr-pmu"; +}; + &pwrc { compatible = "amlogic,meson-sm1-pwrc"; };