From patchwork Thu Sep 15 23:34:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Li X-Patchwork-Id: 606627 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DB766ECAAA1 for ; Thu, 15 Sep 2022 23:34:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229683AbiIOXep (ORCPT ); Thu, 15 Sep 2022 19:34:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46876 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229497AbiIOXen (ORCPT ); Thu, 15 Sep 2022 19:34:43 -0400 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CFC309FF2; Thu, 15 Sep 2022 16:34:40 -0700 (PDT) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id D56D5205BAE; Fri, 16 Sep 2022 01:34:38 +0200 (CEST) Received: from smtp.na-rdc02.nxp.com (usphx01srsp001v.us-phx01.nxp.com [134.27.49.11]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 95453205BA5; Fri, 16 Sep 2022 01:34:38 +0200 (CEST) Received: from right.am.freescale.net (right.am.freescale.net [10.81.116.134]) by usphx01srsp001v.us-phx01.nxp.com (Postfix) with ESMTP id 4C5A14060A; Thu, 15 Sep 2022 16:34:37 -0700 (MST) From: Li Yang To: shawnguo@kernel.org, devicetree@vger.kernel.org Cc: robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Li Yang , Ran Wang Subject: [PATCH v2 1/9] arm64: dts: ls1046a: Enable usb3-lpm-capable for usb3 node Date: Thu, 15 Sep 2022 18:34:24 -0500 Message-Id: <20220915233432.31660-2-leoyang.li@nxp.com> X-Mailer: git-send-email 2.25.1.377.g2d2118b In-Reply-To: <20220915233432.31660-1-leoyang.li@nxp.com> References: <20220915233432.31660-1-leoyang.li@nxp.com> MIME-Version: 1.0 X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Enable USB3 HW LPM feature for ls1046a. Signed-off-by: Ran Wang Signed-off-by: Li Yang --- arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi index feab604322cf..ddae3cb0a977 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi @@ -717,6 +717,7 @@ usb0: usb@2f00000 { snps,quirk-frame-length-adjustment = <0x20>; snps,dis_rxdet_inp3_quirk; snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; + usb3-lpm-capable; }; usb1: usb@3000000 { @@ -727,6 +728,7 @@ usb1: usb@3000000 { snps,quirk-frame-length-adjustment = <0x20>; snps,dis_rxdet_inp3_quirk; snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; + usb3-lpm-capable; }; usb2: usb@3100000 { @@ -737,6 +739,7 @@ usb2: usb@3100000 { snps,quirk-frame-length-adjustment = <0x20>; snps,dis_rxdet_inp3_quirk; snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; + usb3-lpm-capable; }; sata: sata@3200000 { From patchwork Thu Sep 15 23:34:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Li X-Patchwork-Id: 606324 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8C445C6FA8B for ; Thu, 15 Sep 2022 23:34:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229727AbiIOXeq (ORCPT ); Thu, 15 Sep 2022 19:34:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46878 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229533AbiIOXen (ORCPT ); Thu, 15 Sep 2022 19:34:43 -0400 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E2F13A456; Thu, 15 Sep 2022 16:34:40 -0700 (PDT) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id A0B2E205BAF; Fri, 16 Sep 2022 01:34:39 +0200 (CEST) Received: from smtp.na-rdc02.nxp.com (usphx01srsp001v.us-phx01.nxp.com [134.27.49.11]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 61291205BAD; Fri, 16 Sep 2022 01:34:39 +0200 (CEST) Received: from right.am.freescale.net (right.am.freescale.net [10.81.116.134]) by usphx01srsp001v.us-phx01.nxp.com (Postfix) with ESMTP id 217C840AA3; Thu, 15 Sep 2022 16:34:38 -0700 (MST) From: Li Yang To: shawnguo@kernel.org, devicetree@vger.kernel.org Cc: robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Xiaowei Bao , Li Yang Subject: [PATCH v2 2/9] arm64: dts: ls1046a: Add the PME interrupt and big-endian to PCIe EP nodes Date: Thu, 15 Sep 2022 18:34:25 -0500 Message-Id: <20220915233432.31660-3-leoyang.li@nxp.com> X-Mailer: git-send-email 2.25.1.377.g2d2118b In-Reply-To: <20220915233432.31660-1-leoyang.li@nxp.com> References: <20220915233432.31660-1-leoyang.li@nxp.com> MIME-Version: 1.0 X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Xiaowei Bao Add the PME interrupt porperty and big-endian property in PCIe EP nodes. Signed-off-by: Xiaowei Bao Signed-off-by: Li Yang --- arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi index ddae3cb0a977..8002d83b341b 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi @@ -813,8 +813,11 @@ pcie_ep1: pcie_ep@3400000 { reg = <0x00 0x03400000 0x0 0x00100000>, <0x40 0x00000000 0x8 0x00000000>; reg-names = "regs", "addr_space"; + interrupts = ; + interrupt-names = "pme"; num-ib-windows = <6>; num-ob-windows = <8>; + big-endian; status = "disabled"; }; @@ -849,8 +852,11 @@ pcie_ep2: pcie_ep@3500000 { reg = <0x00 0x03500000 0x0 0x00100000>, <0x48 0x00000000 0x8 0x00000000>; reg-names = "regs", "addr_space"; + interrupts = ; + interrupt-names = "pme"; num-ib-windows = <6>; num-ob-windows = <8>; + big-endian; status = "disabled"; }; @@ -885,8 +891,11 @@ pcie_ep3: pcie_ep@3600000 { reg = <0x00 0x03600000 0x0 0x00100000>, <0x50 0x00000000 0x8 0x00000000>; reg-names = "regs", "addr_space"; + interrupts = ; + interrupt-names = "pme"; num-ib-windows = <6>; num-ob-windows = <8>; + big-endian; status = "disabled"; }; From patchwork Thu Sep 15 23:34:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Li X-Patchwork-Id: 606626 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 75C15C6FA92 for ; Thu, 15 Sep 2022 23:34:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229815AbiIOXer (ORCPT ); Thu, 15 Sep 2022 19:34:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46882 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229553AbiIOXen (ORCPT ); Thu, 15 Sep 2022 19:34:43 -0400 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 67857AE5C; Thu, 15 Sep 2022 16:34:41 -0700 (PDT) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 21AA2205BA5; Fri, 16 Sep 2022 01:34:40 +0200 (CEST) Received: from smtp.na-rdc02.nxp.com (usphx01srsp001v.us-phx01.nxp.com [134.27.49.11]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id D5652205BAD; Fri, 16 Sep 2022 01:34:39 +0200 (CEST) Received: from right.am.freescale.net (right.am.freescale.net [10.81.116.134]) by usphx01srsp001v.us-phx01.nxp.com (Postfix) with ESMTP id E0AB74060A; Thu, 15 Sep 2022 16:34:38 -0700 (MST) From: Li Yang To: shawnguo@kernel.org, devicetree@vger.kernel.org Cc: robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Hou Zhiqiang , Li Yang Subject: [PATCH v2 3/9] arm64: dts: ls1046a: Add big-endian property for PCIe nodes Date: Thu, 15 Sep 2022 18:34:26 -0500 Message-Id: <20220915233432.31660-4-leoyang.li@nxp.com> X-Mailer: git-send-email 2.25.1.377.g2d2118b In-Reply-To: <20220915233432.31660-1-leoyang.li@nxp.com> References: <20220915233432.31660-1-leoyang.li@nxp.com> MIME-Version: 1.0 X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Hou Zhiqiang Add the big-endian property for LS1046A PCIe RC nodes. Signed-off-by: Hou Zhiqiang Signed-off-by: Li Yang --- arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi index 8002d83b341b..a0619a45f3b8 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi @@ -805,6 +805,7 @@ pcie1: pcie@3400000 { <0000 0 0 2 &gic GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, <0000 0 0 3 &gic GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, <0000 0 0 4 &gic GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; + big-endian; status = "disabled"; }; @@ -844,6 +845,7 @@ pcie2: pcie@3500000 { <0000 0 0 2 &gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, <0000 0 0 3 &gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, <0000 0 0 4 &gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; + big-endian; status = "disabled"; }; @@ -883,6 +885,7 @@ pcie3: pcie@3600000 { <0000 0 0 2 &gic GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>, <0000 0 0 3 &gic GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>, <0000 0 0 4 &gic GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; + big-endian; status = "disabled"; }; From patchwork Thu Sep 15 23:34:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Li X-Patchwork-Id: 606625 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BFBBEC6FA90 for ; Thu, 15 Sep 2022 23:34:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229820AbiIOXeq (ORCPT ); Thu, 15 Sep 2022 19:34:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46884 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229564AbiIOXen (ORCPT ); Thu, 15 Sep 2022 19:34:43 -0400 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4A7ABAE7B; Thu, 15 Sep 2022 16:34:42 -0700 (PDT) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id E41F1205BA6; Fri, 16 Sep 2022 01:34:40 +0200 (CEST) Received: from smtp.na-rdc02.nxp.com (usphx01srsp001v.us-phx01.nxp.com [134.27.49.11]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id A45A2205BAD; Fri, 16 Sep 2022 01:34:40 +0200 (CEST) Received: from right.am.freescale.net (right.am.freescale.net [10.81.116.134]) by usphx01srsp001v.us-phx01.nxp.com (Postfix) with ESMTP id AB4404060D; Thu, 15 Sep 2022 16:34:39 -0700 (MST) From: Li Yang To: shawnguo@kernel.org, devicetree@vger.kernel.org Cc: robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Laurentiu Tudor , Li Yang Subject: [PATCH v2 4/9] arm64: dts: ls1046a: add missing dma ranges property Date: Thu, 15 Sep 2022 18:34:27 -0500 Message-Id: <20220915233432.31660-5-leoyang.li@nxp.com> X-Mailer: git-send-email 2.25.1.377.g2d2118b In-Reply-To: <20220915233432.31660-1-leoyang.li@nxp.com> References: <20220915233432.31660-1-leoyang.li@nxp.com> MIME-Version: 1.0 X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Laurentiu Tudor These chips have a 48-bit address size so make sure that the dma-ranges reflects this. Otherwise the linux kernel's dma sub-system will set the default dma masks to full 64-bit, badly breaking dmas. Signed-off-by: Laurentiu Tudor Signed-off-by: Li Yang --- arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi index a0619a45f3b8..27033c558e3e 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi @@ -272,6 +272,7 @@ soc: soc { #address-cells = <2>; #size-cells = <2>; ranges; + dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>; ddr: memory-controller@1080000 { compatible = "fsl,qoriq-memory-controller"; From patchwork Thu Sep 15 23:34:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Li X-Patchwork-Id: 606322 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D8464C6FA90 for ; Thu, 15 Sep 2022 23:34:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229894AbiIOXet (ORCPT ); Thu, 15 Sep 2022 19:34:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47132 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229761AbiIOXeq (ORCPT ); Thu, 15 Sep 2022 19:34:46 -0400 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DF58DA456; Thu, 15 Sep 2022 16:34:44 -0700 (PDT) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 08FB6205BB1; Fri, 16 Sep 2022 01:34:42 +0200 (CEST) Received: from smtp.na-rdc02.nxp.com (usphx01srsp001v.us-phx01.nxp.com [134.27.49.11]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id BBCA1205BAD; Fri, 16 Sep 2022 01:34:41 +0200 (CEST) Received: from right.am.freescale.net (right.am.freescale.net [10.81.116.134]) by usphx01srsp001v.us-phx01.nxp.com (Postfix) with ESMTP id 7EDC14060A; Thu, 15 Sep 2022 16:34:40 -0700 (MST) From: Li Yang To: shawnguo@kernel.org, devicetree@vger.kernel.org Cc: robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Li Yang , Laurentiu Tudor Subject: [PATCH v2 5/9] arm64: dts: ls1046a: make dma-coherent global to the SoC Date: Thu, 15 Sep 2022 18:34:28 -0500 Message-Id: <20220915233432.31660-6-leoyang.li@nxp.com> X-Mailer: git-send-email 2.25.1.377.g2d2118b In-Reply-To: <20220915233432.31660-1-leoyang.li@nxp.com> References: <20220915233432.31660-1-leoyang.li@nxp.com> MIME-Version: 1.0 X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org These SoCs are really completely dma coherent in their entirety so add the dma-coherent property at the soc level in the device tree and drop the instances where it's specifically added to a few select devices. Signed-off-by: Laurentiu Tudor Signed-off-by: Li Yang --- arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi index 27033c558e3e..e406499a26b4 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi @@ -273,6 +273,7 @@ soc: soc { #size-cells = <2>; ranges; dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>; + dma-coherent; ddr: memory-controller@1080000 { compatible = "fsl,qoriq-memory-controller"; @@ -355,7 +356,6 @@ crypto: crypto@1700000 { ranges = <0x0 0x00 0x1700000 0x100000>; reg = <0x00 0x1700000 0x0 0x100000>; interrupts = ; - dma-coherent; sec_jr0: jr@10000 { compatible = "fsl,sec-v5.4-job-ring", @@ -794,7 +794,6 @@ pcie1: pcie@3400000 { #address-cells = <3>; #size-cells = <2>; device_type = "pci"; - dma-coherent; num-viewport = <8>; bus-range = <0x0 0xff>; ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */ @@ -834,7 +833,6 @@ pcie2: pcie@3500000 { #address-cells = <3>; #size-cells = <2>; device_type = "pci"; - dma-coherent; num-viewport = <8>; bus-range = <0x0 0xff>; ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */ @@ -874,7 +872,6 @@ pcie3: pcie@3600000 { #address-cells = <3>; #size-cells = <2>; device_type = "pci"; - dma-coherent; num-viewport = <8>; bus-range = <0x0 0xff>; ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000 /* downstream I/O */ From patchwork Thu Sep 15 23:34:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Li X-Patchwork-Id: 606323 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D82A9ECAAA1 for ; Thu, 15 Sep 2022 23:34:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229863AbiIOXes (ORCPT ); Thu, 15 Sep 2022 19:34:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47124 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229758AbiIOXeq (ORCPT ); Thu, 15 Sep 2022 19:34:46 -0400 Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DEC8D9FF2; Thu, 15 Sep 2022 16:34:44 -0700 (PDT) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 0E29B1A22F0; Fri, 16 Sep 2022 01:34:43 +0200 (CEST) Received: from smtp.na-rdc02.nxp.com (usphx01srsp001v.us-phx01.nxp.com [134.27.49.11]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 9C4911A22E5; Fri, 16 Sep 2022 01:34:42 +0200 (CEST) Received: from right.am.freescale.net (right.am.freescale.net [10.81.116.134]) by usphx01srsp001v.us-phx01.nxp.com (Postfix) with ESMTP id 4ACA44060D; Thu, 15 Sep 2022 16:34:41 -0700 (MST) From: Li Yang To: shawnguo@kernel.org, devicetree@vger.kernel.org Cc: robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Laurentiu Tudor , Robin Murphy , Li Yang Subject: [PATCH v2 6/9] arm64: dts: ls1046a: use a pseudo-bus to constrain usb and sata dma size Date: Thu, 15 Sep 2022 18:34:29 -0500 Message-Id: <20220915233432.31660-7-leoyang.li@nxp.com> X-Mailer: git-send-email 2.25.1.377.g2d2118b In-Reply-To: <20220915233432.31660-1-leoyang.li@nxp.com> References: <20220915233432.31660-1-leoyang.li@nxp.com> MIME-Version: 1.0 X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Laurentiu Tudor Wrap the usb and sata controllers in an intermediate simple-bus and use it to constrain the dma address size of these usb controllers to the 40 bits that they generate toward the interconnect. This is required because the SoC uses 48 bits address sizes and this mismatch would lead to smmu context faults because the usb generates 40-bit addresses while the smmu page tables are populated with 48-bit wide addresses. Suggested-by: Robin Murphy Signed-off-by: Laurentiu Tudor Signed-off-by: Li Yang --- .../arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 90 ++++++++++--------- 1 file changed, 49 insertions(+), 41 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi index e406499a26b4..132d7893b4b8 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi @@ -710,47 +710,55 @@ QORIQ_CLK_PLL_DIV(2)>, QORIQ_CLK_PLL_DIV(2)>; }; - usb0: usb@2f00000 { - compatible = "snps,dwc3"; - reg = <0x0 0x2f00000 0x0 0x10000>; - interrupts = ; - dr_mode = "host"; - snps,quirk-frame-length-adjustment = <0x20>; - snps,dis_rxdet_inp3_quirk; - snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; - usb3-lpm-capable; - }; - - usb1: usb@3000000 { - compatible = "snps,dwc3"; - reg = <0x0 0x3000000 0x0 0x10000>; - interrupts = ; - dr_mode = "host"; - snps,quirk-frame-length-adjustment = <0x20>; - snps,dis_rxdet_inp3_quirk; - snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; - usb3-lpm-capable; - }; - - usb2: usb@3100000 { - compatible = "snps,dwc3"; - reg = <0x0 0x3100000 0x0 0x10000>; - interrupts = ; - dr_mode = "host"; - snps,quirk-frame-length-adjustment = <0x20>; - snps,dis_rxdet_inp3_quirk; - snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; - usb3-lpm-capable; - }; - - sata: sata@3200000 { - compatible = "fsl,ls1046a-ahci"; - reg = <0x0 0x3200000 0x0 0x10000>, - <0x0 0x20140520 0x0 0x4>; - reg-names = "ahci", "sata-ecc"; - interrupts = ; - clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL - QORIQ_CLK_PLL_DIV(2)>; + aux_bus: aux_bus { + #address-cells = <2>; + #size-cells = <2>; + compatible = "simple-bus"; + ranges; + dma-ranges = <0x0 0x0 0x0 0x0 0x100 0x00000000>; + + usb0: usb@2f00000 { + compatible = "snps,dwc3"; + reg = <0x0 0x2f00000 0x0 0x10000>; + interrupts = ; + dr_mode = "host"; + snps,quirk-frame-length-adjustment = <0x20>; + snps,dis_rxdet_inp3_quirk; + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; + usb3-lpm-capable; + }; + + usb1: usb@3000000 { + compatible = "snps,dwc3"; + reg = <0x0 0x3000000 0x0 0x10000>; + interrupts = ; + dr_mode = "host"; + snps,quirk-frame-length-adjustment = <0x20>; + snps,dis_rxdet_inp3_quirk; + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; + usb3-lpm-capable; + }; + + usb2: usb@3100000 { + compatible = "snps,dwc3"; + reg = <0x0 0x3100000 0x0 0x10000>; + interrupts = ; + dr_mode = "host"; + snps,quirk-frame-length-adjustment = <0x20>; + snps,dis_rxdet_inp3_quirk; + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; + usb3-lpm-capable; + }; + + sata: sata@3200000 { + compatible = "fsl,ls1046a-ahci"; + reg = <0x0 0x3200000 0x0 0x10000>, + <0x0 0x20140520 0x0 0x4>; + reg-names = "ahci", "sata-ecc"; + interrupts = ; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(2)>; + }; }; msi1: msi-controller@1580000 { From patchwork Thu Sep 15 23:34:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Li X-Patchwork-Id: 606624 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C63E0C32771 for ; Thu, 15 Sep 2022 23:34:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229889AbiIOXes (ORCPT ); Thu, 15 Sep 2022 19:34:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47134 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229768AbiIOXeq (ORCPT ); Thu, 15 Sep 2022 19:34:46 -0400 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4C4A5AE5C; Thu, 15 Sep 2022 16:34:45 -0700 (PDT) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 0C90E205BB9; Fri, 16 Sep 2022 01:34:44 +0200 (CEST) Received: from smtp.na-rdc02.nxp.com (usphx01srsp001v.us-phx01.nxp.com [134.27.49.11]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id BDF61205BBA; Fri, 16 Sep 2022 01:34:43 +0200 (CEST) Received: from right.am.freescale.net (right.am.freescale.net [10.81.116.134]) by usphx01srsp001v.us-phx01.nxp.com (Postfix) with ESMTP id 265AB4060A; Thu, 15 Sep 2022 16:34:42 -0700 (MST) From: Li Yang To: shawnguo@kernel.org, devicetree@vger.kernel.org Cc: robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Li Yang , Zhang Ying Subject: [PATCH v2 7/9] arm64: dts: ls1046a: add gpios based i2c recovery information Date: Thu, 15 Sep 2022 18:34:30 -0500 Message-Id: <20220915233432.31660-8-leoyang.li@nxp.com> X-Mailer: git-send-email 2.25.1.377.g2d2118b In-Reply-To: <20220915233432.31660-1-leoyang.li@nxp.com> References: <20220915233432.31660-1-leoyang.li@nxp.com> MIME-Version: 1.0 X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add scl-gpios property for i2c recovery and add SoC specific compatible string for SoC specific fixup. Signed-off-by: Zhang Ying Signed-off-by: Li Yang --- arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi index 132d7893b4b8..3d9e29824bb2 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi @@ -11,6 +11,7 @@ #include #include #include +#include / { compatible = "fsl,ls1046a"; @@ -501,7 +502,7 @@ dspi: spi@2100000 { }; i2c0: i2c@2180000 { - compatible = "fsl,vf610-i2c"; + compatible = "fsl,ls1046a-i2c", "fsl,vf610-i2c"; #address-cells = <1>; #size-cells = <0>; reg = <0x0 0x2180000 0x0 0x10000>; @@ -515,35 +516,38 @@ i2c0: i2c@2180000 { }; i2c1: i2c@2190000 { - compatible = "fsl,vf610-i2c"; + compatible = "fsl,ls1046a-i2c", "fsl,vf610-i2c"; #address-cells = <1>; #size-cells = <0>; reg = <0x0 0x2190000 0x0 0x10000>; interrupts = ; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(2)>; + scl-gpios = <&gpio3 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; status = "disabled"; }; i2c2: i2c@21a0000 { - compatible = "fsl,vf610-i2c"; + compatible = "fsl,ls1046a-i2c", "fsl,vf610-i2c"; #address-cells = <1>; #size-cells = <0>; reg = <0x0 0x21a0000 0x0 0x10000>; interrupts = ; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(2)>; + scl-gpios = <&gpio3 10 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; status = "disabled"; }; i2c3: i2c@21b0000 { - compatible = "fsl,vf610-i2c"; + compatible = "fsl,ls1046a-i2c", "fsl,vf610-i2c"; #address-cells = <1>; #size-cells = <0>; reg = <0x0 0x21b0000 0x0 0x10000>; interrupts = ; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(2)>; + scl-gpios = <&gpio3 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; status = "disabled"; }; From patchwork Thu Sep 15 23:34:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Li X-Patchwork-Id: 606321 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id ADCAAC32771 for ; Thu, 15 Sep 2022 23:34:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229926AbiIOXew (ORCPT ); Thu, 15 Sep 2022 19:34:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47214 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229696AbiIOXer (ORCPT ); Thu, 15 Sep 2022 19:34:47 -0400 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E8A73D10F; Thu, 15 Sep 2022 16:34:45 -0700 (PDT) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id A663E205BBF; Fri, 16 Sep 2022 01:34:44 +0200 (CEST) Received: from smtp.na-rdc02.nxp.com (usphx01srsp001v.us-phx01.nxp.com [134.27.49.11]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 3EC5D205BBA; Fri, 16 Sep 2022 01:34:44 +0200 (CEST) Received: from right.am.freescale.net (right.am.freescale.net [10.81.116.134]) by usphx01srsp001v.us-phx01.nxp.com (Postfix) with ESMTP id E4C3A40AB4; Thu, 15 Sep 2022 16:34:42 -0700 (MST) From: Li Yang To: shawnguo@kernel.org, devicetree@vger.kernel.org Cc: robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Li Yang , Camelia Groza , Pankaj Bansal Subject: [PATCH v2 8/9] arm64: dts: ls1046a-qds: add mmio based mdio-mux nodes for FPGA Date: Thu, 15 Sep 2022 18:34:31 -0500 Message-Id: <20220915233432.31660-9-leoyang.li@nxp.com> X-Mailer: git-send-email 2.25.1.377.g2d2118b In-Reply-To: <20220915233432.31660-1-leoyang.li@nxp.com> References: <20220915233432.31660-1-leoyang.li@nxp.com> MIME-Version: 1.0 X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org There is mmio based mdio mux function in the FPGA device on ls1046a-qds board. Add the mmio based mdio-mux nodes to ls1043a-qds boards and add simple-mfd as a compatbile for the FPGA node to reflect the multi-function nature of it. Signed-off-by: Camelia Groza Signed-off-by: Pankaj Bansal Signed-off-by: Li Yang --- .../boot/dts/freescale/fsl-ls1046a-qds.dts | 155 +++++++++++++++++- 1 file changed, 153 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts index eec62c63dafe..f969173fb337 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts @@ -3,7 +3,7 @@ * Device Tree Include file for Freescale Layerscape-1046A family SoC. * * Copyright 2016 Freescale Semiconductor, Inc. - * Copyright 2018 NXP + * Copyright 2018-2019 NXP * * Shaohui Xie */ @@ -17,14 +17,26 @@ / { compatible = "fsl,ls1046a-qds", "fsl,ls1046a"; aliases { + emi1-slot1 = &ls1046mdio_s1; + emi1-slot2 = &ls1046mdio_s2; + emi1-slot4 = &ls1046mdio_s4; gpio0 = &gpio0; gpio1 = &gpio1; gpio2 = &gpio2; gpio3 = &gpio3; + qsgmii-s2-p1 = &qsgmii_phy_s2_p1; + qsgmii-s2-p2 = &qsgmii_phy_s2_p2; + qsgmii-s2-p3 = &qsgmii_phy_s2_p3; + qsgmii-s2-p4 = &qsgmii_phy_s2_p4; serial0 = &duart0; serial1 = &duart1; serial2 = &duart2; serial3 = &duart3; + sgmii-s1-p1 = &sgmii_phy_s1_p1; + sgmii-s1-p2 = &sgmii_phy_s1_p2; + sgmii-s1-p3 = &sgmii_phy_s1_p3; + sgmii-s1-p4 = &sgmii_phy_s1_p4; + sgmii-s4-p1 = &sgmii_phy_s4_p1; }; chosen { @@ -153,8 +165,9 @@ nand@1,0 { }; fpga: board-control@2,0 { - compatible = "fsl,ls1046aqds-fpga", "fsl,fpga-qixis"; + compatible = "fsl,ls1046aqds-fpga", "fsl,fpga-qixis", "simple-mfd"; reg = <0x2 0x0 0x0000100>; + ranges = <0 2 0 0x100>; }; }; @@ -177,3 +190,141 @@ qflash0: flash@0 { }; #include "fsl-ls1046-post.dtsi" + +&fman0 { + ethernet@e0000 { + phy-handle = <&qsgmii_phy_s2_p1>; + phy-connection-type = "sgmii"; + }; + + ethernet@e2000 { + phy-handle = <&sgmii_phy_s4_p1>; + phy-connection-type = "sgmii"; + }; + + ethernet@e4000 { + phy-handle = <&rgmii_phy1>; + phy-connection-type = "rgmii"; + }; + + ethernet@e6000 { + phy-handle = <&rgmii_phy2>; + phy-connection-type = "rgmii"; + }; + + ethernet@e8000 { + phy-handle = <&sgmii_phy_s1_p3>; + phy-connection-type = "sgmii"; + }; + + ethernet@ea000 { + phy-handle = <&sgmii_phy_s1_p4>; + phy-connection-type = "sgmii"; + }; + + ethernet@f0000 { /* DTSEC9/10GEC1 */ + phy-handle = <&sgmii_phy_s1_p1>; + phy-connection-type = "xgmii"; + }; + + ethernet@f2000 { /* DTSEC10/10GEC2 */ + phy-handle = <&sgmii_phy_s1_p2>; + phy-connection-type = "xgmii"; + }; +}; + +&fpga { + #address-cells = <1>; + #size-cells = <1>; + + mdio-mux-emi1 { + compatible = "mdio-mux-mmioreg", "mdio-mux"; + mdio-parent-bus = <&mdio0>; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x54 1>; /* BRDCFG4 */ + mux-mask = <0xe0>; /* EMI1 */ + + /* On-board RGMII1 PHY */ + ls1046mdio0: mdio@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + rgmii_phy1: ethernet-phy@1 { /* MAC3 */ + reg = <0x1>; + }; + }; + + /* On-board RGMII2 PHY */ + ls1046mdio1: mdio@1 { + reg = <0x20>; + #address-cells = <1>; + #size-cells = <0>; + + rgmii_phy2: ethernet-phy@2 { /* MAC4 */ + reg = <0x2>; + }; + }; + + /* Slot 1 */ + ls1046mdio_s1: mdio@2 { + reg = <0x40>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + sgmii_phy_s1_p1: ethernet-phy@1c { + reg = <0x1c>; + }; + + sgmii_phy_s1_p2: ethernet-phy@1d { + reg = <0x1d>; + }; + + sgmii_phy_s1_p3: ethernet-phy@1e { + reg = <0x1e>; + }; + + sgmii_phy_s1_p4: ethernet-phy@1f { + reg = <0x1f>; + }; + }; + + /* Slot 2 */ + ls1046mdio_s2: mdio@3 { + reg = <0x60>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + qsgmii_phy_s2_p1: ethernet-phy@8 { + reg = <0x8>; + }; + + qsgmii_phy_s2_p2: ethernet-phy@9 { + reg = <0x9>; + }; + + qsgmii_phy_s2_p3: ethernet-phy@a { + reg = <0xa>; + }; + + qsgmii_phy_s2_p4: ethernet-phy@b { + reg = <0xb>; + }; + }; + + /* Slot 4 */ + ls1046mdio_s4: mdio@5 { + reg = <0x80>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + sgmii_phy_s4_p1: ethernet-phy@1c { + reg = <0x1c>; + }; + }; + }; +}; From patchwork Thu Sep 15 23:34:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Li X-Patchwork-Id: 606623 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E231BC6FA8B for ; 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Thu, 15 Sep 2022 16:34:43 -0700 (MST) From: Li Yang To: shawnguo@kernel.org, devicetree@vger.kernel.org Cc: robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Pankaj Bansal , Li Yang Subject: [PATCH v2 9/9] arm64: dts: ls1046a-qds: Modify the qspi flash frequency Date: Thu, 15 Sep 2022 18:34:32 -0500 Message-Id: <20220915233432.31660-10-leoyang.li@nxp.com> X-Mailer: git-send-email 2.25.1.377.g2d2118b In-Reply-To: <20220915233432.31660-1-leoyang.li@nxp.com> References: <20220915233432.31660-1-leoyang.li@nxp.com> MIME-Version: 1.0 X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Pankaj Bansal The qspi flash in ls1046a QDS board can operate at 50MHz frequency. Therefore, update the maximum supported freq in dts file. Signed-off-by: Pankaj Bansal Signed-off-by: Li Yang --- arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts index f969173fb337..b2fcbba60d3a 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts @@ -182,7 +182,7 @@ qflash0: flash@0 { compatible = "spansion,m25p80"; #address-cells = <1>; #size-cells = <1>; - spi-max-frequency = <20000000>; + spi-max-frequency = <50000000>; spi-rx-bus-width = <4>; spi-tx-bus-width = <4>; reg = <0>;