From patchwork Fri Sep 9 09:05:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jianqun Xu X-Patchwork-Id: 604669 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DD3B7C6FA82 for ; Fri, 9 Sep 2022 09:06:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231753AbiIIJGt (ORCPT ); Fri, 9 Sep 2022 05:06:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34352 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229971AbiIIJGK (ORCPT ); Fri, 9 Sep 2022 05:06:10 -0400 Received: from mail-m11883.qiye.163.com (mail-m11883.qiye.163.com [115.236.118.83]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 462865B78D for ; Fri, 9 Sep 2022 02:06:01 -0700 (PDT) Received: from localhost.localdomain (unknown [58.22.7.114]) by mail-m11883.qiye.163.com (Hmail) with ESMTPA id 34DDD840555; Fri, 9 Sep 2022 17:06:00 +0800 (CST) From: Jianqun Xu To: heiko@sntech.de, linus.walleij@linaro.org, andriy.shevchenko@linux.intel.com Cc: brgl@bgdev.pl, linux-gpio@vger.kernel.org, linux-rockchip@lists.infradead.org, Jianqun Xu Subject: [PATCH 1/6] ARM: dts: rockchip: add gpio alias for gpio dt nodes Date: Fri, 9 Sep 2022 17:05:53 +0800 Message-Id: <20220909090558.3609190-2-jay.xu@rock-chips.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220909090558.3609190-1-jay.xu@rock-chips.com> References: <20220909090558.3609190-1-jay.xu@rock-chips.com> MIME-Version: 1.0 X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFJSktLSjdXWS1ZQUlXWQ8JGhUIEh9ZQVkZQkgaVh4dQ0JITUsfTB0fT1UTARMWGhIXJB QOD1lXWRgSC1lBWU5DVUlJVUxVSkpPWVdZFhoPEhUdFFlBWU9LSFVKSktITkhVSktLWQY+ X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6Pio6Tjo*Cz0iUTZRNEJJTEIc OilPCRdVSlVKTU1JTEpPSE1LTE9JVTMWGhIXVREaAlUDDjsJFBgQVhgTEgsIVRgUFkVZV1kSC1lB WU5DVUlJVUxVSkpPWVdZCAFZQUhNT0M3Bg++ X-HM-Tid: 0a83217fb2372eb8kusn34ddd840555 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add gpio alias for gpio controller dt nodes, which is used by the new gpio driver to get the index of gpio controller for driver. Signed-off-by: Jianqun Xu Reported-by: kernel test robot --- arch/arm/boot/dts/rk3036.dtsi | 3 +++ arch/arm/boot/dts/rk3066a.dtsi | 6 ++++++ arch/arm/boot/dts/rk322x.dtsi | 4 ++++ arch/arm/boot/dts/rk3288.dtsi | 9 +++++++++ arch/arm/boot/dts/rk3xxx.dtsi | 4 ++++ 5 files changed, 26 insertions(+) diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi index 9b0f0497567d..912c21667dd4 100644 --- a/arch/arm/boot/dts/rk3036.dtsi +++ b/arch/arm/boot/dts/rk3036.dtsi @@ -17,6 +17,9 @@ / { interrupt-parent = <&gic>; aliases { + gpio0 = &gpio0; + gpio1 = &gpio1; + gpio2 = &gpio2; i2c0 = &i2c0; i2c1 = &i2c1; i2c2 = &i2c2; diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi index de9915d946f7..fe565440d6ad 100644 --- a/arch/arm/boot/dts/rk3066a.dtsi +++ b/arch/arm/boot/dts/rk3066a.dtsi @@ -13,6 +13,12 @@ / { compatible = "rockchip,rk3066a"; + aliases { + gpio4 = &gpio4; + gpio5 = &gpio5; + gpio6 = &gpio6; + }; + cpus { #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi index ffc16d6b97e1..a814e813a5da 100644 --- a/arch/arm/boot/dts/rk322x.dtsi +++ b/arch/arm/boot/dts/rk322x.dtsi @@ -15,6 +15,10 @@ / { interrupt-parent = <&gic>; aliases { + gpio0 = &gpio0; + gpio1 = &gpio1; + gpio2 = &gpio2; + gpio3 = &gpio3; serial0 = &uart0; serial1 = &uart1; serial2 = &uart2; diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 487b0e03d4b4..4d5184e27389 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -19,6 +19,15 @@ / { aliases { ethernet0 = &gmac; + gpio0 = &gpio0; + gpio1 = &gpio1; + gpio2 = &gpio2; + gpio3 = &gpio3; + gpio4 = &gpio4; + gpio5 = &gpio5; + gpio6 = &gpio6; + gpio7 = &gpio7; + gpio8 = &gpio8; i2c0 = &i2c0; i2c1 = &i2c1; i2c2 = &i2c2; diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi index 616a828e0c6e..e2cb4b51d02f 100644 --- a/arch/arm/boot/dts/rk3xxx.dtsi +++ b/arch/arm/boot/dts/rk3xxx.dtsi @@ -16,6 +16,10 @@ / { aliases { ethernet0 = &emac; + gpio0 = &gpio0; + gpio1 = &gpio1; + gpio2 = &gpio2; + gpio3 = &gpio3; i2c0 = &i2c0; i2c1 = &i2c1; i2c2 = &i2c2; From patchwork Fri Sep 9 09:05:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jianqun Xu X-Patchwork-Id: 604419 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 47EBEECAAA1 for ; Fri, 9 Sep 2022 09:06:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229774AbiIIJGs (ORCPT ); Fri, 9 Sep 2022 05:06:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58050 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231753AbiIIJGK (ORCPT ); Fri, 9 Sep 2022 05:06:10 -0400 Received: from mail-m11883.qiye.163.com (mail-m11883.qiye.163.com [115.236.118.83]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 46CEE6BCD7 for ; Fri, 9 Sep 2022 02:06:02 -0700 (PDT) Received: from localhost.localdomain (unknown [58.22.7.114]) by mail-m11883.qiye.163.com (Hmail) with ESMTPA id C19A5840668; Fri, 9 Sep 2022 17:06:00 +0800 (CST) From: Jianqun Xu To: heiko@sntech.de, linus.walleij@linaro.org, andriy.shevchenko@linux.intel.com Cc: brgl@bgdev.pl, linux-gpio@vger.kernel.org, linux-rockchip@lists.infradead.org, Jianqun Xu Subject: [PATCH 2/6] ARM: dts: rockchip: add 'clock-names' for gpio dt nodes Date: Fri, 9 Sep 2022 17:05:54 +0800 Message-Id: <20220909090558.3609190-3-jay.xu@rock-chips.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220909090558.3609190-1-jay.xu@rock-chips.com> References: <20220909090558.3609190-1-jay.xu@rock-chips.com> MIME-Version: 1.0 X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFJSktLSjdXWS1ZQUlXWQ8JGhUIEh9ZQVlDTktLVh8aSUpNGUJLTElOGlUTARMWGhIXJB QOD1lXWRgSC1lBWU5DVUlJVUxVSkpPWVdZFhoPEhUdFFlBWU9LSFVKSktITkhVSktLWQY+ X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6Kxw6FDo*CT0eOjZKHk0KTE8i KzwaFBlVSlVKTU1JTEpPSE1KSE9JVTMWGhIXVREaAlUDDjsJFBgQVhgTEgsIVRgUFkVZV1kSC1lB WU5DVUlJVUxVSkpPWVdZCAFZQU1OQkg3Bg++ X-HM-Tid: 0a83217fb47d2eb8kusnc19a5840668 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add 'clock-names' property for gpio dt nodes, which is used by the gpio driver to identified as the index for the gpio controller. Signed-off-by: Jianqun Xu --- arch/arm/boot/dts/rk3036.dtsi | 3 +++ arch/arm/boot/dts/rk3066a.dtsi | 6 ++++++ arch/arm/boot/dts/rk3188.dtsi | 4 ++++ arch/arm/boot/dts/rk322x.dtsi | 4 ++++ 4 files changed, 17 insertions(+) diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi index 912c21667dd4..0ae701f40b83 100644 --- a/arch/arm/boot/dts/rk3036.dtsi +++ b/arch/arm/boot/dts/rk3036.dtsi @@ -584,6 +584,7 @@ gpio0: gpio@2007c000 { compatible = "rockchip,gpio-bank"; reg = <0x2007c000 0x100>; interrupts = ; + clock-names = "bus"; clocks = <&cru PCLK_GPIO0>; gpio-controller; @@ -597,6 +598,7 @@ gpio1: gpio@20080000 { compatible = "rockchip,gpio-bank"; reg = <0x20080000 0x100>; interrupts = ; + clock-names = "bus"; clocks = <&cru PCLK_GPIO1>; gpio-controller; @@ -610,6 +612,7 @@ gpio2: gpio@20084000 { compatible = "rockchip,gpio-bank"; reg = <0x20084000 0x100>; interrupts = ; + clock-names = "bus"; clocks = <&cru PCLK_GPIO2>; gpio-controller; diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi index fe565440d6ad..343b44238269 100644 --- a/arch/arm/boot/dts/rk3066a.dtsi +++ b/arch/arm/boot/dts/rk3066a.dtsi @@ -283,6 +283,7 @@ gpio0: gpio@20034000 { compatible = "rockchip,gpio-bank"; reg = <0x20034000 0x100>; interrupts = ; + clock-names = "bus"; clocks = <&cru PCLK_GPIO0>; gpio-controller; @@ -296,6 +297,7 @@ gpio1: gpio@2003c000 { compatible = "rockchip,gpio-bank"; reg = <0x2003c000 0x100>; interrupts = ; + clock-names = "bus"; clocks = <&cru PCLK_GPIO1>; gpio-controller; @@ -309,6 +311,7 @@ gpio2: gpio@2003e000 { compatible = "rockchip,gpio-bank"; reg = <0x2003e000 0x100>; interrupts = ; + clock-names = "bus"; clocks = <&cru PCLK_GPIO2>; gpio-controller; @@ -322,6 +325,7 @@ gpio3: gpio@20080000 { compatible = "rockchip,gpio-bank"; reg = <0x20080000 0x100>; interrupts = ; + clock-names = "bus"; clocks = <&cru PCLK_GPIO3>; gpio-controller; @@ -335,6 +339,7 @@ gpio4: gpio@20084000 { compatible = "rockchip,gpio-bank"; reg = <0x20084000 0x100>; interrupts = ; + clock-names = "bus"; clocks = <&cru PCLK_GPIO4>; gpio-controller; @@ -348,6 +353,7 @@ gpio6: gpio@2000a000 { compatible = "rockchip,gpio-bank"; reg = <0x2000a000 0x100>; interrupts = ; + clock-names = "bus"; clocks = <&cru PCLK_GPIO6>; gpio-controller; diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi index cdd4a0bd5133..bc6f53c87c08 100644 --- a/arch/arm/boot/dts/rk3188.dtsi +++ b/arch/arm/boot/dts/rk3188.dtsi @@ -228,6 +228,7 @@ gpio0: gpio@2000a000 { compatible = "rockchip,rk3188-gpio-bank0"; reg = <0x2000a000 0x100>; interrupts = ; + clock-names = "bus"; clocks = <&cru PCLK_GPIO0>; gpio-controller; @@ -241,6 +242,7 @@ gpio1: gpio@2003c000 { compatible = "rockchip,gpio-bank"; reg = <0x2003c000 0x100>; interrupts = ; + clock-names = "bus"; clocks = <&cru PCLK_GPIO1>; gpio-controller; @@ -254,6 +256,7 @@ gpio2: gpio@2003e000 { compatible = "rockchip,gpio-bank"; reg = <0x2003e000 0x100>; interrupts = ; + clock-names = "bus"; clocks = <&cru PCLK_GPIO2>; gpio-controller; @@ -267,6 +270,7 @@ gpio3: gpio@20080000 { compatible = "rockchip,gpio-bank"; reg = <0x20080000 0x100>; interrupts = ; + clock-names = "bus"; clocks = <&cru PCLK_GPIO3>; gpio-controller; diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi index a814e813a5da..4ce2b3f00d48 100644 --- a/arch/arm/boot/dts/rk322x.dtsi +++ b/arch/arm/boot/dts/rk322x.dtsi @@ -956,6 +956,7 @@ gpio0: gpio@11110000 { compatible = "rockchip,gpio-bank"; reg = <0x11110000 0x100>; interrupts = ; + clock-names = "bus"; clocks = <&cru PCLK_GPIO0>; gpio-controller; @@ -969,6 +970,7 @@ gpio1: gpio@11120000 { compatible = "rockchip,gpio-bank"; reg = <0x11120000 0x100>; interrupts = ; + clock-names = "bus"; clocks = <&cru PCLK_GPIO1>; gpio-controller; @@ -982,6 +984,7 @@ gpio2: gpio@11130000 { compatible = "rockchip,gpio-bank"; reg = <0x11130000 0x100>; interrupts = ; + clock-names = "bus"; clocks = <&cru PCLK_GPIO2>; gpio-controller; @@ -995,6 +998,7 @@ gpio3: gpio@11140000 { compatible = "rockchip,gpio-bank"; reg = <0x11140000 0x100>; interrupts = ; + clock-names = "bus"; clocks = <&cru PCLK_GPIO3>; gpio-controller; From patchwork Fri Sep 9 09:05:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jianqun Xu X-Patchwork-Id: 604418 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C3421ECAAD3 for ; Fri, 9 Sep 2022 09:06:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232111AbiIIJGu (ORCPT ); Fri, 9 Sep 2022 05:06:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58070 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231829AbiIIJGK (ORCPT ); Fri, 9 Sep 2022 05:06:10 -0400 Received: from mail-m11883.qiye.163.com (mail-m11883.qiye.163.com [115.236.118.83]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E82BC52809 for ; Fri, 9 Sep 2022 02:06:04 -0700 (PDT) Received: from localhost.localdomain (unknown [58.22.7.114]) by mail-m11883.qiye.163.com (Hmail) with ESMTPA id 61FC48404DD; Fri, 9 Sep 2022 17:06:01 +0800 (CST) From: Jianqun Xu To: heiko@sntech.de, linus.walleij@linaro.org, andriy.shevchenko@linux.intel.com Cc: brgl@bgdev.pl, linux-gpio@vger.kernel.org, linux-rockchip@lists.infradead.org, Jianqun Xu Subject: [PATCH 3/6] arm64: dts: rockchip: add gpio alias for gpio dt nodes Date: Fri, 9 Sep 2022 17:05:55 +0800 Message-Id: <20220909090558.3609190-4-jay.xu@rock-chips.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220909090558.3609190-1-jay.xu@rock-chips.com> References: <20220909090558.3609190-1-jay.xu@rock-chips.com> MIME-Version: 1.0 X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFJSktLSjdXWS1ZQUlXWQ8JGhUIEh9ZQVlCGkJJVkNMGk5PQkpCHkIaHVUTARMWGhIXJB QOD1lXWRgSC1lBWU5DVUlJVUxVSkpPWVdZFhoPEhUdFFlBWU9LSFVKSktPSElVSktLWQY+ X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6Mxw6PRw6LT0dHDY5NE0DTE4Y HxcKCSlVSlVKTU1JTEpPSE1JS09NVTMWGhIXVREaAlUDDjsJFBgQVhgTEgsIVRgUFkVZV1kSC1lB WU5DVUlJVUxVSkpPWVdZCAFZQUhITU03Bg++ X-HM-Tid: 0a83217fb6e02eb8kusn61fc48404dd Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add gpio alias for gpio controller dt nodes, which is used by the new gpio driver to get the index of gpio controller for driver. Signed-off-by: Jianqun Xu --- arch/arm64/boot/dts/rockchip/rk3308.dtsi | 5 +++++ arch/arm64/boot/dts/rockchip/rk3328.dtsi | 4 ++++ arch/arm64/boot/dts/rockchip/rk3368.dtsi | 4 ++++ arch/arm64/boot/dts/rockchip/rk3399.dtsi | 5 +++++ 4 files changed, 18 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi index 2dfa67f1cd67..fa189701cdc9 100644 --- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi @@ -20,6 +20,11 @@ / { #size-cells = <2>; aliases { + gpio0 = &gpio0; + gpio1 = &gpio1; + gpio2 = &gpio2; + gpio3 = &gpio3; + gpio4 = &gpio4; i2c0 = &i2c0; i2c1 = &i2c1; i2c2 = &i2c2; diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi index 49ae15708a0b..22c2857bcdcf 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi @@ -20,6 +20,10 @@ / { #size-cells = <2>; aliases { + gpio0 = &gpio0; + gpio1 = &gpio1; + gpio2 = &gpio2; + gpio3 = &gpio3; serial0 = &uart0; serial1 = &uart1; serial2 = &uart2; diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi index a4c5aaf1f457..fc7e3f2bc786 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi @@ -20,6 +20,10 @@ / { aliases { ethernet0 = &gmac; + gpio0 = &gpio0; + gpio1 = &gpio1; + gpio2 = &gpio2; + gpio3 = &gpio3; i2c0 = &i2c0; i2c1 = &i2c1; i2c2 = &i2c2; diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index 9d5b0e8c9cca..caffcaee2d6c 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -20,6 +20,11 @@ / { aliases { ethernet0 = &gmac; + gpio0 = &gpio0; + gpio1 = &gpio1; + gpio2 = &gpio2; + gpio3 = &gpio3; + gpio4 = &gpio4; i2c0 = &i2c0; i2c1 = &i2c1; i2c2 = &i2c2; From patchwork Fri Sep 9 09:05:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jianqun Xu X-Patchwork-Id: 604668 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E4817ECAAA1 for ; Fri, 9 Sep 2022 09:06:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231530AbiIIJGv (ORCPT ); Fri, 9 Sep 2022 05:06:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37138 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231938AbiIIJGL (ORCPT ); Fri, 9 Sep 2022 05:06:11 -0400 Received: from mail-m11883.qiye.163.com (mail-m11883.qiye.163.com [115.236.118.83]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1C44852DE7 for ; Fri, 9 Sep 2022 02:06:05 -0700 (PDT) Received: from localhost.localdomain (unknown [58.22.7.114]) by mail-m11883.qiye.163.com (Hmail) with ESMTPA id 17A5A84055E; Fri, 9 Sep 2022 17:06:02 +0800 (CST) From: Jianqun Xu To: heiko@sntech.de, linus.walleij@linaro.org, andriy.shevchenko@linux.intel.com Cc: brgl@bgdev.pl, linux-gpio@vger.kernel.org, linux-rockchip@lists.infradead.org, Jianqun Xu Subject: [PATCH 4/6] arm64: dts: rockchip: add 'clock-names' for gpio dt nodes Date: Fri, 9 Sep 2022 17:05:56 +0800 Message-Id: <20220909090558.3609190-5-jay.xu@rock-chips.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220909090558.3609190-1-jay.xu@rock-chips.com> References: <20220909090558.3609190-1-jay.xu@rock-chips.com> MIME-Version: 1.0 X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFJSktLSjdXWS1ZQUlXWQ8JGhUIEh9ZQVlCGU4eVkpDHh8ZH09OGU0ZQlUTARMWGhIXJB QOD1lXWRgSC1lBWU5DVUlJVUxVSkpPWVdZFhoPEhUdFFlBWU9LSFVKSUtDTk1VSktLWQY+ X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6MxA6Hjo*Hj0tKjYpDkwpTEky FkwaCzlVSlVKTU1JTEpPSE1JTU5DVTMWGhIXVREaAlUDDjsJFBgQVhgTEgsIVRgUFkVZV1kSC1lB WU5DVUlJVUxVSkpPWVdZCAFZQUJJSUw3Bg++ X-HM-Tid: 0a83217fb98f2eb8kusn17a5a84055e Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add 'clock-names' property for gpio dt nodes, which is used by the gpio driver to identified as the index for the gpio controller. Signed-off-by: Jianqun Xu --- arch/arm64/boot/dts/rockchip/rk3308.dtsi | 5 +++++ arch/arm64/boot/dts/rockchip/rk3328.dtsi | 4 ++++ arch/arm64/boot/dts/rockchip/rk3368.dtsi | 4 ++++ arch/arm64/boot/dts/rockchip/rk3399.dtsi | 5 +++++ arch/arm64/boot/dts/rockchip/rk356x.dtsi | 5 +++++ 5 files changed, 23 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi index fa189701cdc9..778b0e37d2e2 100644 --- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi @@ -800,6 +800,7 @@ gpio0: gpio@ff220000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff220000 0x0 0x100>; interrupts = ; + clock-names = "bus"; clocks = <&cru PCLK_GPIO0>; gpio-controller; #gpio-cells = <2>; @@ -811,6 +812,7 @@ gpio1: gpio@ff230000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff230000 0x0 0x100>; interrupts = ; + clock-names = "bus"; clocks = <&cru PCLK_GPIO1>; gpio-controller; #gpio-cells = <2>; @@ -822,6 +824,7 @@ gpio2: gpio@ff240000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff240000 0x0 0x100>; interrupts = ; + clock-names = "bus"; clocks = <&cru PCLK_GPIO2>; gpio-controller; #gpio-cells = <2>; @@ -833,6 +836,7 @@ gpio3: gpio@ff250000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff250000 0x0 0x100>; interrupts = ; + clock-names = "bus"; clocks = <&cru PCLK_GPIO3>; gpio-controller; #gpio-cells = <2>; @@ -844,6 +848,7 @@ gpio4: gpio@ff260000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff260000 0x0 0x100>; interrupts = ; + clock-names = "bus"; clocks = <&cru PCLK_GPIO4>; gpio-controller; #gpio-cells = <2>; diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi index 22c2857bcdcf..765409f642c0 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi @@ -1040,6 +1040,7 @@ gpio0: gpio@ff210000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff210000 0x0 0x100>; interrupts = ; + clock-names = "bus"; clocks = <&cru PCLK_GPIO0>; gpio-controller; @@ -1053,6 +1054,7 @@ gpio1: gpio@ff220000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff220000 0x0 0x100>; interrupts = ; + clock-names = "bus"; clocks = <&cru PCLK_GPIO1>; gpio-controller; @@ -1066,6 +1068,7 @@ gpio2: gpio@ff230000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff230000 0x0 0x100>; interrupts = ; + clock-names = "bus"; clocks = <&cru PCLK_GPIO2>; gpio-controller; @@ -1079,6 +1082,7 @@ gpio3: gpio@ff240000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff240000 0x0 0x100>; interrupts = ; + clock-names = "bus"; clocks = <&cru PCLK_GPIO3>; gpio-controller; diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi index fc7e3f2bc786..45f32de84fae 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi @@ -984,6 +984,7 @@ pinctrl: pinctrl { gpio0: gpio@ff750000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff750000 0x0 0x100>; + clock-names = "bus"; clocks = <&cru PCLK_GPIO0>; interrupts = ; @@ -997,6 +998,7 @@ gpio0: gpio@ff750000 { gpio1: gpio@ff780000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff780000 0x0 0x100>; + clock-names = "bus"; clocks = <&cru PCLK_GPIO1>; interrupts = ; @@ -1010,6 +1012,7 @@ gpio1: gpio@ff780000 { gpio2: gpio@ff790000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff790000 0x0 0x100>; + clock-names = "bus"; clocks = <&cru PCLK_GPIO2>; interrupts = ; @@ -1023,6 +1026,7 @@ gpio2: gpio@ff790000 { gpio3: gpio@ff7a0000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff7a0000 0x0 0x100>; + clock-names = "bus"; clocks = <&cru PCLK_GPIO3>; interrupts = ; diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index caffcaee2d6c..0b8b96fe0cf0 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -2071,6 +2071,7 @@ pinctrl: pinctrl { gpio0: gpio@ff720000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff720000 0x0 0x100>; + clock-names = "bus"; clocks = <&pmucru PCLK_GPIO0_PMU>; interrupts = ; @@ -2084,6 +2085,7 @@ gpio0: gpio@ff720000 { gpio1: gpio@ff730000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff730000 0x0 0x100>; + clock-names = "bus"; clocks = <&pmucru PCLK_GPIO1_PMU>; interrupts = ; @@ -2097,6 +2099,7 @@ gpio1: gpio@ff730000 { gpio2: gpio@ff780000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff780000 0x0 0x100>; + clock-names = "bus"; clocks = <&cru PCLK_GPIO2>; interrupts = ; @@ -2110,6 +2113,7 @@ gpio2: gpio@ff780000 { gpio3: gpio@ff788000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff788000 0x0 0x100>; + clock-names = "bus"; clocks = <&cru PCLK_GPIO3>; interrupts = ; @@ -2123,6 +2127,7 @@ gpio3: gpio@ff788000 { gpio4: gpio@ff790000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff790000 0x0 0x100>; + clock-names = "bus"; clocks = <&cru PCLK_GPIO4>; interrupts = ; diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi index 319981c3e9f7..66d038720e65 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi @@ -1650,6 +1650,7 @@ gpio0: gpio@fdd60000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xfdd60000 0x0 0x100>; interrupts = ; + clock-names = "bus", "db"; clocks = <&pmucru PCLK_GPIO0>, <&pmucru DBCLK_GPIO0>; gpio-controller; #gpio-cells = <2>; @@ -1661,6 +1662,7 @@ gpio1: gpio@fe740000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xfe740000 0x0 0x100>; interrupts = ; + clock-names = "bus", "db"; clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>; gpio-controller; #gpio-cells = <2>; @@ -1672,6 +1674,7 @@ gpio2: gpio@fe750000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xfe750000 0x0 0x100>; interrupts = ; + clock-names = "bus", "db"; clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>; gpio-controller; #gpio-cells = <2>; @@ -1683,6 +1686,7 @@ gpio3: gpio@fe760000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xfe760000 0x0 0x100>; interrupts = ; + clock-names = "bus", "db"; clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>; gpio-controller; #gpio-cells = <2>; @@ -1694,6 +1698,7 @@ gpio4: gpio@fe770000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xfe770000 0x0 0x100>; interrupts = ; + clock-names = "bus", "db"; clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>; gpio-controller; #gpio-cells = <2>; From patchwork Fri Sep 9 09:05:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jianqun Xu X-Patchwork-Id: 604417 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 36DE9C6FA82 for ; Fri, 9 Sep 2022 09:06:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230439AbiIIJGw (ORCPT ); Fri, 9 Sep 2022 05:06:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57720 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231863AbiIIJGL (ORCPT ); Fri, 9 Sep 2022 05:06:11 -0400 Received: from mail-m11883.qiye.163.com (mail-m11883.qiye.163.com [115.236.118.83]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B4705205D8 for ; Fri, 9 Sep 2022 02:06:05 -0700 (PDT) Received: from localhost.localdomain (unknown [58.22.7.114]) by mail-m11883.qiye.163.com (Hmail) with ESMTPA id ADFBD840241; Fri, 9 Sep 2022 17:06:02 +0800 (CST) From: Jianqun Xu To: heiko@sntech.de, linus.walleij@linaro.org, andriy.shevchenko@linux.intel.com Cc: brgl@bgdev.pl, linux-gpio@vger.kernel.org, linux-rockchip@lists.infradead.org, Hans de Goede Subject: [PATCH 5/6] ACPI: utils: Add acpi_dev_uid_to_integer() helper to get _UID as integer Date: Fri, 9 Sep 2022 17:05:57 +0800 Message-Id: <20220909090558.3609190-6-jay.xu@rock-chips.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220909090558.3609190-1-jay.xu@rock-chips.com> References: <20220909090558.3609190-1-jay.xu@rock-chips.com> MIME-Version: 1.0 X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFJSktLSjdXWS1ZQUlXWQ8JGhUIEh9ZQVlCSh5OVkxPHU1DHUxKSUgaGFUTARMWGhIXJB QOD1lXWRgSC1lBWU5DVUlJVUxVSkpPWVdZFhoPEhUdFFlBWU9LSFVKSktITkhVSktLWQY+ X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6PjY6HSo4DT0fUTYBDk0XTFYP PR0aCwFVSlVKTU1JTEpPSE1ISE5JVTMWGhIXVREaAlUDDjsJFBgQVhgTEgsIVRgUFkVZV1kSC1lB WU5DVUlJVUxVSkpPWVdZCAFZQUhMT003Bg++ X-HM-Tid: 0a83217fbc452eb8kusnadfbd840241 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org From: Andy Shevchenko Some users interpret _UID only as integer and for them it's easier to have an integer representation of _UID. Add respective helper for that. Signed-off-by: Andy Shevchenko Reviewed-by: Hans de Goede --- drivers/acpi/utils.c | 24 ++++++++++++++++++++++++ include/acpi/acpi_bus.h | 1 + include/linux/acpi.h | 5 +++++ 3 files changed, 30 insertions(+) diff --git a/drivers/acpi/utils.c b/drivers/acpi/utils.c index 5a7b8065e77f..febf9b8da3a0 100644 --- a/drivers/acpi/utils.c +++ b/drivers/acpi/utils.c @@ -793,6 +793,30 @@ bool acpi_dev_hid_uid_match(struct acpi_device *adev, } EXPORT_SYMBOL(acpi_dev_hid_uid_match); +/** + * acpi_dev_uid_to_integer - treat ACPI device _UID as integer + * @adev: ACPI device to get _UID from + * @integer: output buffer for integer + * + * Considers _UID as integer and converts it to @integer. + * + * Returns 0 on success, or negative error code otherwise. + */ +int acpi_dev_uid_to_integer(struct acpi_device *adev, u64 *integer) +{ + const char *uid; + + if (!adev) + return -ENODEV; + + uid = acpi_device_uid(adev); + if (!uid) + return -ENODATA; + + return kstrtou64(uid, 0, integer); +} +EXPORT_SYMBOL(acpi_dev_uid_to_integer); + /** * acpi_dev_found - Detect presence of a given ACPI device in the namespace. * @hid: Hardware ID of the device. diff --git a/include/acpi/acpi_bus.h b/include/acpi/acpi_bus.h index e7d27373ff71..bd0db916f330 100644 --- a/include/acpi/acpi_bus.h +++ b/include/acpi/acpi_bus.h @@ -733,6 +733,7 @@ static inline bool acpi_device_can_poweroff(struct acpi_device *adev) } bool acpi_dev_hid_uid_match(struct acpi_device *adev, const char *hid2, const char *uid2); +int acpi_dev_uid_to_integer(struct acpi_device *adev, u64 *integer); void acpi_dev_clear_dependencies(struct acpi_device *supplier); bool acpi_dev_ready_for_enumeration(const struct acpi_device *device); diff --git a/include/linux/acpi.h b/include/linux/acpi.h index 6f64b2f3dc54..9434db02cb60 100644 --- a/include/linux/acpi.h +++ b/include/linux/acpi.h @@ -798,6 +798,11 @@ acpi_dev_hid_uid_match(struct acpi_device *adev, const char *hid2, const char *u return false; } +static inline int acpi_dev_uid_to_integer(struct acpi_device *adev, u64 *integer) +{ + return -ENODEV; +} + static inline struct acpi_device * acpi_dev_get_first_match_dev(const char *hid, const char *uid, s64 hrv) { From patchwork Fri Sep 9 09:05:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jianqun Xu X-Patchwork-Id: 604667 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BC7CEECAAD3 for ; Fri, 9 Sep 2022 09:06:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231296AbiIIJGx (ORCPT ); Fri, 9 Sep 2022 05:06:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37136 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230385AbiIIJGL (ORCPT ); Fri, 9 Sep 2022 05:06:11 -0400 Received: from mail-m11883.qiye.163.com (mail-m11883.qiye.163.com [115.236.118.83]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EE60F4F6AF for ; Fri, 9 Sep 2022 02:06:05 -0700 (PDT) Received: from localhost.localdomain (unknown [58.22.7.114]) by mail-m11883.qiye.163.com (Hmail) with ESMTPA id 64D288408A0; Fri, 9 Sep 2022 17:06:03 +0800 (CST) From: Jianqun Xu To: heiko@sntech.de, linus.walleij@linaro.org, andriy.shevchenko@linux.intel.com Cc: brgl@bgdev.pl, linux-gpio@vger.kernel.org, linux-rockchip@lists.infradead.org, Jianqun Xu Subject: [PATCH 6/6] gpio: rockchip: support acpi Date: Fri, 9 Sep 2022 17:05:58 +0800 Message-Id: <20220909090558.3609190-7-jay.xu@rock-chips.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220909090558.3609190-1-jay.xu@rock-chips.com> References: <20220909090558.3609190-1-jay.xu@rock-chips.com> MIME-Version: 1.0 X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFJSktLSjdXWS1ZQUlXWQ8JGhUIEh9ZQVkaGE5KVkIZHxgdTU9DHUhNS1UTARMWGhIXJB QOD1lXWRgSC1lBWU5DVUlJVUxVSkpPWVdZFhoPEhUdFFlBWU9LSFVKSktITkhVSktLWQY+ X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6Ogw6Mgw5AT0iSTY9HkwXTE1W LkswCy5VSlVKTU1JTEpPSE1PS0tDVTMWGhIXVREaAlUDDjsJFBgQVhgTEgsIVRgUFkVZV1kSC1lB WU5DVUlJVUxVSkpPWVdZCAFZQUpJSk5JNwY+ X-HM-Tid: 0a83217fbeb32eb8kusn64d288408a0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The gpio driver for rockchip gpio controller is seperated from rockchip pinctrl driver, at the first version, it keeps things original to make the patch easy to be reviewed, such as the gpio driver must work with the pinctrl dt node to be its parent node. This patch wants to fix driver to support acpi since gpio controller should work well during acpi is enabled. But during upstream, driver is better to fix other thing together includes: - add 'clock-names' to allow driver to get clocks by devm_clk_get(). - get io resource and irq by platform common apis. - use fwnode instead of of_node from device structure. Signed-off-by: Jianqun Xu Reported-by: kernel test robot --- drivers/gpio/gpio-rockchip.c | 197 ++++++++++++++++++++++------------- 1 file changed, 122 insertions(+), 75 deletions(-) diff --git a/drivers/gpio/gpio-rockchip.c b/drivers/gpio/gpio-rockchip.c index ebb50c25a461..ca012cf199a6 100644 --- a/drivers/gpio/gpio-rockchip.c +++ b/drivers/gpio/gpio-rockchip.c @@ -6,9 +6,9 @@ * Copyright (c) 2021 Rockchip Electronics Co. Ltd. */ +#include #include #include -#include #include #include #include @@ -16,10 +16,9 @@ #include #include #include -#include -#include -#include +#include #include +#include #include #include "../pinctrl/core.h" @@ -29,6 +28,8 @@ #define GPIO_TYPE_V2 (0x01000C2B) /* GPIO Version ID 0x01000C2B */ #define GPIO_TYPE_V2_1 (0x0101157C) /* GPIO Version ID 0x0101157C */ +#define GPIO_MAX_PINS (32) + static const struct rockchip_gpio_regs gpio_regs_v1 = { .port_dr = 0x00, .port_ddr = 0x04, @@ -200,6 +201,9 @@ static int rockchip_gpio_set_debounce(struct gpio_chip *gc, if (bank->gpio_type == GPIO_TYPE_V2 && !IS_ERR(bank->db_clk)) { div_debounce_support = true; freq = clk_get_rate(bank->db_clk); + if (!freq) + return -EINVAL; + max_debounce = (GENMASK(23, 0) + 1) * 2 * 1000000 / freq; if (debounce > max_debounce) return -EINVAL; @@ -507,15 +511,16 @@ static int rockchip_interrupts_register(struct rockchip_pin_bank *bank) struct irq_chip_generic *gc; int ret; - bank->domain = irq_domain_add_linear(bank->of_node, 32, - &irq_generic_chip_ops, NULL); + bank->domain = irq_domain_create_linear(dev_fwnode(bank->dev), + GPIO_MAX_PINS, + &irq_generic_chip_ops, NULL); if (!bank->domain) { dev_warn(bank->dev, "could not init irq domain for bank %s\n", bank->name); return -EINVAL; } - ret = irq_alloc_domain_generic_chips(bank->domain, 32, 1, + ret = irq_alloc_domain_generic_chips(bank->domain, GPIO_MAX_PINS, 1, "rockchip_gpio_irq", handle_level_irq, clr, 0, 0); @@ -565,7 +570,8 @@ static int rockchip_interrupts_register(struct rockchip_pin_bank *bank) return 0; } -static int rockchip_gpiolib_register(struct rockchip_pin_bank *bank) +static int rockchip_gpiolib_register(struct rockchip_pin_bank *bank, + struct pinctrl_dev *pctldev) { struct gpio_chip *gc; int ret; @@ -578,6 +584,17 @@ static int rockchip_gpiolib_register(struct rockchip_pin_bank *bank) gc->label = bank->name; gc->parent = bank->dev; + if (!gc->base) + gc->base = GPIO_MAX_PINS * bank->bank_num; + if (!gc->ngpio) + gc->ngpio = GPIO_MAX_PINS; + if (!gc->label) { + gc->label = devm_kasprintf(bank->dev, GFP_KERNEL, "gpio%d", + bank->bank_num); + if (!gc->label) + return -ENOMEM; + } + ret = gpiochip_add_data(gc, bank); if (ret) { dev_err(bank->dev, "failed to add gpiochip %s, %d\n", @@ -595,17 +612,7 @@ static int rockchip_gpiolib_register(struct rockchip_pin_bank *bank) * files which don't set the "gpio-ranges" property or systems that * utilize ACPI the driver has to call gpiochip_add_pin_range(). */ - if (!of_property_read_bool(bank->of_node, "gpio-ranges")) { - struct device_node *pctlnp = of_get_parent(bank->of_node); - struct pinctrl_dev *pctldev = NULL; - - if (!pctlnp) - return -ENODATA; - - pctldev = of_pinctrl_get(pctlnp); - if (!pctldev) - return -ENODEV; - + if (!device_property_read_bool(bank->dev, "gpio-ranges") && pctldev) { ret = gpiochip_add_pin_range(gc, dev_name(pctldev->dev), 0, gc->base, gc->ngpio); if (ret) { @@ -628,45 +635,49 @@ static int rockchip_gpiolib_register(struct rockchip_pin_bank *bank) return ret; } -static int rockchip_get_bank_data(struct rockchip_pin_bank *bank) +static void rockchip_gpio_set_regs(struct rockchip_pin_bank *bank) { - struct resource res; - int id = 0; - - if (of_address_to_resource(bank->of_node, 0, &res)) { - dev_err(bank->dev, "cannot find IO resource for bank\n"); - return -ENOENT; - } - - bank->reg_base = devm_ioremap_resource(bank->dev, &res); - if (IS_ERR(bank->reg_base)) - return PTR_ERR(bank->reg_base); - - bank->irq = irq_of_parse_and_map(bank->of_node, 0); - if (!bank->irq) - return -EINVAL; - - bank->clk = of_clk_get(bank->of_node, 0); - if (IS_ERR(bank->clk)) - return PTR_ERR(bank->clk); - - clk_prepare_enable(bank->clk); - id = readl(bank->reg_base + gpio_regs_v2.version_id); + int id = readl(bank->reg_base + gpio_regs_v2.version_id); /* If not gpio v2, that is default to v1. */ if (id == GPIO_TYPE_V2 || id == GPIO_TYPE_V2_1) { bank->gpio_regs = &gpio_regs_v2; bank->gpio_type = GPIO_TYPE_V2; - bank->db_clk = of_clk_get(bank->of_node, 1); - if (IS_ERR(bank->db_clk)) { - dev_err(bank->dev, "cannot find debounce clk\n"); - clk_disable_unprepare(bank->clk); - return -EINVAL; - } } else { bank->gpio_regs = &gpio_regs_v1; bank->gpio_type = GPIO_TYPE_V1; } +} + +static int rockchip_gpio_get_clocks(struct rockchip_pin_bank *bank) +{ + struct device *dev = bank->dev; + struct fwnode_handle *fwnode = dev_fwnode(dev); + int ret; + + if (!is_of_node(fwnode)) + return 0; + + bank->clk = devm_clk_get(dev, "bus"); + if (IS_ERR(bank->clk)) { + dev_err(dev, "fail to get apb clock\n"); + return PTR_ERR(bank->clk); + } + + ret = clk_prepare_enable(bank->clk); + if (ret < 0) + return ret; + + bank->db_clk = devm_clk_get(dev, "db"); + if (IS_ERR(bank->db_clk)) { + bank->db_clk = NULL; + } + + ret = clk_prepare_enable(bank->db_clk); + if (ret < 0) { + clk_disable_unprepare(bank->clk); + return ret; + } return 0; } @@ -690,57 +701,86 @@ rockchip_gpio_find_bank(struct pinctrl_dev *pctldev, int id) return found ? bank : NULL; } -static int rockchip_gpio_probe(struct platform_device *pdev) +static int rockchip_gpio_get_bank_id(struct device *dev) { - struct device *dev = &pdev->dev; - struct device_node *np = dev->of_node; - struct device_node *pctlnp = of_get_parent(np); - struct pinctrl_dev *pctldev = NULL; - struct rockchip_pin_bank *bank = NULL; - struct rockchip_pin_deferred *cfg; + struct fwnode_handle *fwnode = dev_fwnode(dev); + int bank_id = -EINVAL; + u64 uid; static int gpio; - int id, ret; - if (!np || !pctlnp) - return -ENODEV; + if (is_acpi_node(fwnode)) { + if (!acpi_dev_uid_to_integer(ACPI_COMPANION(dev), &uid)) + bank_id = (int)uid; + } else { + bank_id = of_alias_get_id(to_of_node(fwnode), "gpio"); + if (bank_id < 0) + bank_id = gpio++; + } - pctldev = of_pinctrl_get(pctlnp); - if (!pctldev) - return -EPROBE_DEFER; + return bank_id; +} - id = of_alias_get_id(np, "gpio"); - if (id < 0) - id = gpio++; +static int rockchip_gpio_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct rockchip_pin_bank *bank; + struct pinctrl_dev *pctldev; + int bank_id; + int ret; - bank = rockchip_gpio_find_bank(pctldev, id); - if (!bank) - return -EINVAL; + bank_id = rockchip_gpio_get_bank_id(dev); + if (bank_id < 0) + return bank_id; + pctldev = get_pinctrl_dev_from_devname("pinctrl"); + if (pctldev) { + bank = rockchip_gpio_find_bank(pctldev, bank_id); + if (!bank) + return -ENODEV; + } else { + bank = devm_kzalloc(dev, sizeof(*bank), GFP_KERNEL); + if (!bank) + return -ENOMEM; + } + + bank->bank_num = bank_id; bank->dev = dev; - bank->of_node = np; - raw_spin_lock_init(&bank->slock); + bank->reg_base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(bank->reg_base)) + return PTR_ERR(bank->reg_base); - ret = rockchip_get_bank_data(bank); + bank->irq = platform_get_irq(pdev, 0); + if (bank->irq < 0) + return bank->irq; + + ret = rockchip_gpio_get_clocks(bank); if (ret) return ret; + raw_spin_lock_init(&bank->slock); + rockchip_gpio_set_regs(bank); + /* * Prevent clashes with a deferred output setting * being added right at this moment. */ mutex_lock(&bank->deferred_lock); - ret = rockchip_gpiolib_register(bank); + ret = rockchip_gpiolib_register(bank, pctldev); if (ret) { - clk_disable_unprepare(bank->clk); - mutex_unlock(&bank->deferred_lock); - return ret; + dev_err(bank->dev, "Failed to register gpio %d\n", ret); + goto err_unlock; } while (!list_empty(&bank->deferred_pins)) { + struct rockchip_pin_deferred *cfg; + cfg = list_first_entry(&bank->deferred_pins, struct rockchip_pin_deferred, head); + if (!cfg) + break; + list_del(&cfg->head); switch (cfg->param) { @@ -765,9 +805,15 @@ static int rockchip_gpio_probe(struct platform_device *pdev) mutex_unlock(&bank->deferred_lock); platform_set_drvdata(pdev, bank); - dev_info(dev, "probed %pOF\n", np); + dev_info(dev, "probed %pfw\n", dev_fwnode(dev)); return 0; +err_unlock: + mutex_unlock(&bank->deferred_lock); + clk_disable_unprepare(bank->clk); + clk_disable_unprepare(bank->db_clk); + + return ret; } static int rockchip_gpio_remove(struct platform_device *pdev) @@ -775,6 +821,7 @@ static int rockchip_gpio_remove(struct platform_device *pdev) struct rockchip_pin_bank *bank = platform_get_drvdata(pdev); clk_disable_unprepare(bank->clk); + clk_disable_unprepare(bank->db_clk); gpiochip_remove(&bank->gpio_chip); return 0;