From patchwork Thu Sep 1 13:39:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amjad Ouled-Ameur X-Patchwork-Id: 602109 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3550BECAAD1 for ; Thu, 1 Sep 2022 13:41:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233394AbiIANl4 (ORCPT ); Thu, 1 Sep 2022 09:41:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38922 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233504AbiIANl0 (ORCPT ); Thu, 1 Sep 2022 09:41:26 -0400 Received: from mail-wr1-x42e.google.com (mail-wr1-x42e.google.com [IPv6:2a00:1450:4864:20::42e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 69F2B356C5 for ; Thu, 1 Sep 2022 06:40:09 -0700 (PDT) Received: by mail-wr1-x42e.google.com with SMTP id w5so6238617wrn.12 for ; Thu, 01 Sep 2022 06:40:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=KCPcoUB7YiwSSscJBnh3JUInbmnv/uLJ/66Lvn6Y6Yk=; b=DWof82jkuxZ3n6qKS1EJKURTcSwcpmtxTYMAj/vYMQobBAxY2dZV1YyE7wyJpx2g2E 2LKkmPmH9KHkSJ+JUqRatHWEGRzoCsS89jQe5VGzGWBHD4UPkFPrdnI154eRSDMPDSMP 4F9Q0rmuAkQyRzb2LsOFyCXFa7JDTVvy6wEnlKGxMfrz1TiArI1xgnjCCix7ognj6S+y l/B14A4qUpHABLSuQ8hILmqGLFcQeWlUT+kqx1bxS+qIyg3ANii4YB40pSAezoOLLqs6 TYWYGehFj+25Tgv99GVaRebUxsWdI/W2TfKTuA+TFQPgvNuDqnt3j411E7ow6099AUnt Blkg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=KCPcoUB7YiwSSscJBnh3JUInbmnv/uLJ/66Lvn6Y6Yk=; b=0nTzgVqXxgYhZKXZe/RJHRqtumHHDUUMVl7orMQrrw5rSBJd8x79DYymSY34y99qYF HtZL3p0XiYfJk2NpImbrw64uvYYIHkW7Mwl7hVpRbeaI05Lk2Xf0AAnmxNv7D3ls7hug tAIzb7ZTy3/dxJ3CVpzgm09ixfkFkFnCiSy7352h4LAGIsUDT17MaBYHhZBAXHjeYe2I VpYlyG14lEVnLLK5dKYpNUtqANbPhMhx9D2eMeTDb7yLFcNvmeEGQbpcukvzpkEhkRXd kYZ8jn3D+BjTVrWZkHLqmvzL6nM8+OStbFZk6Q4OR0+qKl8THfAWm0IQfy6LCvlrfesx xYOA== X-Gm-Message-State: ACgBeo1sHPvQ8wN8FAHzPMmq8bV2DLT76VlHEeU/g4qDWUsFAUGZOJoQ xd2pn28yz1n/ONlIBboyk9yaxA== X-Google-Smtp-Source: AA6agR55XF5dbEcnTiR/UclqwGBi/5TuoAKQ/vTJ0Bk12CiomfceiUFfMs0rxZEZ/oAupen1Fx/ltg== X-Received: by 2002:a05:6000:1374:b0:226:93af:9c26 with SMTP id q20-20020a056000137400b0022693af9c26mr13887160wrz.188.1662039602954; Thu, 01 Sep 2022 06:40:02 -0700 (PDT) Received: from localhost.localdomain (210.145.15.109.rev.sfr.net. [109.15.145.210]) by smtp.googlemail.com with ESMTPSA id e3-20020adfe383000000b0021ef34124ebsm15399016wrm.11.2022.09.01.06.40.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 01 Sep 2022 06:40:02 -0700 (PDT) From: Amjad Ouled-Ameur To: matthias.bgg@gmail.com Cc: Fabien Parent , rafael@kernel.org, amitk@kernel.org, daniel.lezcano@linaro.org, devicetree@vger.kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-pm@vger.kernel.org, robh+dt@kernel.org, rui.zhang@intel.com, Amjad Ouled-Ameur , AngeloGioacchino Del Regno Subject: [PATCH v3 1/4] dt-bindings: thermal: mediatek: add binding documentation for MT8365 SoC Date: Thu, 1 Sep 2022 15:39:47 +0200 Message-Id: <20220901133950.115122-2-aouledameur@baylibre.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220901133950.115122-1-aouledameur@baylibre.com> References: <20220901133950.115122-1-aouledameur@baylibre.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Fabien Parent Add the binding documentation for the thermal support on MT8365 SoC. Signed-off-by: Fabien Parent Signed-off-by: Amjad Ouled-Ameur Reviewed-by: Matthias Brugger Reviewed-by: AngeloGioacchino Del Regno Acked-by: Rob Herring --- Documentation/devicetree/bindings/thermal/mediatek-thermal.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt index 5c7e7bdd029a..ba4ebffeade4 100644 --- a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt +++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt @@ -14,6 +14,7 @@ Required properties: - "mediatek,mt2712-thermal" : For MT2712 family of SoCs - "mediatek,mt7622-thermal" : For MT7622 SoC - "mediatek,mt8183-thermal" : For MT8183 family of SoCs + - "mediatek,mt8365-thermal" : For MT8365 family of SoCs - "mediatek,mt8516-thermal", "mediatek,mt2701-thermal : For MT8516 family of SoCs - reg: Address range of the thermal controller - interrupts: IRQ for the thermal controller From patchwork Thu Sep 1 13:39:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amjad Ouled-Ameur X-Patchwork-Id: 602110 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 46006ECAAD3 for ; Thu, 1 Sep 2022 13:41:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233396AbiIANlv (ORCPT ); Thu, 1 Sep 2022 09:41:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42192 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233366AbiIANlY (ORCPT ); Thu, 1 Sep 2022 09:41:24 -0400 Received: from mail-wr1-x435.google.com (mail-wr1-x435.google.com [IPv6:2a00:1450:4864:20::435]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C4F8630F5A for ; Thu, 1 Sep 2022 06:40:08 -0700 (PDT) Received: by mail-wr1-x435.google.com with SMTP id u17so3150646wrp.3 for ; Thu, 01 Sep 2022 06:40:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=stpnIznClyFbSSAZ9XIBAQVJVqGJPgWnuEIsfvw/Kgw=; b=SgocxATs9nG+dO5eC5Ry/p9RAchwAh7Dpb52+4CBAMfh5whV5zASWzF3gBuq1hnzwp M+7JtEjt88ret/I+CXbQ/8eC7JhJZZYpUMr9LIXHTG//b8nmupFzHkcA4LJTWam7pZbN QBEVv+DsJY1rMjqi9UwKNxes6DzYt2FsHkrUVjyhamtSGhaNqs25BKDjTXNKk09vaU3e 5Yey/AIv9z1PeDrbwbxvkjhbGh/JUK1k7rdBskyuIVcMMC9wZb8GxUwSHKfubs+QiSld cv+od58WOfHDtJuJll+69LK2+7eNURITPegLYKastnotHmlVwhKrU1nx5L/e+r0bg/SB S5Yg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=stpnIznClyFbSSAZ9XIBAQVJVqGJPgWnuEIsfvw/Kgw=; b=5oj3fYVi8f3XoqDRdZfUm+sSjChIP4tX52hdUkzZ90oXmazAcSDbXb0o0906r3u1ao Jzk/a01EwNvXaE2yZVjYydswycQQYql9XgrE0IEwwGyGj0aeHhU4lJZhk64POo1xl5zp sSWiA0MEPUmLxujYcqqr++Wka77Pkm8856Nc4uwo/faWETtbd0/yoWhjuionFchrZmt6 MIyxUyK9CeaBNzQ617gBKMe1JpwHVxy5ut6jtCZ8jfe/Mbb1q+JDlaaRE7xMvN/upNic 8F2lYSdTqVAnNYKdsnNL8eBrxc9/OwPrXdDTpjcVKsBxwEVNlPCyEPBhpPTEVOYHu+Qu DXZg== X-Gm-Message-State: ACgBeo2GFdQnXaZsx4CKtQjzGXDDj7o7f1l0OxjI6htwvtCkl/PsCFel i/p+NAzbc1grot574PG0hnm5cQ== X-Google-Smtp-Source: AA6agR63Bzb51JkQHDsQML106QA1SRbThkvFgEfcZxG1oTuPekWXu06XLjwe2W8lGlgpYHROZLAeqg== X-Received: by 2002:adf:a702:0:b0:226:e205:fa56 with SMTP id c2-20020adfa702000000b00226e205fa56mr7815687wrd.637.1662039604363; Thu, 01 Sep 2022 06:40:04 -0700 (PDT) Received: from localhost.localdomain (210.145.15.109.rev.sfr.net. [109.15.145.210]) by smtp.googlemail.com with ESMTPSA id e3-20020adfe383000000b0021ef34124ebsm15399016wrm.11.2022.09.01.06.40.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 01 Sep 2022 06:40:03 -0700 (PDT) From: Amjad Ouled-Ameur To: matthias.bgg@gmail.com Cc: Markus Schneider-Pargmann , rafael@kernel.org, fparent@baylibre.com, amitk@kernel.org, daniel.lezcano@linaro.org, devicetree@vger.kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-pm@vger.kernel.org, robh+dt@kernel.org, rui.zhang@intel.com, Amjad Ouled-Ameur Subject: [PATCH v3 2/4] thermal: mediatek: control buffer enablement tweaks Date: Thu, 1 Sep 2022 15:39:48 +0200 Message-Id: <20220901133950.115122-3-aouledameur@baylibre.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220901133950.115122-1-aouledameur@baylibre.com> References: <20220901133950.115122-1-aouledameur@baylibre.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Markus Schneider-Pargmann Add logic in order to be able to turn on the control buffer on MT8365. This change now allows to have control buffer support for MTK_THERMAL_V1, and it allows to define the register offset, and mask used to enable it. Signed-off-by: Markus Schneider-Pargmann Signed-off-by: Fabien Parent Signed-off-by: Amjad Ouled-Ameur --- Changes in V3: - Use GENMASK() and BIT() instead of hardcoded data. - Use u32 instead of int for "tmp" var in mtk_thermal_turn_on_buffer() drivers/thermal/mtk_thermal.c | 25 ++++++++++++++++++------- 1 file changed, 18 insertions(+), 7 deletions(-) diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c index ede94eadddda..b5b4401249e8 100644 --- a/drivers/thermal/mtk_thermal.c +++ b/drivers/thermal/mtk_thermal.c @@ -271,6 +271,9 @@ struct mtk_thermal_data { bool need_switch_bank; struct thermal_bank_cfg bank_data[MAX_NUM_ZONES]; enum mtk_thermal_version version; + u32 apmixed_buffer_ctl_reg; + u32 apmixed_buffer_ctl_mask; + u32 apmixed_buffer_ctl_set; }; struct mtk_thermal { @@ -514,6 +517,9 @@ static const struct mtk_thermal_data mt7622_thermal_data = { .adcpnp = mt7622_adcpnp, .sensor_mux_values = mt7622_mux_values, .version = MTK_THERMAL_V2, + .apmixed_buffer_ctl_reg = APMIXED_SYS_TS_CON1, + .apmixed_buffer_ctl_mask = GENMASK(31, 6) | BIT(3), + .apmixed_buffer_ctl_set = BIT(0), }; /* @@ -963,14 +969,18 @@ static const struct of_device_id mtk_thermal_of_match[] = { }; MODULE_DEVICE_TABLE(of, mtk_thermal_of_match); -static void mtk_thermal_turn_on_buffer(void __iomem *apmixed_base) +static void mtk_thermal_turn_on_buffer(struct mtk_thermal *mt, + void __iomem *apmixed_base) { - int tmp; + u32 tmp; + + if (!mt->conf->apmixed_buffer_ctl_reg) + return; - tmp = readl(apmixed_base + APMIXED_SYS_TS_CON1); - tmp &= ~(0x37); - tmp |= 0x1; - writel(tmp, apmixed_base + APMIXED_SYS_TS_CON1); + tmp = readl(apmixed_base + mt->conf->apmixed_buffer_ctl_reg); + tmp &= mt->conf->apmixed_buffer_ctl_mask; + tmp |= mt->conf->apmixed_buffer_ctl_set; + writel(tmp, apmixed_base + mt->conf->apmixed_buffer_ctl_reg); udelay(200); } @@ -1070,8 +1080,9 @@ static int mtk_thermal_probe(struct platform_device *pdev) goto err_disable_clk_auxadc; } + mtk_thermal_turn_on_buffer(mt, apmixed_base); + if (mt->conf->version == MTK_THERMAL_V2) { - mtk_thermal_turn_on_buffer(apmixed_base); mtk_thermal_release_periodic_ts(mt, auxadc_base); }